MeMS Materials and their Preparation
SEMICONDUCTORS 53 semiconductor materials, from Group IV elements in the periodic table, are germanium
3.3.2 Semiconductors: Growth and Deposition
To demonstrate the methods of growing semiconductors, let us consider crystal growth of silicon in detail. Silicon is used as an example because it is the most utilised semi-conductor in microelectronics and MEMS. In fact, the next three chapters are devoted to conventional silicon microtechnology (Chapter 4), bulk micromachining (Chapter 5), and surface (Chapter 6) micromachining techniques.
Section 3.3.2.1 briefly outlines silicon crystal growth from the melt - a technique that is widely used in growing bulk silicon wafers. This is followed by the epitaxial growth of thin crystalline silicon layers in Section 3.3.2.2. A variation of the method for silicon growth from the melt is the Bridgman technique that is used for growing gallium arsenide wafers. The Bridgman technique is not discussed in this chapter (for a description of the Bridgman technique see Tuck and Christopoulous (1986)). A more detailed description of the way in which silicon wafers are made is given in Section 4.2. However, a brief overview is presented in the following subsections.
3.3.2.1 Silicon crystal growth from the melt
Basically, the technique used for silicon crystal growth from the melt is the Czochralski technique. The technique starts when a pure form of sand (SiO2) called quartzite is placed
SEMICONDUCTORS 55 in a furnace with different carbon-releasing materials such as coal and coke. Several reactions take place inside the furnace and the net reaction that results in silicon is
SiC + SiO2 Si + SiO (gas) + CO (gas) (3.3) The silicon so produced is called metallurgical-grade silicon (MGS), which contains up to 2 percent impurities. Subsequently, the silicon is treated with hydrogen chloride (HC1) to form trichlorosilane (SiHCl3):
Si + 3HC1 SiHCl3 (gas) + H2 (gas) (3.4) is liquid at room temperature. Fractional distillation of the SiHCl3 liquid removes impurities, and the purified liquid is reduced in a hydrogen atmosphere to yield electronic-grade silicon (EGS) through the reaction
SiHCl3 + H Si + 3HC1 (3.5)
EGS is a polycrystalline material of remarkably high purity and is used as the raw material for preparing high-quality silicon wafers.
The Czochralski technique uses the apparatus shown in Figure 3.19 called the puller.
The puller comprises three main parts:
1. A furnace that consists of a fused-silica (SiO2) crucible, a graphite susceptor, a rotation mechanism, a heating element, and a power supply.
Soild-liquid interface
CCW
Seed holder Seed
Graphite susceptor
Figure 3.19 A crystal puller (Czochralski) for growing silicon boules, which are then sawn up to make crystal wafers
56 MEMS MATERIALS AND THEIR PREPARATION
2. A crystal pulling mechanism, which is composed of a seed holder and a rotation mechanism.
3. An atmosphere control, which includes a gas source (usually an inert gas), a flow control, and an exhaust system.
In crystal growing, the EGS is placed in the crucible and the furnace is heated above the melting temperature of silicon. An appropriately oriented seed crystal (e.g. [100]) is suspended over the crucible in a seed holder. The seed is lowered into the melt. Part of it melts but the tip of the remaining seed crystal still touches the liquid surface. The seed is then gently withdrawn. Progressive freezing at the solid-liquid interface yields a large single crystal. A typical pull rate is a few millimeters per minute.
After a crystal is grown, the seed and the other end of the ingot, which is last to solidify, are removed. Next, the surface is ground so that the diameter of the material is defined. After that, one or more flat regions are ground along the length of the ingot.
These flat regions mark the specific crystal orientation of the ingot and the conductivity type of the material (Figure 3.20). Finally, the ingot is sliced by a diamond saw into wafers. Slicing determines four wafer parameters: surface orientation, thickness, taper (which is the variation in the wafer thickness from one end to another), and bow (i.e.
surface curvature of the wafer, measured from the centre of the wafer to its edge). Typical specifications for silicon wafers are given in Table 3.7.
3.3.2.2 Epitaxial growth
The method for growing a silicon layer on a substrate wafer is known as an epitaxial process in which the substrate wafer acts as a seed crystal. Epitaxial processes are different
Primary
Secondary flat
{111}n-type {111} p-type
Secondary flat
Primary flat
Secondary flat {100}n-type {100}/>-type
Figure 3.20 Flat regions are machined into the silicon wafers and used for the subsequent iden-tification of crystal orientation and dopant type
SEMICONDUCTORS 57 Table 3.7 A list of specifications for silicon wafers
Diameter Parameter 100 mm 125 mm 150 mm
Thickness (mm)
"Wafer flats are defined in Section 4.2.
from crystal growth from the melt in that the epitaxial layer can be grown at a temperature very much below the melting point. Among various epitaxial processes, vapour-phase epitaxy (VPE) is the usual process for silicon layer growth.
A schematic of the VPE apparatus is shown in Figure 3.21. The figure shows a hori-zontal susceptor made from graphite blocks. The susceptor mechanically supports the wafer, and, being an induction-heated reactor, it also serves as the source of thermal energy for the reaction.
Several silicon sources are usually used: silicon tetrachloride (SiCl4), dichloro-silane (SiH2Cl2), trichlorosilane (SiHCl3), and silane (SiH4). Typical reaction temperature for SiCl4 is ~1200°C. The overall reaction in the case of SiCl4 is reduction by hydrogen,
SiCl4 (gas) + 2H2 (gas) > Si (solid) + 4HC1 (gas) A competing reaction that would occur simultaneously is
SiCl4 (gas) + Si (solid) 2SiCl2 (gas)
(3.6)
(3.7) In reaction (3.6), silicon is deposited on the wafer, whereas in reaction (3.7), silicon is removed (etched). Therefore, if the concentration of SiCl4 is excessive, etching rather than growth of silicon will take place.
An alternative epitaxial process for silicon layer growth is molecular beam epitaxy (MBE), which is an epitaxial process that involves the reaction of a thermal beam of silicon
To vent
Gas flow Gas inlets O RF heating
Figure 3.21 Apparatus used to grow a silicon layer by vapour-phase epitaxy (VPE)
58 MEMS MATERIALS AND THEIR PREPARATION
atoms with a silicon wafer surface under ultrahigh vacuum conditions (~10–10 torr).
MBE can achieve precise control in both chemical composition and impurity profiles (if introduced intentionally). Single-crystal multilayer structures with dimensions on the order of atomic layers can be made using MBE.