ANODIC BONDING

Silicon-to-silicon anodic bonding is a bonding technique used to seal silicon together by use of a thin sputter-deposited glass layer. The equipment used for anodic bonding is shown in Figure 5.18. The equipment is basically a heat-chuck element with an electrode that is capable of supplying high voltage across the structure to be bonded. The system may automatically control the temperature and power supply during the bonding process.

After surface cleaning and polishing, one of the wafers (referred to here as the top wafer) is initially given a glass film that is a few microns thick. This glass film is sputtered on the wafer surface. The top wafer is placed on top of a second silicon wafer, which is usually referred to as the support wafer (Figure 5.19); these two wafers are to be bonded.

The support wafer rests on the aluminum chuck shown in Figure 5.18. The two wafers are usually sealed together by anodic bonding at temperatures less than 400 °C with an electrostatic DC voltage of 50 to 200 V. The negative electrode is connected to the top sputter-coated wafer. The voltage should be applied over a time that is long enough to allow the current to settle at the steady-state minimised level. Typically, the bonding process is terminated within 10 to 20 minutes. The bond process usually takes place in air at atmospheric pressure.

Vacuum top Heating shield Electrode Aluminum chuck

Vacuum surroundings Vacuum wafer chuck

Figure 5.18 Schematic cross section of anodic bonding apparatus (Hanneborg et al. 1992)

ANODIC BONDING 141

Top-chip:

Silicon bulk, 800 um thickness Silicon oxide, 300 nm thickness Pyrex#7740, 2.5 um thickness

Support-chip:

Surface layer (such as oxide, nitride, poly-Si, or aluminum) Silicon bulk, 380 um thickness

Figure 5.19 Top and support wafers used in a typical anodic bonding process (Hanneborg et al.

1992)

Worked Example E5.6: Floating Element Shear Sensor Objective:

The objective is to fabricate a floating element sensor that consists of a plate (120 um × 140 urn) and four tethers (30 urn x 10 urn) as shown in Figure 5.20(a) (Shajii and Schmidt 1992). The tethers work as mechanical supports for the plate and the resistors in the transduction scheme. The plate and the tethers are made from a 5 um thick lightly doped n-type silicon layer and are suspended 1.4 um above another silicon surface as shown in Figure 5.20(b). The entire structure is attached to the lower silicon wafer at the ends of the tethers using a 1.4 um SiO2 layer.

10um-*|U—

(a) Floating-element

(b)

Figure 5.20 Angled view (a) and cross section (b) of a floating sensor based on a rectangular plate with four tethers (Shajii and Schmidt 1992)

142 SILICON MICROMACHINING: BULK Process Flow: (Figure 5.21)

The fabrication of the sensor involves the processing of two wafers (handle wafer and device wafer) that are bonded together. The process proceeds as follows:

1. A 1.4 urn thick layer of SiO2 is grown on the handle wafer by wet oxidation at 950 °C. The handle wafer is typically a 4, 10 to 20 £2-cm n-type (100) silicon. Using photolithography, the oxide on top of the handle wafer is patterned as shown in Figure 5.21(a). The device wafer has a 5 urn lightly doped n-type (~1015 cm–3) epitaxial silicon layer grown on top of a highly boron-doped (~1020 cm–3) p+ region (Figure 5.21 (a)).

2. The front of the handle wafer is bonded to the device wafer. The bonding sequence includes a preoxidation cleaning of the two wafers, hydration of the bonding surfaces using a 3:1 H2SO4:H2O2 solution for 10 minutes, a deionised water rinse, spin dry, physical contact of the two bonding surfaces, and a high-temperature anneal (1000°C in dry O2) for 70 minutes. The device wafer is then thinned in a KOH:H2O (20 percent KOH by weight at 57 °C) solution until approximately 40 um of silicon remains. A solution of CsOH:H2O (60 percent CsOH by weight at 60 °C) is used to stop on the p+ layer because of its better etch-stop characteristics for heavily boron-doped

Si device wafer

p + Region Silicon epi

Si handle wafer (a)

Silicon epi (5 um thick)

Si handle wafer (b)

Aluminum Implanted regions

(c)

PECVD oxide Amorphous Si

(d)

(e)

Figure 5.21 Process flow for the fabrication of the floating sensor shown in Figure 5.20 (Shajii and Schmidt 1992)

REFERENCES 143 silicon in comparison with KOH. The p+ layer is subsequently removed using a 8:3:1 CH3COOH:HNO3:HF liquid etch. A brown stain, indicating porous silicon, resulting from the etch is removed using a mixture of 97:3 HNO3:HF solution for about 15 seconds leaving a 5 um-thick silicon epilayer bonded to the patterned oxide (Figure 5.2 l(b)).

3. A masked implant (as at 80 keV and 7 x 1015 cm–2 dose) followed by a one-hour anneal at 850 °C in dry O2 ambient is performed for better ohmic contact. Sensing tethers are not implanted and their concentration remains at approximately 1015 cm–3. Following the implant anneal, 500 nm of Al is deposited using electron-beam deposi-tion, patterned and sintered in N2 ambient at 375 °C for 30 minutes (Figure 5.21(c)).

4. A thin layer of plasma-enhanced chemical vapour deposition (PECVD) amorphous silicon (500 nm) is deposited over the wafer to protect the aluminum in the subsequent processing steps. A 1 um-thick PECVD oxide is then deposited and patterned using a CF4/CHF3/He plasma etch. This oxide will act as an etch mask for the silicon trench etch that is used to define the floating element. The oxide is plasma-etched and the resist is subsequently removed (Figure 5.21(d)).

5. A CCl4-based plasma etch is used to trench-etch the silicon. A BOE (7:1 H2O:HF is used to etch the PECVD oxide that remains after the silicon trench etch, thus completing the fabrication of the floating element. Electrical contacts are made through the amorphous silicon layer to the Al bonding pads either by mechan-ical probing or by ultrasonic wire bonding. The completed sensor is shown in Figure 5.2 l(e).

5.8 CONCLUDING REMARKS

In this chapter, we have described the process involved in bulk silicon micromachining that is used to fashion microstructures out of silicon wafers, including a discussion of etching and etch-stops, followed by a discussion of the bonding together of two wafers to make the complete microdevices. Several worked examples are considered to illustrate the role of the various processes.

The alternative approach is that of surface rather than bulk silicon micromachining.

This topic is covered in the next chapter, again with worked examples of microstruc-tures. Together, bulk and surface micromachining represent the two key technologies that are essential for the manufacture of many different types of silicon microsensors and microactuators today.

REFERENCES

Apel, U. et al. (1991). "A 100-V lateral DMOS transistor with a 0.3 micron channel in a 1 micron silicon-film-on-insulator-on silicon," IEEE Trans. Electron Devices, 38, 1655–1659.

Bong, A. (1971). "Ethylene diamine-pyrocatechol-water mixture shows etching anomaly in boron-doped silicon," J. Electrochem. Soc., 118, 401–402.

Choi, W-S. and Smits, J. G. (1993). "A method to etch undoped silicon cantilever beam," J. Micro-electromech. Syst., 2, 82-86.

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Greenwood, J. C. (1969). J. Electrochem. Soc., 116, 1325-1330.

Han, H., Weiss, L. E. and Reed, M. L. (1992). "Micromechanical velero," J. Microelectromech.

Syst., 1, 37-43.

Hanneborg, A., Nese, M., Jakobsen, H., and Holm, R. (1992). "Silicon-to-thin film anodic bonding,"

J. micromech. Microeng., 2, 117-121.

Harendt, C., Graf, H-G., Hofflinger, B. and Penteker, E. (1991). "Silicon direct bonding for sensor applications - characterisation of the bond quality," Sensors and Actuators A, 25, 87-92.

Kissinger, W. and Kissinger, G. (1991). Proc. 1st Symp. on Wafer Bonding, Phoenix, USA, abstract no. 461, p. 681.

Lasky, J. B. (1986). "Wafer bonding for silicon-on-insulator technologies," Appl. Phys. Lett., 48, 78-80.

Linden, Y., Tenerz, L., Tiren, J. and Hok, B. (1989). "Fabrication of three dimensional silicon structures by means of doping-selective etching," Sensors and Actuators, 16, 67-82.

Ohashi et al. (1986). Proc. IEDM, 86, 210-213.

Palik, E. D., Bermudez, V. M. and Glembocki, O. J. (1985a). "Ellipsometric study of the etch-stop mechanism in heavily doped silicon," J. Electrochem. Soc., 132, 135–141.

Palik, E. D., Bermudez, V. M. and Glembocki, O. J. (1985b). In C. Fung et al., eds., Microma-chining and Micropackaging of Transducers, Elsevier, Amsterdam, pp. 135–149.

Peeters, E., Lapadatu, D., Puers, R. and Sansen, W. (1994). "PHET, an electrodeless photovoltaic electrochemical etch-stop technique," J. Microelectromech. Syst., 3, 113–123.

Rai-Choudrey, P. ed. (1997). Handbook of Microlithography, Micromachining and Microfabrica-tion, 2 vols., SPIE Press, Washington, USA.

Shajii, J., Ng, K-Y. and Schmidt M. A. (1992). "A microfabrication floating-element shear stress sensor using wafer-bonding technology," J. Microelectromech. Syst., 1, 89-94.

Wang, S.S. et al. (1992). "An etch-stop utilising selective etching of n-type silicon by pulsed potential anodisation," J. Microelectromech. Syst., 1, 187–192.

Zhang, Z. L. and McDonald, N. C. (1992). "A RIE process for submicron, silicon electromechanical structures," J. Micromech. Microeng., 2, 3138.

6.1 INTRODUCTION

Since the beginning of the 1980s, much interest has been directed toward micromechanical structures fabricated by a technique called surface micromachining. The resulting two-and-a-half-dimensional structures1 are mainly located on the surface of a silicon wafer and exist as a thin film - hence the half dimension. The dimensions of these surface-micromachined structures can be an order of magnitude smaller than the bulk-micromachined structures.

The main advantage of surface-micromachined structures is their easy integration with integrated circuit (IC) components, as the same wafer surface can also be processed for IC elements. However, as miniaturisation is immensely increased by silicon surface micromachining, the small sizes or masses that are created are often insufficient for viable sensors and, particularly, for actuators. The problem is most acute in capacitive mechanical microsensors (Section 8.4) and especially in capacitively driven microactuators because of the low coupling capacitances. Deep etching techniques, such as lithography, electro-plating, and moulding process (LIGA), have been developed to address this problem but are difficult to realise in silicon.

There are several common approaches to the making of microelectromechanical system (MEMS) devices using surface micromachining. The first of these approaches is the sacrificial layer technology for the realisation of mechanical microstructures. The second approach incorporates IC technology and wet anisotropic etching and the third approach uses plasma etching to fabricate microstructures at the silicon wafer surface. These approaches are illustrated in this chapter by a set of ten worked examples that cover a range of microsensor and MEMS devices from cantilever beams, resonant comb structures through to micromotors.