MICROCHIP PIC ® MICROCONTROLLER FAMILY

By the late 1980s, microcontrollers and certain microprocessors were well established in embedded control applications. Despite advances in technology, not many devices could simultaneously ad-dress the needs for low power, moderate processing throughput, very small packages, and diverse in-tegrated peripherals. Microchip Technology began offering a family of small peripheral interface controller (PIC^®)^* devices in the early 1990s that addressed all four of these needs. Microchip developed the compact PIC architecture based on a reduced instruction set core (RISC) microprocessor. The chips commonly run at up to 20 MHz and execute one instruction every machine cycle (four clock cycles)—except branches that consume two cycles. The key concept behind the PIC family is simplicity. The original 16C5x family, shown in Fig. 6.7, implements a 33-instruction microprocessor core with a single working register (accumulator), W, and only a two-entry subroutine stack. These devices contain as little as 25 bytes of RAM and 512 bytes of ROM, and some are housed in an 18-pin package that can be smaller than a fingernail. The PIC devices are not expandable via an external bus, further saving logic. This minimal architecture is what enables relatively high performance processing with low power consumption in a tiny package. Low-power operation is also coupled with a wide operating voltage range (2 to 6.25 V), further simplifying certain systems by not always requiring voltage regulation circuits.

No interrupt feature is included, which is a common criticism of the architecture; this was fixed in subsequent PIC microcontroller variants. PIC devices are, in general, fully static, meaning that they can operate at an arbitrarily low frequency; 32 kHz is sometimes used in very power-sensitive

appli-* The Microchip name, PIC, and PICmicro are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries.

Program Counter 2 Entry Stack

RAM I/O Port Control

Registers Watchdog Timer

W ALU

Status Register

ROM Clock Driver

Timer

Power-On Reset

FIGURE 6.7 PIC microcontroller 16C5x architecture.

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132Digital Fundamentals

cations in which only microamps of current are consumed. To further reduce cost and complexity, the microcontrollers contain on-board clock drivers that work with a variety of external frequency-reference components. Quartz crystals are supported, as they are very accurate frequency-references. In very small systems wherein cost and size are absolutely paramount concerns, and absolute frequency ac-curacy is not a concern, less-expensive and smaller frequency references can be used with a PIC microcontroller. One step down from a crystal is a ceramic resonator, which functions on a similar principle but with lower accuracy and cost. Finally, if the operating frequency can be allowed to vary more substantially with temperature, voltage, and time, a resistor/capacitor (RC) oscillator, the cheapest option, is supported. Tiny surface mount RC components take up very little circuit board area and cost pennies.

The original 16C5x family incorporates only the most basic of peripherals: power-on-reset, an eight-bit timer/counter, and a watchdog timer. A power-on reset circuit ensures that the microcon-troller reliably begins operation when power is applied by automatically controlling an internal reset signal. On most microprocessors, reset is purely an external function. A watchdog timer can be con-figured to automatically reset the microcontroller if the system develops an unforeseen fault that causes the software to “crash.” The watchdog functions by continuously counting, and software must periodically reset the counter to prevent it from reaching its terminal count value. If this value is reached, the internal reset signal is asserted. Under normal circumstances where software is func-tioning properly, it resets the watchdog timer with plenty of time to spare. However, if the software crashes, it will presumably not be able to reset the watchdog, and a system reset will soon follow.

The watchdog timeout period is configurable from milliseconds to seconds. When using a watchdog, the timeout period is chosen to be long enough so that software can reliably reset the counter to pre-vent accidental reset, yet short enough to catch a fault and reset the system before serious problems result.

The PIC microcontroller’s RISC instruction set obeys the tenets of the general RISC style: ac-complish the same task with more simple instructions instead of fewer complex ones. Fewer types of simple instructions require less processing logic within the chip. As an example, there are just two branch instructions: CALL and GOTO. CALL is an unconditional branch-to-subroutine that places the current PC onto the stack. It is the programmer’s responsibility to not nest subroutines more than two deep to avoid overflowing the stack. GOTO simply loads a new value into the PC. To implement conditional branches, these instructions are paired with one of four instructions that perform an ac-tion and then skip the following instrucac-tion if a particular result is true. INCFSZ and DECFSZ incre-ment or decreincre-ment a designated register, respectively, and then skip the following instruction if the result is zero. BTFSC and BTFSS test a specified bit in a register and then skip the following in-struction if the bit is 0 or 1, respectively. Using the first pair of inin-structions, a loop could be written as shown in Fig. 6.8.

Assembly languages commonly offer the programmer a means of representing numeric values with alphanumeric labels for convenience. Here, the loop variable COUNT is set to address 0 with an equate directive that is recognized and processed by the assembler. MOVWF transfers the value in the COUNT EQU 0 ; define COUNT at address 0

MOVLW 0x09 ; 9 loop iterations

MOVW COUNT ; F iteration tracking register LOOP_START <loop instructions> ; body of loop

DECFSZ COUNT,1 ; done with loop yet?

GOTO LOOP_START ; non-zero, keep going...

<more instructions> ; zero, loop is done...

FIGURE 6.8 16C5x assembly language loop.

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Instructive Microprocessors and Microcomputer Elements 133

working register into a particular location in the register file. In this example, the GOTO instruction is executed each time through the loop until COUNT is decremented to 0. (The operand “1” following COUNT in DECFSZ tells the microcontroller to place the decremented result back into COUNT rather than into the working register.) At this point, GOTO is skipped, because the result is 0, causing the microcontroller to continue executing additional instructions outside of the loop.

The second pair of skip instructions, BTFSC and BTFSS, directly supports the common situation in which the microcontroller reads a set of flag bits in a single byte and then takes action based on one of those bits. Such bit-testing instructions are common in microcontrollers by virtue of their in-tended applications. Some generic microprocessors do not contain bit-testing instructions, requiring software to isolate the bit of interest with a logical mask operation. A mask operation works as fol-lows with an AND function, assuming that we want to isolate bit 5 of a byte so as to test its state:

Here, the mask prevents any bit other than bit 5 from achieving a 1 state in the final result. This masking operation could then be followed with a conditional branch testing whether the overall re-sult was 0 or non-0. In the PIC architecture, and most other microcontrollers, this process is per-formed directly with bit-test instructions.

Masking also works to set or clear individual bits but, here again, the PIC architecture contains special instructions to optimize this common microcontroller function. Using the above example, bit 5 can be set, regardless of its current state, by ORing the data byte with the same mask.

The mask ensures that only bit 5 is set, regardless of its current state. All other bits propagate through the OR process without being changed. Similarly, an individual bit can be cleared, regard-less of its current state, with an inverse AND mask:.

Here, all bits other than bit 5 are ANDed with 1, propagating them through to the result. Bit 5 is ANDed with 0, unconditionally forcing it to a 0. Rather than having to load a mask and then execute a logical instruction, the PIC architecture contains two instructions to clear and set arbitrary bits in a specified register: BCF and BSF, respectively.

1 0 1 1 0 1 1 1 Byte to test

0 0 1 0 0 0 0 0 Mask

AND 0 0 1 0 0 0 0 0 Bit 5 isolated

1 0 1 1 0 1 1 1 Starting byte

0 0 1 0 0 0 0 0 Mask

OR 0 0 1 0 0 0 0 0 Result

1 0 1 1 0 1 1 1 Starting byte

1 1 0 1 1 1 1 1 Mask

AND 1 0 0 1 0 1 1 1 Result

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134 Digital Fundamentals

Microchip extended the 16C5x’s architecture and features with the 16C6x and 16C7x families.

The 16C5x’s advantages of low power consumption, wide operating voltage range, and small size are retained. Improvements include more memory (up to 368 bytes of RAM and 8 kB of ROM), a more versatile microprocessor core with interrupt capability, an eight-level stack, and a wider selec-tion of on-board peripherals including addiselec-tional timers, serial ports, and analog-to-digital (A/D) converters. (An A/D converter is a circuit that converts an analog voltage range into a range of binary values. An 8-bit A/D converter covering the range of 0 to 5 V would express voltages in that range as a byte value with a resolution of 5 V ÷ (2⁸ – 1) increments = 19.6 mV per increment.) Between four and eight A/D converters are available in ’C7x devices.

Some PIC microcontrollers contain two serial ports on the same chip: an asynchronous port suit-able for RS-232 applications and a synchronous port capsuit-able of SPI or I²C operation in conjunction with other similarly equipped ICs in a system. At the other end of the spectrum, very small PIC de-vices are available in eight-pin packages—small enough to fit almost anywhere.