PIN NAME DESCRIPTION

oAo DBo

OEA,OEB

Three-State Output Enable Inputs (Active LOW) Dxx Data Inputs

Ox><

Three-State Outputs

GND Ground

Vee Power

DXX L H X

3-80

OUTPUTS

On:

L H Z

CD 74LPT244

Absolute Maximum Ratings

Thermal Information

DC Input Voltage ... -0.5V to 7.0V Thermal Resistance (Typical, Note 2) 9JA (oC/W) DC Output Current ... 120mA SOIC Package. . . 87 Operating Conditions

asop

Package. . . 110 Operating Temperature Range ... -40°C to 85°C

Maximum Junction Temperature ... 150°C Maximum Storage Temperature Range ... -65⁰C to 150°C Supply Voltage to Ground Potential Maximum Lead Temperature (Soldering 10s) ... 300°C

Inputs and Vee Only ... -0.5V to 7.0V (Lead Tips Only) Supply Voltage to Ground Potential

Outputs and % Only ... -0.5V to 7.0V

CAUTION: Stresses above those listed in "Absolute Maximum Ratings· may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

2. 9JA is measured with the component mounted on an evaluation PC board in free air.

Electrical Specifications

(NOTE 3) (NOTE 4)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

DC ELECTRICAL SPECIFICATIONS Over the Operating Range, TA = -40°C to 85°C, Vee = 2.7V to 3.6V

Input HIGH Voltage VIH Guaranteed Logic HIGH Level 2.2

-

^5.5 ^V

(Input Pins)

Input HIGH Voltage VIH Guaranteed Logic HIGH Level 2.0

-

^5.5 ^V

(I/O Pins)

Input LOW Voltage VIL Guaranteed Logic LOW Level -0.5

-

^0.8 ^V

Pins)

Clamp Diode Voltage VIK Vee = Min, liN = -18mA -0.7 -1.2 V

Output HIGH Current IOOH Vee = 3.3V, VIN = VIH or VIL, Vo = 1.5V (Note 5) -36 -60 -110 mA Output LOW Current IOOL Vee = 3.3V, VIN = VIH or VIL, Vo = 1.5V (Note 5) 50 90 200 mA Output HIGH Voltage VOH Vee = Min, VIN = VIH or VIL IOH = -0.1mA Vee - 0.2

-

IOH=-3mA 2.4 3.0 V

Vee = 3.0V, VIN = VIH or VIL IOH=-8mA 2.4 3.0 V

(Note 7)

IOH=-24mA 2.0

-

3-81

Electrical Specifications (Continued)

(NOTE 3) (NOTE 4)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Output LOW Voltage VOL Vee = Min, VIN = VIH or VIL IOL=0.1mA 0.2 V

10L= 16mA 0.2 0.4 V

10L= 24mA 0.3 0.5 V

Short Circuit Current lOS Vee = Max (Note 5), VOUT = GND -60 -85 -240 mA

(Note 6)

Power Down Disable 10FF Vee = OV, VIN or VOUT ~ 4.5V ±100

ItA

Input Hysteresis VH 150 mV

CAPACITANCE TA = 25°C, f = 1MHz

Input Capacitance CIN VIN = OV 4.5 6 pF

(Note 8)

Output Capacitance COUT VOUT=OV

-

^5.5 ⁸ ^pF

(Note 8)

POWER SUPPLY SPECIFICATIONS

Quiescent Power lee Vee = Max VIN=GND 0.1 10

IJA

Supply Current or Vee

Quiescent Power dlee Vee = Max VIN = VCC - 0.6V 2.0 30 I1A

Supply Current TIL (Note 9)

Inputs HIGH

Dynamic Power leeD Vee = Max, Outputs Open VIN=Vee 50 75

IJ.AI

Supply Current OEX=GND VIN=GND MHz

(Note 10) One Bit Toggling

50% Duty Cycle

Total Power Supply Ie Vee = Max, Outputs Open VIN = Vee - 0.6V 0.6 2.3 mA

Current (Note 12) fl = 10MHz, 50% Duty Cycle VIN=GND OEx=GND

One Bit Toggling

Vee = Max, Outputs Open VIN = Vee - 0.6V 2.1 4.7 mA

fl = 2.5MHz, 50% Duty Cycle VIN=GND (Note 11)

OEx=GND 8 Bits Toggling

3-82

CD74LPT244

Switching Specifications Over Operating Range (Note 13)

CD74LPT244 CD74LPT244A CD74LPT244C (NOTE 14)

TEST (NOTE 1S) (NOTE 1S) (NOTE 1S)

PARAMETER SYMBOL CONDITIONS MIN MAX MIN MAX MIN MAX UNITS

Propagation Delay tplH Cl = SOpF 1.S 6.S 1.S 4.8 1.S 4.1 ns

DxxtoOxx tpHl Rl=

soon

Output Enable Time tpZH 1.S 8.0 1.S 6.2 1.S S.8 ns

OEXto Oxx tPZl

Output Disable Time tpHz 1.S 7.0 1.S 5.6 1.5 5.2 ns

(Note 16) tpLZ

OEXto Oxx

Output Disable tSK(O) O.S 0.5 0.5 ns

(Note 17) NOTES:

3. For conditions shown as Max or Min, use appropriate value specified under Electrical Specifications for the applicable device type.

4. Typical values are at Vcc = 3.3V, 25°C ambient and maximum loading.

5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

6. This parameter is guaranteed but not tested.

7. VOH = VCC - 0.6V at rated current.

8. This parameter is determined by device characterization but is not production tested.

9. Per TIL driven input; all other inputs at VCC or GND.

10. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

11. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.

12. Ic = laUIESCENT + IINPUTS + IDYNAMIC Ic = ICC + .iICC DHNT + ICCD (fcp/2 + flNI) Icc = Quiescent Current (ICCl' ICCH and IcCZ) .ilcc = Power Supply Current for a TIL High Input DH = Duty Cycle for TIL Inputs High

NT = Number of TIL Inputs at DH

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCp = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCp = Number of Clock Inputs at fcp

fl = Input Frequency NI = Number of Inputs at fl

All currents are in milliamps and all frequencies are in megahertz.

13. Propagation Delays and Enable/Disable times are with Vcc = 3.3V ±O.3V, normal range. For VCC = 2.7V, extended range, all Propa-gation Delays and Enable/Disable times should be degraded by 20%.

14. See test circuit and wave forms.

1S. Minimum limits are guaranteed but not tested on Propagation Delays.

16. This parameter is guaranteed but not production tested.

17. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.

3-83

Test Circuits and Waveforms

NOTE:

18. Pulse Generator for All Pulses: Rate s 1.0MHz; loUT s son;

tf, tr S 2.5ns.

FIGURE 1. TEST CIRCUIT

CONTROL INPUT

OUTPUT NORMALLY LOW

OUTPUT NORMALLY HIGH

FIGURE 2. ENABLE AND DISABLE TIMING

3-84

SWITCH POSITION

TEST SWITCH

tpLZ, tpZL, Open Drain 6V

tpHZ, tPZH GND

tpLH, tpHL Open

DEFINITIONS:

CL = Load capacitance, Includes jig and probe capacitance.

=

Termination resistance, should be equal to loUT of the Pulse Generator.

SAME PHASE INPUT TRANsmON

OUTPUT

OPPOSITE PHASE INPUT TRANSmON

_ - - " " ' - - - 3V

+ - - - 1 . 5 V

_'---OV

,..-... -rlf--

VOH - 1.5V --~_VOL

1''''--3V

+ - - - - 1 . 5 V

'---,---OV

FIGURE 3. PROPAGATION DELAY

CD74LPT245

December 1996

Fast CMOS 3.3V 8-Bit Bidirectional Transceiver

Features Description

• Advanced 0.6 micron CMOS Technology

• Compatible with LCXTM Families of Products

• Supports 5V Tolerant Mixed Signal Mode Operation - Input Can Be 3V or 5V

The CD74LPT245 is an 8-bit bidirectional transceiver designed for asynchronous two-way communication between data buses. The transmiVreceive input pin (T/R) determines the direction of data flow through the bidirec-tional transceiver. Transmit (active HIGH) enables data from A ports to B ports, and receive (active LOW) from B ports to A ports. The output enable (OE) input, when HIGH, disables both A and B ports by placing them in HIGH Z condition.

- Output Can Be 3V or Connected to 5V Bus

• Advanced Low Power CMOS Operation

• Excellent Output Drive Capability:

- Balanced Drives (24mA Sink and Source)

• Low Ground Bounce Outputs

• Hysteresis on All Inputs

Pinout

The CD74LPT245 can be driven from either 3.3V or 5.0V devices allowing this device to be used as a translator in a mixed 3.3/5.0V system.

Ordering Information

TEMP.

RANGE PKG.

PART NUMBER fC) PACKAGE NO.

CD74LPT245AM -40 to 85 20 LdSOIC M20.3-P CD74LPT245AQM -40 to 85 20 LdQSOP M20.15-P CD74LPT245CM -40 to 85 20 LdSOIC M20.3-P CD74LPT245CQM -40 to 85 20 LdQSOP M20.15-P CD74LPT245M -40 to 85 20 LdSOIC M20.3-P CD74LPT245QM -40 to 85 20 LdQSOP M20.15-P NOTE: QSOP is commonly known as SSOP.

When ordering, use the entire part number. Add the suffix 96 to obtain the variant in the tape and reel.

CD74LPT245 (QSOP, SOIC) TOP VIEW

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

4198.2

3-85

Functional Block Diagram

TRUTH TABLE (NOTE 1)

Dans le document TECHNICAL ASSISTANCE (Page 111-117)