The Am3860XlOXL microprocessor provides an auto-matic interface for a 3870X floating-point math co-processor. A 3870X math coprocessor uses an 110-mapped interface driven automatically by the Am3860XlOXL microprocessor and assisted by three dedicated signals: BUSY, ERROR, and PEREQ.
As the Am3860XlOXL CPU begins supporting a coprocessor instruction, it tests the BUSY and ERROR Signals to determine if the coprocessor can accept its next instruction. Thus, the BUSY and ERROR inputs eliminate the need for any preamble bus cycles for com-munication between processor and coprocessor. A 3870X math coprocessor can be given its command op-code immediately. The dedicated signals provide instruction synchronization, and eliminate the need of using the Am3860XlOXL CPU WAIT op-code (9Bh) for 3870X math coprocessor instruction synchronization (the WAIT op-code was required when 8086 or 8088 was used with the 8087 coprocessor).
Custom coprocessors can be included in Am3860Xl OXL microprocessor based systems, via memory-mapped or I/O-memory-mapped interfaces. Such coprocessor interfaces allow a completely custom protocol, and are not limited to a set of coprocessor protocol primitives. In-stead, memory-mapped or I/O-mapped interfaces may use all applicable Am3860XlOXL microprocessor in-structions for high-speed coprocessor communication.
The BUSY and ERROR inputs of the Am3860XlOXL CPU may also be used for the custom coprocessor in-terface, if such hardware assist is desired. These sig-nals can be tested by the Am3860XlOXL CPU WAIT op-code (9Bh). The WAIT instruction will wait until the BUSY input is negated (interruptable by an NMI or en-able INTR input), but generates an Exception 16 fault if the ERROR pin is in the asserted state when the BUSY goes (or is) negated. If the custom coprocessor inter-face is memory-mapped, protection of the addresses used for the interface can be provided with the Am3860XlOXL microprocessor on-chip paging or seg-mentation mechanisms. If the custom interface is 1/0-mapped, protection of the interface can be provided with the Am3860XlOXL microprocessor 10PL (I/O Privilege Level) mechanism.
A 3870X math coprocessor interface is I/O mapped as shown in Table 22. Note that a 3870X math coproces-sor interface addresses are beyond the OhFFFFh range for programmed I/O. When the Am3860XlOXL CPU supports a 3870X math coprocessor, the Am3860Xl OXL microprocessor automatically generates bus cy-cles to the coprocessor interface addresses.
Table 22. Math Coprocessor pon Addresses
Address in Am386DXlDXL 387DX
CPU 110 Space Coprocessor Register
BOOOOOFBh Opcode Register
(32-bit port)
BOOOOOFCh Operand Register
(32-bit port) To correctly map a 3870X math coprocessor registers to the appropriate I/O addresses, connect a 3870X math coprocessor CMDO pin directly to the A2 output of the Am3860XlOXL microprocessor.
Software Testing for Coprocessor Presence When software is used to test for coprocessor (3870X) presence, it should use only the following coprocessor op-codes: FINIT, FNINIT, FSTCW mem, FSTSW mem, FSTSW AX. To use other coprocessor op-codes when a coprocessor is known to be not present, first set EM = 1 in Am3860XlOXL microprocessor CRO.
104 Am386 Microprocessors for Personal Computers
ABSOLUTE MAXIMUM RATINGS
Storage Temperature ... -65°C to + 150°C Ambient Temperature Under Bias .. -65°C to + 125°C Supply Voltage with Respect
toVss ... -0.5Vto+7V Voltage on Other Pins ... -0.5 V to Vcc +0.5 V
Stresses above those listed under ABSOLUTE MAXIMUM RA TINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.
DC CHARACTERISTICS over COMMERCIAL operating ranges Vcc = 5 V ±5%; TCASE = O°C to +85°C (PGA)
Vcc=5 V±10%; TCASE=O°C to +100°C (PQFP-20, 25, and 33 MHz) Vcc = 5 V ±5%; TCASE = O°C to + 100°C (PQFP -40 MHz)
Symbol Parameter Description Notes
VIL Input Low Voltage (Note 1)
V,H Input High Voltage
VILe CLK2 Input Low Voltage (Note 1)
V,He CLK2 Input High Voltage
VOL Output Low Voltage
IOL=4 mA: A31-A2, 031-00 (Note 6) IOL=5 mA: BE3-BEO, W/R,
O/G, MIlO, LOCK, ADS, HLOA
VOH Output High Voltage
IOH=1 mA: A31-A2, 031-00 (Note 6) 10H = 0.9 mA: BE3-BEO,
W/R, O/G, M/TO, LOCK, ADS, HLOA
III Input Leakage Current OV<;,V,N<;,VCC
(All pins except BS16, PEREa, BUSY, FL T, and ERROR)
I'H Input Leakage Current V,H=2.4 V
(PEREa Pin) (Note 2)
III Input Leakage Current V'L=0.45
(BSI6, BUSY, FL T, and ERROR) (Note 3) ILo Output Leakage Current 0.45 V <;,VouT<;,Vee
Icc Supply Current (Note 7) Vee = 5.0 V
CLK2 = 40 MHz: with -20 Icc Typ=130 CLK2 = 50 MHz: with -25 Icc Typ=160 CLK2 = 66 MHz: with -33 Icc Typ=210 CLK2 = 80 MHz: with -40 Icc Typ=330
leesB Standby Current leesB Typ = 20 !LA
(Am3860XL microprocessor) (Note 5)
CIN Input or 1/0 Capacitance Fe = 1 MHz (Note 4)
COlfT Output Capacitance Fe = 1 MHz (Note 4)
CeLK CLK2 Capacitance Fe = 1 MHz (Note 4)
Notes: 1. The Min value, --{I.3, is not 100% tested.
2. PEREa input has an internal pulldown resistor.
3. BS16, BUSY, FLT, and ERROR inputs each have an internal pullup resistor.
4. N01100% tested.
Min Max Unit
-0.3 0.8 V
2.0 Vee + 0.3 V
-0.3 0.8 V
2.7 Vee +0.3 V
0.45 V
0.45 V
2.4 V
2.4 V
±15
IlA
200 !LA
-400 !LA
±15 !LA
Vee = 5.5 V
155 mA
190 mA
245 mA
400 mA
150 !LA
10 pF
12 pF
20 pF
S. Measurement taken with inputs at rails, outputs unloaded, BS16, BUSY, FLT, and ERROR at Vee voltage level, PEREa at Gnd.
6. Outputs are CMOS and will pull to rail if load is not resistive.
7. Inputs at rails (Vee or Vss).
Am386DXlDXL Microprocessor Data Sheet 105
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AMDSWITCHING CHARACTERISTICS over COMMERCIAL operating range-40 MHz
VCC = 5 V ±5%; TCASE = O°C to +85°C (PGA)Vcc=5 V ±5%; TCASE= O°C to +100°C (PQFP)
No. Parameter Description Notes Ref Figure Min Max
Oper. Frequency: Am386DXCPU Hall CLK2 Ireq. 2 40
Notes: 1. Float condition occurs when maximum output current becomes less than ILo in magnitude. Float delay is not 100% tested.
Unit
2. These inputs are allowed to be asynchronous to CLK2. The setup and hold specifications are given for testing purposes, to assure
106
recognition within a specific clock period.
3. Rise and fall times are not tested.
4. Min time not 100% tested.
*PQFP package only.
Am386 Microprocessors for Personal Computers