Program Counter Indirect with Index (Base Displacement)

This mode is similar to the address register indirect with index (base displacement) mode described in 3.4.2.6 Address Register Indirect With Index (Base Displacement), but the program counter is used as the base register. It requires an index register indicator and an optional 16- or 32-bit Sign-extended base displacement.

The operand is in memory. The address of the operand is the sum of the contents of the program counter, the scaled contents of the sign-extended index register, and the base displacement. The value of the program counter is the address of the first extension word. The reference is a program space reference and is only allowed for read accesses.

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MOTOROLA 3-9

In this mode, the program counter, the index register, and the displacement are all optional. However, the user must supply the assembler notation "ZPC" (zero value is taken for the program counter) to indicate that the program counter is not used. This scheme allows the user to access the program space without using the program counter in calculating the EA. The user can access the program space with a data register indirect access by placing ZPC in the instruction and specifying a data register (On) as the index register.

GENERATION:

ASSEMBLER SYNTAX: EA = (PC) + (Xn) + bd (bd, PC, Xn. SIZE'SCALE) MODE:

REGISTER:

6n

PROGRAM COUNTER: ADDRESS OF EXTENSION WORD

31

BASE DISPLACEMENT: SIGN-EXTENDED VALUE 31

INDEX REGISTER: SIGN-EXTENDED VALUE

SCALE: SCALE VALUE

MEMORY ADDRESS: 31

NUMBER OF EXTENSION WORDS: 1,2,OR3 _OPERAND

3.4.3.4 Absolute Short Address

In this addressing mode, the operand IS In memory, and the address of the operand is in the extension word. The 16-bit address is sign extended to 32 bits before it is used.

MOTOROLA 3-10

GENERATION:

ASSEMBLER SYNTAX:

MODE:

REGISTER:

EXTENSION WORD:

MEMORY ADDRESS:

EAGIVEN (xxx).w

111 000 31 _ _ _ _ _ _ ,.--;-15'---_ _ _ _ --;

----~~: ^{[ _} ~N ET~DED ^_ MEMORY ADDRESS 31

NUMBER OF EXTENSION WORDS:

OPERAND

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3.4.3.5 Absolute Long Address

In this mode, the operand is in memory, and the address of the operand occupies the two extension words following the instruction word in memory.

The first extension word contains the high-order part of the address; the low-order part of the address is the second extension word.

GENERATION:

ASSEMBLER SYNTAX:

MODE:

REGISTER:

FI RST EXTENSION WORD:

SECOND EXTENSION WORD:

MEMORY ADDRESS:

NUMBER OF EXTENSION WORDS:

3.4.3.6 Immediate Data

NUMBER OF EXTENSION WORDS:

CPERAND GIVEN

#XXX 111 100 10R2

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MOTOROLA 3-11

lEI

Ell

3.4.4 Effective Address Encoding Summary

Most addressing modes use one of the three formats shown in Figure 3-2. The single EA instruction is in the format of the instruction word. The mode field of this word selects the addressing mode. The register field contains the general register number or a value that selects the addressing mode when the mode field contains "111 ".

Some indexed or indirect modes use the instruction word followed by the brief format extension word. Other indexed or indirect modes consist of the instruction word and the full format of extension words. The longest instruction for the CPU32 contains six extension words. It is a MOVE instruction with full format extension words for both source and destination EA and a 32-bit base displacement for both addresses.

MOTOROLA 3-12

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SINGLE EA INSTRUCTION FORMAT

15 14 13 12 11 10 9 8 7 6 5 4 3 2 o

EFFECTIVE ADDRESS

X X X X X X X X X X

MODE

I

BRIEF FORMAT EXTENSION WORD

15 14 12 11 10 9 8 7 o

lOlA

I

15 14 12 11 10 9 8 7 6 4 3 2 0 Index Register Number IS Index Register Type

O=Dn

1 =An BD SIZE

WordlLong Word Index Size 0= Sign-Extended Word 0= Base Register Added 1 = Base Register Suppressed Index Suppress

o = Evaluate and Add Index Operand 1 = Suppress Index Operand Base Displacement Size

00 = Reserved 01 = Null Displacement 10 = Word Displacement 11 = Long-Word Displacement Indexllndirect Selection

Indirect and Indexing Operand Determined in Conjunction with Bit 6, Index Suppress

*Memory indirect addressing will cause illegal instruction trap; must be = 000 if IS = 1

Figure 3-2. Effective Address Specification Formats EA modes can be classified as follows:

Data A data addressing EA mode refers to data operands.

Memory A memory addressing EA mode refers to memory operands.

Alterable An alterable addressing EA mode refers to writable operands.

Control A control addressing EA mode refers to unsized memory operands Categories are sometimes combined, forming new, more restrictive, categories.

Two examples are alterable memory or alterable data. The former refers to addressing modes that are both alterable and memory addresses; the latter refers to addressing modes that are both alterable and data addresses. Table 3-1 shows categories to which each of the EA modes belong.

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MOTOROLA 3-13

III

III

3.5 Programming View of Addressing Modes

Extensions to indexed addressing modes, indirection, and full 32-bit displacements provide additional programming capabilities for the CPU32. The following paragraphs describe addressing techniques and summarize addressing modes from a programming paint of view.

Table 3-1. Effective Addressing Mode Categories

Addressing Mode Data Register Direct Address Register Direct Address Register Indirect Address Register Indirect

with Postincrement Address Register Indirect

with Predecrement Address Register Indirect

with Displacement Address Register Indirect

with Index

(8-Bit Displacemment) Address Register Indirect

with Index

(Base Displacement) Absolute Short Absolute Long

Program Counter Indirect with Displacement Program Counter Indirect

with Index (8-Bit Displacement) Program Counter Indirect

with Index

(Base Displacement) Immediate

MOTOROLA 3-14

Code Register Data Memory Control Alterable Syntax

000 reg. no. X

-

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