The MULTIBUS tr bus architecture consists of sh buses, as shown in Fture 12-1:
. The Parallel System Bus (iPSB) is a high-performance, general purpose, 32 bit bus that provides system data movement and interprocessor communication facilities. It can be thought of as the "message passing', bus.
. The Local Bus Extension (iLBX IIì is afi extension of the on-board processor bus that provides arbitration-ùee, high banóridth access to local memory.
. The Sedal Svstem Bus (iSSB) is a low-cost, one-bit alternative to the ipSB bus that adds flexíbility lo meet the requiremerits of a wide range of systems.
. The MULTICHANNEL DMA I/O Bus is retained from the MULTIBUS I bus architecture. It allows high-speed block transfers of data over the shared data path between custom peripherals and single board computers.
. The iSBX I/O Bxpansion Bus is retained from the MULTIBUS I bus architecture. It allows incremental board expansion throùgh the addition of small iSBX
MULTIMODULE boards.
. The BITBUS Interconnect is a serial bus, optimized for the high-speed transfcr of short coflîrol messages and implemented as a pair of twisted wires.
In additioo to the six buses, the MULTIBUS Il bus architecture consisrs of four seDarare address spaces:
. Message address space is the range of addresses that iderti$' all ipSB agents that send and receive messages. Each agent is assigned a one-byte message address that
uniquely identilies that board in the system. The term ,'host ID" is used interchangeably with the term message address.
. Interconnect address soace is a set of 512 byte-wide registers that provide
identification and conliguration information for each message-passing agent. Each board contains its own set of interconnect registers.
. l/O address soace is the I/O poft address range that serves as a system-wide iiterface îo terminal cootrollers, mass storage devices, and other peripheral devices.
. Memorv address space is the address range for storing and retrieving data and code.
A MULTIBUS II system can have up to 4 gigabytes of memory. Each
Extended iRMX tr agent can have up to 16M bytes of memory for its own use.
Nucleus Uset's Guide 12.3
EXTENDED iRMX@ II MULTIBUS@ II SYSTEMS
x - 5 7 1 4
Figure l2-I. Simplilied MULTIBUS- II Bus Architectùre M U L T I C H A N N E L T M D M A 8 u s
l/OController
i L B ) C ! ll B u s
E I T B U S ' *
12.4.1 Central Services Module (CSM)
The iSBC CSM/001 Central Services Module, or CSM, is an agent that coordinates certain system-level seflices and Îunction$ common to all agents. The CSM board must be present tur every MULTIBUS II sysîem and must be installed in cardslot 0 of the backplane. The CSM board provides these system services:
. It generates, on power-up or cold reset, the re!qeg93dd!9!S9! (qqalsle|lD) and arbitration numbers (arbitraîion IDs) fot all agents connected to the iPSB bus.
. It provides a central source for the iPSB clock signals (BCLK* and CCLK*).
. It generates system wide reset signals on power-up (RST*), cold reset (CRST*), or warm reset (WRST*).
. It moniton timeout error mnditions and genemtes the timeoùt error (TIMOUT*).
. It mainîains the system wide, battery backed-up, global time-of-day clock.
* A hardware siglal that is active when low (0 volts.)
12.4 Nucleus Uset's Guide
EXTENDED iRMP II MULITIBUS@ T SYSTEMS
12.4,1.1 Global Time-of-Day Clock
The CSM board maintains an on-board, banery backed-up global time-of-day clock. This clock is used by every agent ill the system that requftes a clock. Agents in the system can maintain a local time-of-day clock that is a copy of the global clock, Both the global and local clocks keep track of:
. the curent day (day, month, and year)
. The current time (hoùrs, minutes, and se.onds)
The two tlpes of clocks are necessary beqruse accessing the global clock takes much longer than accessing a local clock. Each agent with a local clock accesses the global clock only on system reset or at the request of the user.
TWo Basic I/O rystem calls allow your application to read or set the global clock. See the Extendad iRMX II Basîc I/O Estem Ca s Referchce Manual îoî informulion on these calls, Two Ext€nded iRMX II Human Interface commands (DATE and TIME) can be used to read or set the global clock from a terminal (for the super user only.) See the Operator,s Guidz To Thz E tend,ed íRMX II Humqn Inteìface for infomation on these commands.
12.4.2 Interconnect Address Spacè
On each MULTIBUS II agent is an area called the interconnect space or interconnect registers. This space is a set of 512 8-bit registe$ used for dynamic software.controlled initialization, configuration, testing, and error diagnosis. Part of their function can be described as electronic jumpels. With a MULTIBUS II board the board configuration is changed by writing value; into interconnect registers, not by installhg or removing physical jumper conrìections, Each interconnect register is addressable by its own 16-bit interconnect addre^ss (interconriect ID) The interconnect ID consists of the cardslot ID of the agent (0 through 19 for iPSB cardslots, 24 through 29 for iLBX II cardslots, and 3 1 lor the host processor board) and the interconnect register number (0 thîough 511).
Interconnect registers 0 and 1 conîain the Intel-assigoed vendor ID for the vendor of the particular board. The vendor ID is read-only; wlite operations to these two registe$ are ignored. Interconnect registers 2 through 511 contain such board specific attribùtes as board ID, revision number, cardslot ID, type ofboard (e.g. processor, I/O controller), and iPSB starting and ending addresses. The contents of these registers are board-dependent.
Register values are read and modified through the interconnept address space. Refer to the board's hardware reference manual for details on intefcoonect register usage.
Nùcleus Uset's Guide 12-5
EXIENDED iRMX6II MULTIBUSo II SYSTEMS
During power-up or cold reset and through each board's interconnect address space, the Bootstrap Loader, the Root Job, and the system monitor can automatically configure îhe boards in the system to the corfiguration you choose. During power-up the system monitor can initialize any read/write intermnnect registeîs. Two system calls are
provided that allow programs to dynamically read (get) or wdte (set) the conteots of any interconnect register on any board in the systefi. See the E$enàcd |RI'ÍX II Nu.leui System Calls Reference Manual Íor tnfotmalion on these system calls.
12.4.3 Built-ln Self Tests (BIST)
Each board in a MULTIBUS Il system contains a set of firmware-based diagnostic tests
that, on po$rer-up, does some inte.nal checking and assigns a "go" or lno-gort condition to
the board based on the results of the test. These tests are called the Built-In Self Tests or BIST.
On power-up, or cold reset, each board's BIST automatically invokes its initialization checks and diagnostic t€sts. If successful, the BIST initializes tbe board to a predefined state and clears its RSTNC* (reset-not-complete) signal. Hovr'ever, if a test fails, the BIST assesses a "no-go" condition, flags the error, and ceases initialization of that board. After an error, the BIST Test ID registe. (in the board's interconnect space) contains the nùmber of the test that failed, so the problem can be idenîfied and corrected.
12.4.4 The MULTIBUS@ ll Message Passing Hardware and Message
The entire MULTIBUS II architecture of six buses and four qpes of address space was designed to perform the function of sending data bet\reen agents through one of the local buses in a traditional manner, or over one of the message passing buses in the form of packets of iniormation called messages. A MULTIBUS II message is a variable length seqùence of b'4es (called a packet) that provides a means for one bùs agent to
communicate with another. All the information needed to know which age[t sent the message and what the sending agent wants is stored in the first "packet."
Each agent on the bus has a Message Passing Coprocessor (MPC) chip that performs the message passing functions. When a message comes across the bus, each agent cheaks a portiol of the message header that contaìns the message address of the destination agent.
It compares the destination address with iîs own agent ID, if they match it retrieves the entire message packet ftom the bus. If the addresses do not match the message is i8rìored.
When a message is retdeved from the bus, more bytes are examiÍed to determrne:
. The agent lD of the sending board.
. Is îhis message a reply to a previous message or is it a new communication being started bv another asent.
12-6 Nucleus Usels Guide
EXTENDED iRMX@ II MIJLTIBUS@ II SYSTEMS
. Which port on the board is to receive the message?
. Is a response necessary?
. Are more "packeîs" coming that are part of the same message?
Figure 12-2 sho$'s a simplified MULTIBUS II message packet. Although the specific format of messages is different for different types of messages, blocks of bytes can be identified by what part of the entire system reads and uses those bytes.
4 B Y T E S
1 2 B Y T E S
1 6 B Y T E S
U s e d b y M P C
U s e d b y
N u c l e u s C o m m u n i c a t i o n s S e r v i c e
A v a i l a b l e f o r u s e b y u s e r a p p l i c a t i o n s
Optional data part l6M bytes-1 maximum length
w.0304
Figùe U-2. A Sinplified MULTIBUS@ II Message