Floating-point numbers have a 32-bit (short) format, a 64-bit (long) format, or a 128-bit (extended) format. Numbers in the short and long formats may be designated as operands both in storage and in the floating-point registers, whereas operands having the extended format can be designated only in the floating-point registers.
The floating-point registers contain 64 bits each and are numbered 0, 2, 4, and 6. A short or long floating-point number requires a single
floating-point register. An extended floating-point number requires a pair of these registers: either registers 0 and 2 or register 4 and 6; the two register pairs are designated as 0 or 4, respectively.
When the R 1 or R2 field of a floating-point instruction designates any register number other than 0, 2, 4, or 6 for the short or long format, or any register number other than 0 or 4 for the extended format, the operation is suppressed, and a program interruption for specification exception occurs.
Short F1oating-Point Number
=ls=l=c=h=a=r=a=c=t=e=r=i=st==iC==1
==6=-=D=i=9=i=t=~=r=ac==t=io=n===
o 8 31
Long F1oating-Point Nmber
~r---~~---/---~
S Characteristic 14-Digit Fraction
~~---~----~---/---~
o
8 63(
Extended Floating-Point Number High-Order Part
rlr---r---/---High-Order
S Characteristic Leftmost 14 Digits of 28-Digit Fraction
~---~---/---~
o 8 63
Low-Order Part
Low-Order Rightmost 14 Digits
I
r.---~---/---~
S Characteristic of 28-Digit Fraction
~---~---/---~
64 72 127
In all formats, the first bit (bit 0) is the sign bit (S). The next seven bits are the characteristic. In the short and long formats, the remaining bits constitute the fraction, which consists of six or 14 hexadecimal digits, respectively.
A short floating-point number occupies only the leftmost 32 bit positions of a floating-point register.
The rightmost 32 bit positions of the register are ignored when used as an operand in the short format and remain unchanged when a short result is placed in the register.
An extended floating-point number has a 28-digit fraction and consists of two long floating-point numbers which are called the high-order and low-order parts. The high-order part may be any long floating-point number. The fraction of the high-order part contains the leftmost 14 hexadecimal digits of the 28-digit fraction. The characteristic and sign of the high -order part are the characteristic and sign of the extended floating-point number. If the high-order part is normalized, the extended number is considered normalized. The fraction of the low-order part contains the rightmost 14 digits of the 28-digit fraction. The sign and characteristic of the
low-order part of an extended'operand are ignored.
When a result in the extended format is placed in a register pair, the sign of the low-order part is made the same as that of the high-order part, and, unless the result is a true zero, the low-order characteristic is made 14 less than the high-order characteristic. When the subtraction of 14 would cause the low-order characteristic to become less than zero, the characteristic is made 128 greater than its correct value. Exponent underflow is indicated only when the high-order characteristic underflows.
When an extended result is made a true zero, both the high-order and low-order parts are made a true zero.
The range covered by the magnitude (M) of a normalized floating-point number depends on the format.
In the short format:
16 65 ~ M ~ (1 - 16 6) x 1663 In the long format:
16 65 ~ M ~ (1 - 16 14) x 1663 In the extended format:
16 65 ~ M ~ (1-16 28) x 1663 In all formats, approximately:
5.4 x 10 79 ~ M ~ 7.2 x 1075 Although the final result of a floating-point operation has six hexadecimal fraction digits in the short format, 14 fraction digits in the long format, and 28 fraction digits in the extended format intermediate results have one additional ' hexadecimal digit on the right. This digit is called the guard digit. The guard digit may increase the precision of the final result because it participates . in addition, subtraction, and comparison operations
and in the left shift that occurs during normalization.
The entire set of floating-point operations is available for both short and long operands. These instructions generate a result that has the same format as the operands, except that for
MUL TIPL Y, a long product is produced from a short multiplier and multiplicand. Extended floating-point instructions are provided only for normalized addition, subtraction, and
I
?Iultipli~ation. Two additional multiplication InstructIOns generate an extended product from a long multiplier and multiplicand. The rounding instructions provide for rounding from extended to long format and from long to short format.Programming Notes
1. A long floating-point number can be converted to the extended format by appending any long floating-point number having a zero fraction, ihcluding a true zero. Conversion from the extended to the long format can be
accomplished by truncation or by means of LOAD ROUNDED.
Chapter 9. Floating-Point Instructions 9-3
2. In the absence of an exponent overflow or exponent underflow, the long floating-point number constituting the low-order part of an extended result correctly expresses the value of the low-order part of the extended result when the characteristic of the high-order part is 14 or higher. This applies also when the result is a true zero. When the high-order characteristic is less than 14 but the number is not a true zero, the low-order part, when addressed as a long floating-point number, does not have the correct characteristic value.
3. The entire fraction of an extended result participates in normalization. The low-order part alone mayor may not appear to be a normalized long floating-point number, depending on whether the 15th digit of the normalized 28-digit fraction is nonzero or zero.
Instructions
The floating-point instructions and their
mnemonics, formats, and operation codes are listed in the figure "Summary of Floating-Point
Instructions." The figure also indicates when the condition code is set and the exceptional conditions in operand designations, data, or results that cause a program interruption.
9-4 IBM 4300 Processors Principles of Operation
Mnemonics for the floating-point instructions have an R as the last letter when the instruction is in the RR format. For instructions where all operands are the same length, certain letters are used to represent operand-format length and normalization, as follows:
E short normalized U short unnormalized D long normalized W long unnormalized X extended normalized
Note: In the detailed descriptions of the individual instructions, the mnemonic and the symbolic operand designation for the assembler language are shown with each instruction. For a
register-to-register operation using LOAD (short), for example, LER is the mnemonic and R j,R 2 the operand designation.
Mne- Op
Name monic Characteristics Code
ADD NORMALIZED (extended) AXR RR C SP EU EO LS 36
ADD NORMALI ZED ( long) ADR RR C SP EU EO LS 2A
ADD NORMALIZED ( long) AD RX C A SP EU EO LS 6A
ADD NORMALIZED (short) AER RR C SP EU EO LS 3A
ADD NORMALIZED (short) AE RX C A SP EU EO LS 7A
ADD UNNORMALIZED ( long) AWR RR C SP EO LS 2E
ADD UNNORMALIZED ( long) AW RX C A SP EO LS 6E
ADD UNNORMALIZED (short) AUR RR C SP EO LS 3E
ADD UNNORMALIZED (short) AU RX C A SP EO LS 7E
COMPARE (long) CDR RR C SP 29
COMPARE (long) CD RX C A SP 69
COMPARE (short) CER RR C SP 39
COMPARE (short) CE RX C A SP 79
DIVIDE (long) DDR RR SP EU EO FK 2D
DIVIDE (long) DD RX A SP EU EO FK 6D
DIVIDE ( short) DER RR SP EU EO FK 3D
DIVIDE (short) DE RX A SP EU EO FK 70
HALVE (long) HDR RR SP EU 24
HALVE (short) HER RR SP EU 34
LOAD (long) LOR RR SP 28
LOAD (long) LD RX A SP 68
LOAD (short) LER RR SP 38
LOAD (short) LE RX A SP 78
LOAD AND TEST ( long) LTDR RR C SP 22
LOAD AND TEST (short) LTER RR C SP 32
LOAD COMPLEMENT (long) LCDR RR C SP 23
LOAD COMPLEMENT (short) LCER RR C SP 33
LOAD NEGATIVE (long) LNDR RR C SP 21
LOAD NEGATIVE (short) LNER RR C SP 31
LOAD POSITIVE (long) LPDR RR C SP 20
LOAD POSITIVE (short) LPER RR C SP 30
LOAD ROUNDED (extended to long) LRDR RR SP EO 25
LOAD ROUNDED (long to short) LRER RR SP EO 35
MULTIPLY (extended) MXR RR SP EU EO 26
MULTIPLY (long) MDR RR SP EU EO 2C
MULTIPLY ( long) MD RX A SP EU EO 6C
MULTIPLY (long to extended) MXDR RR SP EU EO 27
MULTIPLY (long to extended) MXD RX A SP EU EO 67
MULTIPLY (short to long) MER RR SP EU EO 3C
MULTIPLY (short to long) ME RX A SP EU EO 7C
STORE (long) STD RX A SP ST 60
STORE (short) STE RX A SP ST 70
SUBTRACT NORMALIZED (extended) SXR RR C SP EU EO LS 37 SUBTRACT NORMALIZED ( long) SDR RR C SP EU EO LS 2B SUBTRACT NORMALIZED ( long) SD RX C A SP EU EO LS 6B SUBTRACT NORMALIZED (short) SER RR C SP EU EO LS 3B SUBTRACT NORMALIZED (short) SE RX C A SP EU EO LS 7B SUBTRACT UNNORMALIZED (long) SWR RR C SP EO LS 2F SUBTRACT UNNORMALIZED (lon'g) SW RX C A SP EO LS 6F SUBTRACT UNNORMALIZED (short) SUR RR C SP EO LS 3F SUBTRACT UNNORMALIZED (short) SU RX C A SP EO LS 7F
Explanation:
A Access exceptions C Condition code is set EO Exponent-overflow exception EU Exponent-underflow ,exception FK Floating-paint-divide exception LS Significance exception
RR RR instruction format RX RX instruction format SP Specification exception ST PER storage-alteration event Summary of Floating-Point Instructions
Chapter 9. Floating-Point Instructions 9-5