PROGRAMMER'S CONSOLE
5.2 CONSOLE CONTROLS
5.3 DATA SWITCHES (0 THROUGH 15)
The 16 data switches are used to enter data or in-structions into the computer either manually or under program control. These are two-position
Figure 5-1. Programmer's Console
5-1
Paragraphs 5.4 to 5. 7 88A00026A toggle switches with the upper position representing
a binary
a
and the lower position, a binary 1. The switches are arranged in groups of four for ease of working with hexadecimal notation and are numbered to correspond with the bit positions of the computer registers and memory locations.Information is entered into the computer from the data switches in any of three ways:
a. The information set into the data switches can be entered into 1 of 18 registers by momentarily pressing the ENTER switch. The register into which the data is entered is specified by the REGISTER can be entered into the accumulator under program control by executing an XIO instruction with a Sense Console Data Switches IOCC (paragraph 4.3).
c. The information set into the data switches can be entered into a specified memory location under program control by executing an XIO instruc-tion with a Read Console Data Switche s IOCC B-register, the information copied into the specified register is simultaneously copied into the B-register. The M- and
Pressing the STEP switch with the RUN-IDLE switch set to IDLE and the SINGLE CYCLE switch set to the upper (off) position causes the computer to execute one complete instruction and then return to idle lower pOSition for single cycle operation.
The STEP switch is extremely useful in evaluating program or processor operation by stepping through a program one instruction or one cycle at a time while observing console indications.
5.6 RUN·IDLE SWITCH
5.7 REGISTER SELECT SWITCHES
The four REGISTER SELECT switches (8, 4, 2, 1) are used to select anyone of 16 operational registers within the computer. The contents of the selected register are displayed by the 16 register display lamps above the data switches and can be altered using the data switches and the ENTER switch. The REGISTER SELECT switches are two-position toggle switches with the upper position representing a binary
a
and the lower position, a binary 1. They88A00026A Paragraphs 5. 8 to 5. 11
Switch Setting
842 1 Register Selected
o
100 A-registero
1 0 1 Q-registero
1 1 0 CARlo
1 1 1 SCRI100 0 CAR2
100 1 SCR2
1 0 1 0 CAR3
101 1 SCR3
1 100 CAR4
1 101 SCR4
1 1 1 0 CARS
1 1 1 1 SCR5
5.8 0, M, L, 0 SWITCHES
The four switches labeled B I M,L I and 0 are used to display the contents of the buffer (B) register I
memory data (M) register I memory addres s (L) regis-ter I or operation (O) register in the register display lamps above the data switches. When the operation register or the buffer register is selected for display, its contents can be changed using the data switches and the ENTER switch.
These four switches are two-position toggle switches with the upper position off and the lower position on. They are interlocked in the order 0, B 1M, L;
that is I switches B 1M, and L are inoperable when switch 0 is on; switches M and L are inoperable when switch B is on I and switch L is inoperative when switch M is on. All four of the se switche s must be off for the REGISTER SELECT switche s to be operable.
5.9 SAVE 0 SWITCH
The SAVE 0 switch is used to prevent the contents of the operation register from being changed during the singie step execution of an instruction in idle mode. It is a two-position toggle switch with the upper position off and the lower pOSition on. It is operable only when the computer is in idle mode I the CONSOLE ENABLE switch is unlocked I and the HALT switch is in the lower (on) position.
The SAVE 0 switch is used primarily to display the contents of sequential locations in memory from the console or to store information into sequential loca-tions in memory from the console. To gain acces s to a block of locations in memory require s that the proper instruction (Load Accumulator or Store Accu-mulator) be placed in the operation register while the instruction register is continuously incremented.
The SAVE 0 switch prevents the instruction in the operation register from being lost each time the in-struction register is advanced.
NOTE
The operation register is modified during the execution of shift I multiply I divide I and MDX modify memory instructions regardless of the setting of the SAVE 0 switch.
The procedures for storing information into sequen-tial locations in memory and for displaying the contents of sequential locations in memory from the programmer's console are de scribed in paragraphs 5.39 and 5.40 respectively.
5.10 TRACE SWITCH
The TRACE switch is a two-position toggle switch operable only when the CONSOLE ENABLE switch is unlocked. When the switch is set to the lower position (on) I a trace interrupt occurs after the exe-cution of each instruction except an XIO I BSI I or BOSe (skip or Jump) instruction. Since the trace interrupt has the lowest priority of all interrupts I it cannot be accepted while other interrupts are being serviced. Once accepted I it cause s the pro-cessor to execute a forced BSI instruction which transfers program control to the routine whose
start-ing address is stored in memory location X' 0009' . No other trace interrupts can occur until the trace interrupt has been cleared by a BOSC instruction.
5.11 HALT SWITCH
The HALT switch is used to inhibit the operation of the interval timers I direct memory data channels I
and interrupts. If the switch is set to the lower position (on) while an operation is in progress I
the operation continue s to completion I but further operations are then inhibited.
This two-position toggle switch is operable only when the CONSOLE ENABLE switch is unlocked and the RUN-IDLE SWitch is set to IDLE. The HALT switch must be in the lower position for the SINGLE CYCLE I RESET I and SAVE 0 switches to be operative.
5-3
Paragraphs 5.12 to 5.22 88A00026A 5.12 SINGLE CYCLE SWITCH
The SINGLE CYCLE switch is used during single step operations to stop instruction execution after one memory cycle. If the switch is in the upper (off) position when the STEP switch is pressed while the computer is in idle mode, the computer executes one complete instruction and then stops. If the switch is in the lower (on) position when the step operation is performed, the computer executes one memory cycle of the instruction and then stops.
The SINGLE CYCLE switch also determines the point at which the computer stops when the RUN-IDLE switch is moved from RUN to RUN-IDLE while the computer is executing a program. Placing the com-puter in idle mode with the SINGLE CYCLE switch off stops operation at the end of the current instruc-tion. Entering idle mode with the SINGLE CYCLE switch on stops operation at the end of the current memory cycle.
The SINGLE CYCLE switch is operable only when the CONSOLE ENABLE switch is unlocked, the HALT switch is in the lower (on) position, and the RUN-IDLE switch is set to RUN-IDLE.
5.13 IPL (INITIAL PROGRAM LOAD) SWITCH
The use of the IPL (initial program load) switch is described in the manuals for I/O devices with IPL ability.
5.14 SPO (STORAGE PROTECT OVERRIDE) SWITCH
The SPO (Storage Protect Override) switch is used to enable writing into protected memory locations.
When the switch is in the lower (on) pOSition and the WSPB (Write Storage Protect Bits) switch is unlocked, the storage protection circuits are deactivated.
5.15 CONSOLE INTERRUPT SWITCH
The CONSOLE INTERRUPT switch permits program operation to be interrupted from the programmer's console. Pressing the switch causes an interrupt
" request on the level to which the console interrupt , is aSSigned. (The console interrupt is not
preas-signed to any particular level and can be aspreas-signed to fit the application.)
5.16 RESET SWITCH
The RESET switch is used to reset the operating con-ditions of the computer and all I/O devices. It is 5-4
spring-loaded to return to the upper pOSition and is
op~rable only when the CONSOLE ENABLE switch is unlocked and the HALT and RUN-IDLE switches are in the lower position. PreSSing the switch resets the system and inhibits all external interrupt levels by setting all bits of the interrupt mask register to 1.
"5.17 WSPB (WRITE STORAGE PROTECT BIT) SWITCH
The WSPB (Write Storage Protect Bit) switch is used to enable the writing or clearing of the memory stor-age protection bits. It is a key-operation, two-position switch. The switch must be unlocked
(clockwise) to permit the storage protection bits to be changed. The key can be removed from the switch when it is either locked or unlocked.
5.18 CONSOLE ENABLE SWITCH
The CONSOLE ENABLE switch is used to enable or disable all controls (except the data switches and POWER, CONSOLE INTERRUPT, and REGISTER SELECT switches) on the programmer's console.
It is a two-posi tion, key-operated switch. The swi tch must be unlocked (clockwise) to enable the console controls. The key can be removed from the switch with the switch either locked or unlocked.
5.19 POWER SWITCH
The POWER switch controls the application of ac power to the computer. It is a two-position toggle switch.