over the useof TRl and TFl from Timer 1. Thus THO Timer 1 in Mode 3 simply holds its count. The effect is now controls the Timer 1 interrupt.
the same as setting TR1 = O.
Mode 3 is provided for applications requiring an extra Timer O in Mode 3 establishes TLO and THO as two 8-bit timer or counter. When Timer O is in Mode 3, separatecounters. Tlse logic for Mode 3 on Timer Ois Timer 1 can be turned on and off by switching it out of she–m in Figure 11. TLOusea the Timer Ocontrol bits: and into its own Mode 3, or can still be used by the C/T, GATE, TRO,INTO, and TFO.THOis locked into serial port as a baud rate generator, or in any
applica-tion not requiring an interrupt.
5-14
intele
8XC51FXHARDWAREDESCRIPTIONOsc — -12
IJ
,X.N2CE” ‘ ‘COJTROL ‘“=” “V’’’’owi ‘x h
INTERRUPT
TRx RELOAD
GATE
I (elk)
~ PIN x= owl
27065S-7
Figure 10. Timer/Counter 1 Mode 2 8-Bit Auto-Reload
E1-El--’’12f0sc
lllzfo’~
~b * TLo - INTERRUPT
.p,.~cf~’l I ~
(8Bib)
CONTFIOL OVERFLOW
TRO
GATE
~ PIN
1/12 f“= l~i
: INTERRUPT
*
CONTFIOL
TR1
OVERFLOW
270S5S-8 Figure 11. ~mer/Counter 0 Mode 3: Two S-BitCountere
5.2
Timer 2Timer2 is a16-bit Timer/Counter which can operate either as a timer or as an event counter. This is selected by bit Cm in the Speoial Function Register T2CON cable 8). It has three operating modes: capture, auto-relosd (up or down counting), and b+mdrate generator.
The modes are selected by bits in T2CON as shown in Table 7.
Tablei RCLK+ TCLK
o
0
1
x
Timer 2 Operating Modes cP/m T2”OE TR2 Mode
o 0 1 I&Bit 1
x o
o x
1
1 1 1
Auto-Reload 16-Bit Capture Baud-Rate Generator Clock-Out
‘on PI.0
in~e
8XC51FX HARDWARE DESCRIPTIONTable 8. T2CON: Timer/Counter 2 Control Register T2CON
Svmbol
Address= OC8H ResetValue= 0000OOOOB
Bit Addressable
I TF2 EXF2 RCLK TCLK EXEN2 TR2 cl= cPlm
Bit 7 6 5 4 3 2 1 0
Function TF2
EXF2
RCLK TCLK EXEN2 TR2 c/E
cP/m
Timer2 overflowflagsetbya Timer2 overflowand mustbeclearedby software.TF2will notbesetwheneitherRCLK= 1 or TCLK= 1.
Timer2 externalflagsetwheneithera captureor reloadiscausedby a negativetransition onT2EXandEXEN2= 1.WhenTimer2 interruptis enabledEXF2= 1 will causethe CPU to vectorto the Timer2interrupt routine. EXF2mustbe clearedbysoftware.EXF2doesnot causean interruptin up/downcountermode(DCEN= 1).
Receiveclockflag.Whenset,causesthe serialportto useTimer2 overflowpulsesfor its receiveclockin serialport Modes1 and3. RCLK= OcausesTimer1 overflowto be used for the receiveclock.
Transmitclockflag.Whenset,causesthe serialportto useTimer2overflowpulsesfor its transmitclockin serialportModes1 and3. TCLK= OcausesTimer1 overflowsto be used for thetransmitclock.
Timer2 externalenableflag.Whenset,allowsa captureor reloadto occuras a resultof a negativetransitionon T2EXif Timer2 is not beingusedto clocktheserialport.EXEN2= O causesThmer2 to ignoreeventsatT2EX.
Start/stopcontrolforTimer2.A logic1 startsthe timer.
Timeror counterselect.(Timer2)
O= Internaltimer(OSC/12or OSC/2in baudrategeneratormode).
1 = Externaleventcounter(fallingedgetriggered).
Csoture/Reloadflaa.Whenset.cattureswill occuron neaativetransitionsat T2EXif EXEN2 = 1.When;leared,aut&eloadswill occureitherfiith Timer2 overflowsor negativetransitionsat T2EXwhenEXEN2= 1.WheneitherRCLK= 1 or TCLK= 1,this bitis ignoredandthetimerisforcedto auto-reloadonTimer2 overflow.
CAPTURE MODE 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be used to generate In the cmtrsre mode there are two oDtions selected bv SDinternmt.If EXEN2 = 1, Timer 2 still does the bitEXEN2 in T2CON. If EXEN2 ~ O, Timer 2 is ~ above,bu;with the added f~ture that a l-to-O
tran-CAPTURE TRANSITION
T
llMER 2 IN7ERRUPT
T22X PN
+! !~ 2xF2
CONTROL DZN2
270653-9
Figure 12. llmer 2in Capture Mode 5-16
8XC51FXHARDWAREDESCRIPTION
sition at extermd input T2EX causea the current value in the Timer 2 registers,TH2 and TL2, to be captured into registersRCAP2H and RCAP2~ respectively. In addition, the transition at T2EX eausea bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, ean generate an interrupt. The capture mode is illustrated in Figure
12.
AUTO-RELOAD MODE (UP OR DOWN COUNTER)
defauh to count up. When DCEN is set, Timer 2 ean count up or down depending on the value of the T2EX pin.
Figure 13 showsTimer 2 automatically counting up when DCEN = O. In this mode there are two options seleeted by bit EXEN2 in T2CON. If EXEN2 = O, Timer 2 counts up to OFFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in RCAP2H and Timer 2 can be progrsmmedtoemmtup or down when RCAP2L are preset by software.If EXEN2 = 1, a 16-eonfigured in its 16-bit auto-reload mode. This feature bit reload can be triggeredeither by an overtlow or by a is invoked by a bit named DCEN (Down CmrnterEn- l-to-o transition at external input T2EX. This tran-able) located in the SFR T2MOD (see Table 9). Upon sition also sets the EXF2 bit. Either the TF2 or EXF2 reset the DCEN bit is set to O w that Timer 2 will bit can generate the Timer 2 interrupt if it is enabled.
Table 9. T2MOD:Timer 2 ModeControl Register
I
I
T2MOD Address = OC9H ResetValue= XXXXXXOOBI
Not Bit AddressableI — — — — — —
T20E DCENBit 7 6 5 4 3 2 1 0
Symbol Function
— Notimplemented,reservedfor futureuse.*
T20E Timer2OutputEnablebit.
DCEN DownCountEnablebit.Whenset,thisallowsTimer2 to be configuredasan up/down counter.
‘User software should not write 1s to reserved bits.These bitemaybe used in future8051 familyproductsto invoke new featurea.In that case, the reset or inaetivsvalue of the new bit will be O,and its activevaluewillbe 1. The value read from a reservedbit is indeterminate.
OVSSFLOW
TR2 RELOAD
7SANSITION OETEC7YJN
1 A.
T2EXPIN
~x~~ EXF2
CONTROL
nws2
IN7ESRUPT
EXiN2
2706S-10
Figure 13. Timer 2 Auto Rslosd Mode (DCEN = O)
in~.
8XC51FXHARDWAREDESCRIPTIONBetting the DCEN bit enables Timer 2 to count up or down as shown in Figure 14. In this mode the T2EX pin controls the direction of count. A logic 1 at T2EX makes Timer 2 count up. The timer will overtlow at OFFFFH and set the TF2 bit which can then generate an interrupt ifit is enabled. This overflow also causes a the 16-bit vrdue in RCAP2H end RCAP2L to be re-loaded into the timer registers, TH2 and TL2, respec-tively.
A logic O at T2EX makes Timer 2 count down. Now the timer undertows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L. The under-flow sets the TF2 bit and causes OFFFFH to be reload-ed into the timer registers.
The EXF2 bit toggles whenever Timer 2 overflows or underflows. This bit can be used es a 17th bit of resolu-tion if desired. In this operating modq EXF2 does not generate en interrupt.
BAUD RATE GENERATOR MODE
Thebaud rate generatormode is selected by setting the RCLK end/or TCLK bits in T2CON. Timer 2 in this mode will be described in conjunction with the serial port.
PROGRAMMABLE CLOCK OUT
A 50%duty cycle clock can be programmed to come out on P1.O. This pin, besides being a regular 1/0 pin, has two alternate functions. It can be programmed (1) to input the external clock for Timer/Counter 2 or (2) to output aso~o duty cycle clock ranging from 61 Hz to 4 MHz at a 16 MHz operating frequency.
To configure the Timer/Counter 2 as a clock generator, bit Cf12 (in T2CON) must be cleared end bit T20E in T2MOD must be set. Bit TR2 (T2CON.2) also must be set to start the timer (see Table 6 for operating modes).
The Clock-out frequency depends on the oscillator fre-quency and the reload value of Timer 2 capture regis-ters (RCAP2H, RCAP2L) es shown in this equation:
Clock-outFrequency =
OscillatorFrequency 4 X (65536 - RCAP2H,RCAP2L)
In the Clock-Out mode Timer 2 redl-overswill not gen-erate err interrupt. This is similar to when Timer 2 is used as a baud-rate generator.It is possible to use Tim-er 2 as a baud-rate genTim-erator and a clock genTim-erator simultaneously. Note, however, that the baud-rate end Clock-out frequencies cannot be determined indepen-dently of one snother since they both use the values in RCAP2H and RCAP2L.
6.0
PROGRAMMABLE COUNTER ARRAYThe Pw=-ble count~ AITSYfJ’W e-ists of a 16-bit timer/camter end five 16-bit compare/cepture modules es shown in Figure 15a.The PCA timer/cmur-ter serves as a common time base for the five modulea end is the only timer which can service the PCA. Its clock input cartbe prograrnmed to count any one of the following signals:
● oscillator frequency + 12
● oscillator frequency + 4
● Timer OOVdOW
● external input on ECI (P1.2).
Each compere/cspture mcdule can be programmed in any one of the following modes:
. rising rind/or falling edge capture
● softwere timer
● high speed output . pulse width modulator.
Module 4 can also be programmedas a watchdog tim-er.
When the compere/cspture modules are programmed in the capture mod%software timer, or high speed
out-put mode, an interrupt can be generated when the