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MEMORY STRUCTURE

Dans le document 1983 186 188 (Page 39-42)

ARCHITECTURE AND INSTRUCTIONS

3.4 MEMORY STRUCTURE

The memory and input/output space of the 8086,88 and 80186,188 are treated in parallel and are collec-tively referred to as the memory structure. Code and data reside in the memory space, while (non-memory-mapped) peripheral devices reside in the I/O space. This section describes how memory is functionally organized and used.

Memory Space

The memory in an 8086,88 and 80186,188 system is a sequence of up to one million (I,048,576) bytes. A word is any two consecutive bytes in memory (word alignment is not required). Words are stored in memory with the most significant byte at the higher memory address.

The memory can be conceived of as an arbitrary number of segments, each containing a maximum of 64K bytes. The starting address of each segment is evenly divisible by 16 (the four least significant ad-dress bits are 0). At any moment, the program can immediately access the contents of four such segments:

1) the current code segment 2) the current data segment 3) the current stack segment 4) the current extra segment

Each of these segments can be identified by placing the 16 most significant bits of the segment's starting address into one of the four 16-bit segment registers. Instructions can refer to bytes or words within a segment by using a 16-bit offset address.

The processor constructs the 20-bit byte or word dress automatically by adding the 16-bit offset ad-dress (also called the logical adad-dress) to the contents of a 16-bit segment register, with four low-order zeros appended (see Figure 3-5).

I

15 LOGICAL ADDRESS

Figure 3-5 How to Address One Million Bytes

Storage Organization

From the storage point point of view, memory spaces are organized as arrays of 8-bit bytes (Figure 3-6). Instructions, byte data and word data may be freely stored at any byte address without regard for alignment, thereby saving memory space by allowing code to b~ densely packed in memory (Figure 3-7).

3-7

lOW MEMORY HIGH MEMORY

OOOOOH 00001H 00002H 5 yFFFFEH FFFFFH

I! ! ! I ! I ! II ! I II ! II 7 07 07 ! II I 115 51) IIII1 ! ! ! III! 07 0

I

I..

1 MEGABYTE ..

I

Figure 3-6 Storage Organization

Figure 3- 7 Instruction and Variable Storage

Word data is always stored with the most-significant byte in the higher memory location (Figure 3-8).

Most of the time this storage convention is transpar-ent to the programmer, except when monitoring the system bus or reading memory dumps.

VALUE OF WORD STORED AT 724H: 5502H

Figure 3-8 Storage of Word Variables

Pointers addressing data and code that are outside the currently-addressable segments are stored as doublewords. The lower-addressed word of a pointer contains an offset value; the higher-addressed word contains a segment base address. By convention, each word is stored with the higher-addressed byte holding the most-significant eight bits of the word (Figure 3-9).

VALUE OF POINTER STORED.AT 4H:

SEGMENT BASE ADDRESS: 3B4CH OFFSET: 65H

Figure 3-9 Storage of Pointer Variables

Segmentation

Programs view memory space as a group of segments defined by the application. A segment is a logical unit of memory that may be up to 64K bytes long.

Each segment is made up of contiguous memory lo-cations and is an independent, separately addressable unit. Every segment is assigned (by software) a base address, which is its starting location in the memory space. All segments start on 16-byte memory boundaries. There are no other restrictions on seg-ment locations. Segseg-ments may be adjacent, disjoint, partially overlapped, or fully overlapped (Figure .3-10). A physical memory location may be mapped

into (contained in) one or more logical segments.

The segment registers point to (contain the base ad-dress values of) the four immediately adad-dressable segments (Figure 3-11). Programs obtain access to code and data in other segments by changing the seg-ment registers to point to the desired segseg-ments.

Every application will define and use segments differently. The currently addressable segments pro-vide a generous work space: 64K bytes for code, a 64K byte stack and 128K bytes of data storage. Many applications can be written to simply initialize the segment registers and then forget them. Larger appli-cations should be designed with careful considera-tion given to segment definiconsidera-tion. This segmented structure of the memory space supports modular software design by discouraging very large, mono-lithic programs. Segments can also be used to advan-tage in many programming situations. An example is the case of an editor for several on-line terminals.

A 64K byte text buffer (say, an extra segment) could be assigned to each terminal. A single program could maintain all the buffers by simply changing uniquely identifies each byte location in the memory space. Physical addresses may range from OH through FFFFFH. All exchanges between the CPU and memory components use this physical address.

Programs, however, deal with logical rather than physical addresses. The use of logical addresses allows code to be developed without prior knowledge of where the code is to be located in memory, and facilitates dynamic management of memory resources.

A logical address consists of a segment base value and an offset value. For any given memory location, the segment base value locates the first byte of the containing segment aod the offset value is the distance, in bytes, of the target location from the beginning of the segment. Segment base and offset values are unsigned 16-bit quantities; the lowest-addressed by~ in a segment has an offset of O. Many different logical addresses can map to the same physical location as shown in Figure 3-12.

Whenever the BIU accesses memory-to fetch an in-struction or to obtain or store a variable-it gener-ates a physical address from a logical address. This is done by shifting the segment base value four bit po-sitions and adding the offset as illustrated in Figure 3-13. This addition process provides for modulo 64K addressing (addresses wrap around from the end of a segment to the beginning of the same segment).

The BIU obtains the logical address of a memory lo-cation from different sources depending on the type of reference that is being made (see Table 3-3).

FULLY

OVEI1LAP~1 SEGMENT D

PARTLY

~DISJOINT OVERLAP~I

Dans le document 1983 186 188 (Page 39-42)