The device

The analytical devices under test have been designed to provide full access to the top and bottom electrode of the dual terminal cell. In order to perform a sufficiently accu-rate sensing of the device, excluding all the resistive contribution from the access lines, we enabled 4-probe measurement (Kelvin sensing) adding two access lines per electrode (Fig. 2.20). Standard bottom electrode is made in AlCu alloy, capped with Ti/TiN layer to improve the adhesion at the plug interface, while the the top electrode is made in copper. The devices under test are single cells, where no selector is co-integrated.

The study of the single PCM cell enables the monitoring of the behavior of the inte-grated phase-change material. All the devices tested along the experiments have been fabricated on 200 mm wafers. The use of single cells devices as test vehicle, enabled the fabrication of a large number of devices on a single wafers, in order to increase the results statistics.

In order to limit and at the same time to acquire the current on the PCM device, a resistance (RLOAD) is put externally, in series with the cell (pull-up configuration Fig. 2.21). The voltage drop on the load resistor during the pulse application, is acquired through an oscilloscope in order to calculate the final current provided to the

Fig. 2.20. Description of the 4-access lines analytical device, enabling Kelvin sensing. On the right the SEM image with the top view of our devices.

Fig. 2.21. Description of the general setup used to characterize the PCM cell. The cell current is monitored and limited by an external series resistance (RLOAD). On the right, we see the final effect on the waveforms acquired. The voltage drop onRLOAD enables the calculation of the current provided to the cell during the pulse application.

device, according to

ICELL = VP U LSE −VCELL

RLOAD

(2.13) whereVP U LSE is the voltage applied on the series of cell and load resistor, andVCELLis the voltage acquired on the PCM device. The dimensioning of RLOAD is fundamental for the study of the cell, and depends on the device electrical parameters. The value of the load resistance has to fulfill the following requirements:

- The maximum voltageV_{P U LSE} is limited by the equipment specifications (V_{M AX}), and since the RESET operation is the one that requires the highest current, the system has to guarantee to reach this current value:

V_H + (R_ON +R_LOAD)I_R < V_{M AX};

- The minimum resolution (σV) of the measure of the voltage drop on the load resistance, has to allow the acquisition of the minimum current value (i.e. IS):

σ_V/R_LOAD < I_S;

2.5 The electrical characterization of the PCM cell 57

Fig. 2.22. Suitable values ofRLOADfor the characterization of our devices (filled area), as a function of the ON-state resistance of the PCM cell.

- At the threshold voltage VT H, RLOAD has to guarantee the possibility to screen currents able to crystallize the cell:

(VT H−VH −RONIS)/RLOAD < IS.

These requirements are schematically reported in Fig. 2.22, where the range of suitable values ofRLOADare reported as a function of the resistanceRON of the cell (highlighted with the filled area of the graph).

In Fig. 2.21 we report an example of the waveforms acquired of the evolution of the voltage appliedVP U LSE and of the voltage measured on the cell (VCELL). The device in this case is starting from a RESET state. Initially the voltage applied drops completely on the cell, but once reached the threshold voltage, the cell reaches its ON-state and start to be highly conductive. The effect is the reduction of the voltage drop on the cell, and the increase of the drop on RLOAD.

Since the current limitation is provided externally to the die, we expect a limitation on the bandwidth, due to the parasitic capacitance C_P of the system. C_P results from the sum of all the parasitic contribution of external cables, probe needles (used to contact the device electrodes), and the parasitic capacitance between top and bottom electrode of the device. The pole generated by C_P, depends on the variable resistance of the cell (RCELL), and since this depends on the current (on the voltage), we will have a current dependent bandwidth

f_BW(I_CELL) = 1

2πCP[RCELL(ICELL)||RLOAD] (2.14) It means that if the device is in the amorphous state (high RCELL), the limitation to the voltage increase on the cell depends only on the load resistor, being also the worst case for the bandwidth limitation. The load resistor then, has to be the lowest possible, in the range of resistance values fulfilling the requirements listed above.

Considering now again the case of a cell in the HRS (high resistance state), during the application of the pulse we have the charging ofC_P, till the reaching of the threshold voltage of the device (VT H). The cell switches to its highly conductive ON-state, and the system experiences another transitory phenomenon before to recover the stability.

C_P discharges on the parallel contribution of the cell andR_LOAD, giving rise to a peak

of current in the device approximatively equal to Ipeak≃ VT H

RON

(2.15) R_ON includes the resistive contributions of all the elements of the device, in particular RON =RP LU G+RP CM +RLIN ES (2.16) where we find the resistance of the plug R_{P LU G}, the resistance contribution of the top and the bottom electrodes and the relative access lines in RLIN ES, and the resistance of the phase-change material that after the switching event is taken to its ON-state (R_{P CM}). The recovering of the stability in the cell, is provided after a characteristic time proportional to ∼ CP(RON||RLOAD). This transient can represent a source of thermal stress for the cell, with the consequent reduction of the endurance performance.

Hence, a proper reduction of C_P can reduce the impact of this phenomenon. As we will see, in order to increase the bandwidth of the programming system and reduce the transients duration, and at the same time guarantee high disturb rejection, a specific electronic board has been developed to perform our tests.