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A complete cell characteristic

Dans le document The DART-Europe E-theses Portal (Page 106-111)

2.8 The simulation results

2.8.3 A complete cell characteristic

We simulated the behavior of the devices that we fabricated, analyzed in the previous chapters, also to understand the impact of the temperature on the thermal stress of the PCM cell. As reported in Fig. 2.43, we demonstrated the reduced thermal stress in the µtrench structure, during the SET operation, at high working temperature. Moreover, we reproduced with the model proposed, the programming characteristics of the cell. In Fig. 2.53 we report the resistance of a lance-type cell (diameter = 300 nm) as a function of the programming current (R-I). The simulation reproduces what obtained during the real experiments, and in particular we find a correspondence in the SET current, the SET resistance, the RESET current and the RESET resistance. The points at low current values of the experimental results (blue), show a higher resistance value with respect to the final RESET resistance obtained at current values higher than 35 mA.

On the contrary, the simulations show always the same RESET resistance. This is because in our simulations we did not take in consideration the drift phenomenon.

Fig. 2.54 shows the current as a function of the voltage drop on the cell (I-V), during the programming of a µtrench device (the thickness of the plug considered is 30 nm, while the trench width is 300 nm). The simulated and the experimental characteristics show a similar trend. We have almost the same threshold voltage (≃ 1.5 V): the mismatch observed, is in the order of magnitude of the variability of the real threshold voltage, that depends on slight variations of the amorphous region thickness (a variation of 5 nm corresponds to a variation of ∼ 0.15 V). Moreover, the characteristics show the same holding voltage VH (≃ 0.5 V), as theorized in our model.

2.9 Summary of the chapter

Phase-change memory demonstrated in the last decade the possibility to fulfill the increasing demand of scalability and power reduction, in particular to address the replacement of embedded Flash technology, experiencing more and more scaling limitations. Different PCM device structures have been proposed in last years in order to reduce the memory size. We presented, at first, the lance-type structure, based on a metallic via that provides the contact with the integrated phase-change material. This simple vertical structure experiences the scaling limitation due to the lithography technology resolution. This idea evolved into the confined structure, where the shrunk “hole” created to fabricate the memory, is filled with the phase-change material. The main constraint of this structure, is the need of a highly conformal deposition technique. Other structure designs, started to take advantage of the control of the thickness of a metal layer, in order to reduce the interface area between the plug element and the phase-change material. This is the case of the µtrench structure, that demonstrated the industrialization feasibility of the PCM technology. Its direct evolution, is the so called “Wall” structure that revealed to be the best compromise in terms of fabrication process, scaling capability and device engineering opportunity.

The growing technological maturity of PCM has to be supported by a growing research in the reliability issues faced when the device is highly scaled or subject to particular stress/working conditions (e.g. high operation temperature). In this context we implemented the plug structure, the confined structure and theµtrench structure in order to study their main aspects, firstly in term of scalability, and sec-ondly in term of engineering of the performance to address embedded applications, as we will describe in the next chapter. We coupled this study, with the analysis of state-of-the-art “Wall” PCM devices fabricated in collaboration with STMicroelec-tronics. We introduced in the chapter, the main reliability aspects correlated with the PCM technology:

- the cycling endurance, impacted by the scaling. The lower is the interface area between the plug and the phase-change material, the higher is the probability of mechanical failures, due also the the thermal stress faced by the device during the programming;

- the subthreshold switching, that can cause the switching of the cell below the threshold voltage, when the pulse is sufficiently long and/or the temperature is high enough;

- the phase-change material elemental segregation, that can reduce the life time of the cell;

- the retention of the data, affected by the incoming crystallization of the phase-change material at high temperatures;

- the drift of the cell resistance towards higher resistance values;

2.8 The simulation results 91

- the decrease of the threshold voltage, when the temperature is risen;

- the cell-to-cell thermal cross-talk between adjacent cells.

We analyzed in detail some of these issues in the specific case of the µtrench structure. We revealed also the strong impact of the thermal stress generated in the cell by the SET operation, on the final life time of the device, showing how the endurance can be improved from 108 up to more than 109, when at higher temperatures this effect is softened.

Finally, we presented the simulation tool implemented in MATLAB and C code, used to simulate the behavior of our PCM devices. The tool has been implemented taking in consideration the thermal and the electrical properties of a phase-change material, in particular introducing a new equation to model the conduction of the ON-state and the liquid phase. Our tool allowed us to fit the electrical behavior of different structures under test, understanding the different mechanisms taking place in the cell during the RESET and the SET operations.

Chapter 3

The reliability optimization of the embedded Phase-Change Memory

Different ideas to reduce the phase-change memory device size have been proposed in recent years, based on the engineering of the cell structure, and finally reducing the programming current. But the power consumption is not the only problem that we have to face. To overcome the problem of the retention of the information at high temperature, the engineering of the cell structure can be a possible key-road. However, once reached the nm scale as in state-of-the-art devices, the only possible solution is the engineering of the integrated phase-change material. Hence, our interest in the study of new phase-change materials to overcome most of the limitations correlated with the embedded PCM technology, in particular to address automotive and multi-level applications.

Nowadays, Ge2Sb2Te5 is recognized as the reference chalcogenide material for stan-dard PCM in consumer market applications [117, 118]. One of the most critical bot-tlenecks of Ge2Sb2Te5, is the low crystallization temperature (∼140 C) [119] making intrinsically impossible to satisfy the standard 85 C 10-years data retention require-ments. In the last decades a lot of efforts have been put in the research of new materials and in the study of their properties to target automotive applications, for which the operating temperature is in the range of 150 C. To address this requirement, different approaches at material level are possible. A first one is mainly based on changing the stoichiometry of Ge2Sb2Te5 or adding dopants to increase the stability of the amor-phous state [120, 121]. Another solution is to look for different materials with higher crystallization temperature.

In this chapter we describe how we engineered the GeTe stoichiometry to increase its crystallization temperature and then to improve the final thermal stability of the high resistance state of the cell. Then we show how the threshold voltage reduction experienced at high working temperature, can be overcome with SiO2 doping. More-over, we analyze the effects of C-doping on the speed and on the programming current in GST based memory devices. Finally, we present how the Ge enrichment can boost the data retention of the PCM cell, despite the reduction of the programming speed.

We demonstrate the possibility to overcome this reduction, and the benefit of our in-novative programming procedure on the drift of the cell, addressing for the first time the problem of the stability of the low resistance state of the cell.

Dans le document The DART-Europe E-theses Portal (Page 106-111)