SELECTIVE EPITAXY BASE FOR BIPOLAR TRANSISTORS

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SELECTIVE EPITAXY BASE FOR BIPOLAR TRANSISTORS

J. Burghartz, B. Ginsberg, S. Mader, T.-C. Chen, D. Harame

To cite this version:

J. Burghartz, B. Ginsberg, S. Mader, T.-C. Chen, D. Harame. SELECTIVE EPITAXY BASE FOR BIPOLAR TRANSISTORS. Journal de Physique Colloques, 1988, 49 (C4), pp.C4-367-C4-370.

�10.1051/jphyscol:1988476�. �jpa-00227974�

JOURNAL DE PHYSIQUE

Colloque C4, supplgment au n09, Tome 49, septembre 1988

SELECTIVE EPITAXY BASE FOR BIPOLAR TRANSISTORS

J.N. BURGHARTZ, B.J. GINSBERG, S.R. MADER, T.-C. CHEN and D.L. HARAME

IBM Research Division, T. J. Watson Research Center, ~ o r k t o w n Heights, NY 10598, U.S.A.

Un transistor dont la base e s t prepark par ipitaxie sklective a kt6 fabriqd avec une largeur de base &

1 l00A et une rkkhnce & de la base intridque de 2800!2/0. Nous dknontrons qu'il est possible d'uthx une largeur de base inftrieure 1 l000A si les cycles thenniques ap&s le %at de la base sont minim&s. L'utilisation de wuches minces epitaxiks pour la base intrindque permet d'tviter les di5lcul3s liks H la formation des espaceurs, en limitant la nuclkation sur b silicium polycristallin de la base extrindque H la peripherie & l ' m u r . L'interface poly/epi est orient& suivant un plan (1 11).

Ceci conduit H une degradation des characteristiques des dispositifs H cause de I'ktaiement lateral de la base extrinshue en dessous &s espaceurs.

A Selective Epitaxy Base Transistor (SEBT) is presented with a basewidth of 1 l00A and an intrinsic base sheet resistance of 2800!2/0. It is demonstrated that a sub-1000A basewidth is possible if the temperature-time cycles after base deposition are minimal. Using thin epitaxial layers to fonn the in- trinsic base avoids difliculties in sidewall formation caused by nucleations on the extrinsic base polysilicon at the emitter window perimeter. The polylepi interface was found to be on a (1 11) plane.

This leads to a degradation of the device characteristics due to extrinsic base encroachment underneath the sidewall.

INTRODUCTION

Advanced bipolar technologies with a narrow implanted intrinsic base have doping concentration profiles which are determined by channel& and defect enhanced diffusion during subsequent annealing steps /I/ and which therefore limit scalability. For scaled bipolar transistors of the future a rectangular profile is desired to achieve both a suff~cient collector-emitter (C-E) punch-through voltage and a minimal base transit time. Unlike ion im- plantation silicon epitaxy does not suffer from the above restrictions and abrupt profiles, i.e. a steep out-diffusion tail, can be achieved. To integrate epitaxial base technology in advanced double-poly self-aligned structures 121, the epitaxial deposition process has to be selective to substitute for ion-implantation without any additional process steps.

INTRINSIC BASE PERIMETER

The Selective Epitaxy Base Transistor (SEBT) was presented previously 131. The results demonstrated the device quality of selective epitaxial films, grown in a conventional epitaxy reactor. i n the SEBT structure the intrinsic base epitaxial layer is linked-up directly to the extrinsic base polysilicon which is different from technologies using implanted base layers (Fig.1). It is preferable to grow the epitaxial base bounded by polysilicon rather than oxide or nitride because facetting with high defect density occurs a t the epi/dielectric boundary 1431. But nucleations have been observed on the polysilicon (Fig.2), which make emitter-sidewall Eormation d i c u l t , i.e. sidewall etch- through is possible if nucleations are too large. It was demonstrated that for sufficiently thin epitaxial films, and.

consequently small nucleation sizes, sidewall formation becomes noncritical 131. For the obtained basewidth of ll0OA the emitter sidewall covers completely the nucleations a t the polysilicon. However it was observed not to be straight because of a slightly higher thickness of the epitaxial fdm close to the window boundary which is due t o merging of the polysilicon and the epitaxial growth at the window perimeter (Fig.3). The poly/epi interface was observed to be on a (I 11)-plane. Since the boron diffusion coefficient i s essentially higher in polysilicon compared to epitaxial silicon, lateral encroachment of the extrinsic base dopant to the emitter is possible under- neath the sidewall. The consequence is a degradation of the current gain by a reduction of the effective emitter Gummel number at the emitter edge 161.

Article published online by EDP Sciences and available at http://dx.doi.org/10.1051/jphyscol:1988476

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INTRINSIC BASE VERTICAL PROFILE

As mentioned above, epitaxial base formation makes possible basewidths in the sub-1000A range. To achieve an acceptable punch-through and Early voltage with such a narrow base the total base dopant, i.e. the boron con- centration, has to be sufficiently high. A narrow more highly doped base is more sensitive to the epitaxy proc- essing conditions and the subsequent temperature-time cycles which widen the basewidth. To quantify the impact of sidewall processing steps on profile broadening SIMS measurements were performed before and after emitter sidewall formation (Fig.4). The selective epitaxial f iwas deposited in an Applied Materials 7810 radiantly heated barrel type reactor running in reduced pressure mode using SiCb a t 900°C 171. To protect the epitaxy silicon surface from dry-etching during sidewall formation, a 300A buffer oxide was grown at 800°C after epitaxy.

This oxidation is the dominant factor in broadening the profile because of oxidation enhanced boron diffusion /8/.

The basewidth was 1

IOOA

DEVICE CHARACTEEtISTICS AND DISCUSSION

The Gummel plot of tht: SEBT with 1100A basewidth is shown in Fig.5. Compared with former results /3/ similar device performance was achieved also for small emitter sizes. This is due to the lowered E-B leakage current by a wen performed emitter sidewall. Current gains up to 24 were measured. Such values are still somewhat low for the measured intrinsic base sheet resistance of 2800Q/D. It is assumed that an encroachment of the highly doped extrinsic base, as described above, is the the reason for this reduction. At high currents the gain is even more degraded (Fig.6). I n this range base current crowding takes place, increasing the current density near the emitter perimeter and decreasing the effective gain of the transistor.

Therefore lateral extrinsic base encroachment has to be lowered by either a wider sidewall or by modifications in processing. Since the sidewall width is determined by the height of the extrinsic base nitride/oxide/poly stack, encroachment has to be limited by a reduction of the final temperature-time cycles including epitaxy process itself.

CONCLUSION

A Selective Epitaxy Base Transistor (SEBT) was presented with a basewidth of 1100A. Basewidths below 1000A before emitter sidewall formation were measured. The incorporation of an epitaxial base and appropriate low temperature processing will maintain a narrow base profile and result in a s ~ b - ~ o o o A basewidth in double-poly structures. E-B leakage caused by emitter sidewall etch-through, as seen in former work, could be removed with deposition of thinner epitaxial f i s and consequently smller nucleation sizes. Current gains up to 24 were found which are somewhat small values for the measured intrinsic base sheet resistance of 2800Q/D. An encroachment of the extrinsic base dopant to the emitter was found to be the reason for this reduction. It is concluded that high device performance can be obtained in the SEBT device with a reduction of the temperature-time cycles and an optimized sidewall.

ACKNOWLEDGEMENT

The authors are thankful to G.P.Li for helpful discussions and to the members of the Yorktown Silicon Facility, especially to M. M. d'l~gostino for processing selective epitaxy. Jeny Scilla is acknowledged for performing the SIMS measurements, Carol Stanis and Jeffrey Wetzel for TEM and Ted Ross for SEM.

REFERENCES

/1/ A.E.Michel,W.K.Chu,M.Neuman, Appl.Phys.Lx$t., to be published.

/2/ G.P.Li,T.H.Ning,C.T.c=huang,M.B.Ketchen,D.D.TgJ.Mauer IEEE Trans.El.Dev., Vol.ED-34,1987, pp.2246-2254.

/3/ ~ . ~ . ~ u r g h a r t z , ~ ~ . ~ i n s b e r ~ , ~ . ~ . ~ a d e r , ~ . - ~ ~ h e n , D.L.Harame, IEEE Electron Device Letters, 9(5)(1988)259-261.

/4/ A.Ishitani,H.Kitajima,K.Tanno,H.Tsuya,N.Endo,N.Kasai, Y.Kurogi, Microelectronic Engineering, Vo1.4, 1986, pp.3-33.

/5/ S.Nagao,K.Higashitani,Y.Akasaka,H.Nakata, IEEE Trans.El.Dev., Vol.ED-33,1986, pp.1738-1744.

/6/ G.P.Li,C.T.Chuang,T.C.Chen,T.H.Ning, IEDM Technical Digest, 1987, pp.174-177.

/7/ B.Ginsberg,G.Bronner,S.Mader, Extended abstr. 10th c o d chem. vapor dep., Electrochem. Soc., Honolulu, Hawaii, 1987, pp.991-992.

/8/ W.G.AUen,KN.Anand, Solid State Electronics, 14(1971)397-406.

M e t a l n-PoIy

n - s u b s t r a t e /

Fig.1 Cross-Section of the SEBT.

Fig.2 SEM of emitter opening after selective epitaxy.

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PHYSIQUE

Fie.3 TEM cross-section of the emitter window after

**\%axial base formation. Polysilicon nucleation occurs at the perimeter resulting in an (1 11)-interface with the single-crystalline layer. In this region the filmthic9ess is somewhat higher. The epi thickness (1600A) 1s es-

sentially thicker than in device processing.

0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 DEPTH (nm)

Fig.4 SIMS measurements of the intrinsic transistor profile without (left) and with (right) temperature-time cycles for emitter sidewall formation. The basewidths are 950A and 1 100& respectively.

Fig.5 Gurnmel plot of a SEBT with 1100A basewidth.

Current gain reduction results from exhinsic base im- purity encroachment underneath the emitter sidewall.