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Fast simulation of bandpass Continuous-Time
Sigma-Delta Modulators
Philippe Benabes
To cite this version:
Philippe Benabes. Fast simulation of bandpass Continuous-Time Sigma-Delta Modulators. IEEE NEWCAS TAISA Traitement Analogique de l’Information, du Signal et ses Applications, Jun 2008, Montreal, Canada. pp. 289-292, �10.1109/NEWCAS.2008.460378�. �hal-00270239v2�
Fast simulation of bandpass
Continuous-Time Σ∆ Modulators
Philippe BENABES IEEE Member
Department of Signal processing and Electronic Systems SUPELEC
91192 GIF/YVETTE FRANCE philippe.benabes@supelec.fr, Abstract— A methodology for the simulation of bandpass
continuous time sigma-delta (Σ∆) modulators is presented in this paper. This method permits the simulation of Σ∆ modulators employing continuous-time filters using a fixed-step algorithm.
The method is based on the discretization of a continuous-time model and the use of a discrete simulator, which is more efficient than an analog simulator. This transformation is exact in term of Noise Transfer Function and asymptotically exact in term of Signal Transfer Function (the Signal Transfer Function of the model rapidly tends to the continuous time model transfer function when the number of steps increases).
I. INTRODUCTION
Sigma-delta (Σ∆) converters are composed of a Σ∆
modulator which provides a high speed one-bit or multi-bit data string followed by a digital filter that produces a high resolution data [1][2]. Continuous-Time (CT) modulators [3][4] possess one key advantage over their discrete-time competitors : no sampling is performed within the filter itself, thus allowing sampling frequencies higher than the ones of DT modulators. On the other hand, CT circuits are more difficult to design and to simulate than DT circuits.
When simulations are performed with an analog simulator, they take a huge computational time. Equivalent Discrete- Time (DT) model of CT modulator loop have been described [5], but they need a continuous filter in the input signal path to ensure the exact equivalency [6], and furthermore the input bandwidth is limited to half the sampling frequency.
In this paper, a simulation method of CT modulators based on Oversampled Discrete Time (ODT) models [7] is presented. With this method, each sampling-period is divided into a fixed number of steps. It will be shown that this transformation is exact in term of Noise Transfer Function (NTF) and asymptotically exact in term of Signal Transfer Function (STF). The STF of the model rapidly tends to the STF of the CT model when the number of steps increases.
Furthermore, simulations of the modulator response to signals with a bandwidth higher than the sampling frequency is possible.
This paper is structured as follows: The following section describes the synthesis and analysis methods of continuous filter Σ∆ modulators. An application to a fourth-order bandpass modulator is illustrated in Section III. Finally, concluding remarks are given in Section IV.
II. SIMULATION METHOD OF CTΣ∆MODULATORS
A. Equivalency between CT and DT Filters
The relationship between a continuous-time filter transfer function (g(s)) and the discrete-time equivalent filter (f(z)) can be expressed using the formula [5],
) ) (
) ( 1 ( )
( 1 1 T z
s e s L g z
z
f T ds +
Ζ
−
= − − − . (1),
where d is the loop delay between the ADC input and the DAC output. This formula ensures the equivalency of the Noise Transfer Function between the continuous and the discrete time topology shown in Figure 1. When the delay is non zero, a feedback term (T(z)) must be added between DAC output and ADC input as in [6] in order to be able to solve (1).
(a)
(b)
Figure 1 : Single-bit CT (a) and DT (b) modulator Assuming that the input signal is a band-limited signal (limited to the half of the sampling frequency), and that the quantizer can be modeled by an additive white noise, the
signal transfer function of the discrete-time topology can be
expressed as :
) (
1
) ) (
(
2 2
S S
j F j F DT
e f
e
STF f ϕ
π πϕ
ϕ +
= , (2)
where Fs is the sampling frequency, and ϕ the frequency.
The signal transfer function of the continuous-time topology is ([4])
) (
1
) 2 ) (
(
2 FS CT j
e f
j
STF g ϕ
π
ϕ πϕ +
= , (3)
f being related to g by equation (1).
Unfortunately, the STF obtained with the discrete-time model is far from the CT one; furthermore, the DT model is unable to deal with an input signal with a frequency higher that half the sampling frequency.
In order to enhance the signal-transfer function and remove the frequency limitation, we propose to use an oversampled model of the discrete-time modulator (ODT).
B. Oversampled model of a sigma delta modulator
Let’s consider now the oversampled model of a Σ∆
modulator. The sampling frequency of the ADC is still Fs, but the equivalent digital filter (F) runs now at kFs. The feedback signal is held during k samples. In order to simplify the notations, the Z variable denotes functions running at frequency kFs, while the z variable denotes a function running at frequency Fs.
Figure 2 : Oversampled modulator
We consider the transfer function between the ADC output and its input at the sampling times. We calculate the response to a discrete impulse (Y*[n]) in the three cases: discrete-time modulator, continuous-time modulator, and oversampled discrete-time modulator (T is the sampling period), in the case d=0 (
Ζ
denotes the Z transform).In the case of the DT modulator: Y*[n]=
Ζ
−1(
f(z))
(4) In the case of the CT modulator:
= − = −1 − ( ) ]
[
* 1 g s
s n e
Y
L
t nT Ts (5)In the case of the ODT modulator:
−
=
Ζ
− = − −− ( ) ) 1 ( ] 1[
* 1 1 F Z
Z k n Z
Y n kN k (6)
Table I gives equivalency between DT, CT and ODT modulators for first order, second and third order filters, by identifying the impulse responses Y*[n]. These formulas were obtained using Maple software. One should notice that any transfer function g(s) can be expressed as the sum of terms in the first column when a ≠ 0. The case of a = 0 was already addressed in [7].
) (s
g f(z) F(Z)
First- order
filter s−a 1
1 1
1 1
−
−
−
−
z e a z e
a a
1 / / 1
1 1
−
−
−
−
Z e a Z e
k a k a
Second- order
filter (s a)2 s
−
(
1)
22 1
1
) (
−
−
−
−
− z e
z z e
a a
(
/ 1)
22 1 /
1
) (
−
−
−
−
− Z e k
Z Z e
k a k a
Third order filter
)3
(s a s
−
(
1)
23
2 1
1 2
) ) 1 ( (
−
−
−
−
−
−
− +
z e z e
z e z e
a a
a a
(
/ 1)
22 3 /
2 / 1 /
1 2
) ) 1 ( (
−
−
−
−
−
−
− +
Z e k
Z e
Z e Z e
k a k a
k a k a
TABLE I. EQUIVALENCIES BETWEEN CT,DT, AND ODT
It can be also noticed that the DT case becomes a particular case of the ODT modulator for k=1, and the CT case can be seen as the limit when k tends to infinity of the ODT model.
III. APPLICATION TO THE SIMULATION OF HIGH ORDER MODULATORS WITH LOOP DELAY
A. Oversampled model of a sigma delta modulator with loop delay
This section deals with the simulation of CT modulators with loop delay. The delay of the CT topology is denoted d. A feedback (T(z)) between DAC and ADC is introduced to ensure the equivalency between CT and DT topologies [6], as shown in Figure 1.
It is supposed that g(s) in Figure 1(a) has been obtained from Figure 1(b) using the formula (1).
The ODT modulator model used for simulations is given in Figure 3. A delay r has been introduced to model the delay introduced by the DAC. It will be chosen as the nearest integer modeling the real delay :
kdFs
r= , where
denotes rounding towards nearest integer. This topology is equivalent in term of noise transfer function if the following equation is observed:) ( ' ) ) ( 1 ( ) 1
( 1
1 F Z T z
Z k z Z
f n kN r k +
−
=
Ζ
= −Ζ
− − −− (7)Figure 3 : ODT model with loop delay B. Example of a fourth order modulator
We consider a classical fourth-order bandpass modulator (Figure 4) [7] with
4 2
4 2
2 1
5 . ) 0
( − − −−
+ +
−
=−
z z
z z z
f (8)
2 2
1 −
−
−
− z z
2 2
21 1
−
−
+
− z z
Figure 4 : DT modulator
The CT equivalent modulator is given by Figure 5 using the methodology of [5]. In out example, the loop delay d is equal to 1.5 sampling period.
02 2
02 1 0 1
w s
w b s w a
+ +
02 2
20 2 0 2
w s
w b s w a
+
−
Figure 5 : CT equivalent modulator
The coefficients are
4 2
463 . 0 ) (
085 . 0 , 707 . 0 , 038 . 0 , 314 . 0
0
2
2 2
1 1
Fs
z z
T
b a
b a
ω = π
−
=
≈
−
≈
≈
≈
− (9)
In order to simulate the CT modulator, we transform the CT modulator into an ODT topology as Figure 3 using eq. (7).
For any even k value, kdFs is integer. The delay introduced by the ODT is the same as the CT one. It results that T’(z)=T(z).
For k=4, we get for example
4 3 2
1
4 3
2 1
69 . 3 41 . 5 39 . 3 1
26 . 0 75 . 0 78 . 0 28 . ) 0
( − − − − − − −−
+
− +
−
+
− +
≈ −
Z Z Z
Z
Z Z
Z Z Z
F
(10) for k=8, we get
4 3 2
1
4 3
2 1
92 . 3 85 . 5 92 . 3 1
13 . 0 40 . 0 41 . 0 14 . ) 0
( − − − − − − −−
+
− +
−
+
− +
≈−
Z Z Z
Z
Z Z
Z Z Z
F
(11)
C. Simulation results
The three modulators have been simulated for a null input signal using Simulink. We verify by simulations that they are equivalent in term of NTF. Figure 6 shows a time domain simulation. The three curves represent the ADC input signal for the DT, CT and ODT case. It can be seen that the three signals are equal at the sampling times nT. Furthermore the CT and ODT signals are equal for each nT/k time, verifying that the ODT model response tends to the CT model when k tends towards infinity.
Figure 6 : time domain simulations of the ADC input signal for CT, DT and ODT modulator.
D. Signal transfer function evaluation
The signal transfer function of a fourth-order modulator was evaluated (still by making the assumption that the quantization noise behaves as an additive white noise) using the ODT model. In order to evaluate the efficiency of our methodology, this STF is compared with the one that would be obtained by making a bilinear transform of the filters of the CT modulator (Figure 7 topology).
Figure 7 : ODT equivalent model obtained by a bilinear transform
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
-80 -70 -60 -50 -40 -30 -20 -10 0 10 20
reduced frequency
|NTF|
k=2 k=4
k=8 real modulator
Figure 8 : comparison of the NTF obtained by a bilinear transform
It must be first noticed that this topology is not strictly equivalent in term of NTF. Figure 8 shows the NTF of the models obtained by a bilinear transform of the continuous filters compared with the real NTF of the modulator. There is a shift in the central frequency of the modulator. In order to get a good NTF approximation, an oversampling ratio of at least 64 or 128 is required.
The modulus of the STF of the model obtained by bilinear transform (ODTbt) is given in Figure 9 and the one of the ODT modulator is given in Figure 10. With a classical bilinear transform, the STF remains far from the real STF even for large k. Using the ODT, the STF is near from the real STF even for low k values. In Figure 10 the STF has been extended to frequencies higher than Fs/2 using the convention that a signal at frequency φ+mFs is aliased into a term at frequency φ at the modulator input. The obtained STF is very accurate from 0 to half the sampling frequency. Some other tests confirmed that taking k equal to 4 times the ratio between the input-signal bandwidth and Fs/2 is accurate. The phases curves have not been plotted but they have the same kind of behavior.
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
0 2 4 6 8 10 12 14
reduced frequency
|STF|
STF comparison with bilinear transform
k=2
k=4
k=8 real modulator
Figure 9 : |STF| for k=2, 4, 8 for the ODTbt modulator compared with the CT modulator
0 0.5 1 1.5 2 2.5 3 3.5 4
-30 -25 -20 -15 -10 -5 0 5 10
reduced frequency
|STF| in dB
STF comparison with ODT model
k=2
k=4
k=8 real modulator
Figure 10 : |STF| for k=2, 4, 8 for the ODT modulator compared with the CT modulator
Table 2 compares the performances of all proposed algorithms in terms of NTF and STF accuracy, and simulation time. All timings are given for a simulation with simulink for 100000 output samples. It can be clearly seen that the fastest method giving accurate results is the ODT
k NTF STF Simulation
time
Continuous OK X 34 s
DT 1 OK X 1 s
bilinear 8 X X 6 s
bilinear 128 OK OK 130 s
ODT 8 OK OK 6 s
Table 2 : Comparison of algorithms performances
IV. CONCLUSIONS
A methodology for time-domain simulations of bandpass continuous-time modulators was proposed. This methodology is based on a fixed step discretization of each output sample.
Using this method, simulations are very fast as they use a fixed step algorithm and discretized equations. NTF and STF considerations on a fourth-order modulator have shown that the ODT method describes the behavior of a CT modulator in a more efficient way than classical transform method such as bilinear transform.
REFERENCES
[1] J. C. Candy and G. C. Temes, Oversampling Delta-Sigma Data Converters. IEEE Press, New York, 1991.
[2] S. R. Norsworthy, R. Schreier and G. C. Temes, Delta-Sigma Data Converters, Theory, Design, and Simulation. IEEE Press, PC3954, 1997.
[3] R. Schreier and B. Zhang, «Delta-Sigma modulators employing continuous-time circuitry,» IEEE Trans. Circuit & Systems-I:
Fundamental Theory and Applications, vol. 43, pp. 324-332, April 1996.
[4] Omid Shoaei, «Continuous-time delta-sigma A/D converters for high speed applications,» Ph.D. dissertation, Carleton University, Canada, November 1995.
[5] P. Benabes, P. Aldebert, and R. Kielbasa, «A Matlab based tool for bandpass continuous-time sigma-delta modulators design,» in Proc.
IEEE Int. Symp. Circuits & Syst., Monterey, CA, June 1-3, 1998, vol.
VI, pp. 274-277.
[6] P. Benabes, M. Keramat, and R. Kielbasa, «Synthesis and analysis of sigma-delta modulators employing continuous-time filters», Analog Integrated Circuits and Signal Processing, n° 23, pp. 141-152, 2000.
[7] P. Benabes, A. Beydoun, «Fixed-step simulation of continuous-time Σ∆
modulators» to be published in IEEE ISCAS’2008
