Conducted EMC modeling and EMI filter design integrated class-D amplifiers and power converters

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integrated class-D amplifiers and power converters

Roberto Mrad

To cite this version:

N° d’ordre : ECL 2014-19

Thèse de l’Université de Lyon

Délivrée par l’Ecole Centrale de Lyon

Spécialité : Energie et Systèmes

Soutenue publiquement le 30 Juin 2014

Par

Roberto Mrad

Préparée aux Laboratoires Ampère et INL Financée par la société ST Microelectronics

Conducted EMC Modeling and EMI Filter

Design for Integrated Class-D Amplifiers

and Power Converters

Ecole Doctorale

Electronique, Electrotechnique, Automatique

Jury

Rapporteur Flavio Canavero Professeur (Politecnico di Torino) Rapporteur Jean-Luc Schannen Professeur (ENSE3_{, Grenoble)}

Examinateur Etienne Sicard Professeur (INSA, Toulouse)

Directeur de thèse Christian Vollaire Professeur (Ecole Centrale de Lyon)

Encadrant Florent Morel Maitre de conférences (Ecole Centrale de Lyon) Encadrant Gaël Pillonnet Chercheur (CEA, Grenoble)

Abstract

Ecole Centrale de Lyon Doctor of Philosophy

Conducted EMC Modeling and EMI Filter Design for Integrated Class-D Amplifiers and Power Converters

by Roberto Mrad

English:

Switching power management circuits are widely used in battery powered em-bedded applications in order to increase their autonomy. In particular, for audio applications, Class-D amplifiers are a widespread industrial solution. These, have a similar architecture of a buck converter but having the audio signal as reference. The switching nature of these devices allows us to increase significantly the power efficiency compared to linear audio amplifiers without reducing the audio quality. However, because of the switching behavior, Class-D amplifiers have high levels of electromagnetic (EM) emissions which can disturb the surrounding electronics or might not comply with electromagnetic compatibility (EMC) standards. To overcome this problem much architecture appeared in the state of the art that reduces the emissions, however, this has never been enough to remove electromag-netic interference (EMI) filters. It is then useful to optimize these filters, thus, it has been set as the goal of this PhD thesis. The latter has been divided to four main axes which can be resumed by the following.

method has been validated on integrated differential Class-D amplifier. The exper-imental measurements have permitted to validate the method only up to 100 M Hz. However, this is sufficient to cover the conducted EMC frequency band.

Second, the EMI at the supply rails of Class-D amplifiers has been treated. As the battery is often the same power supply for all applications in an embedded system, an EMI filter or a decoupling capacitor is needed to prevent the noise coupling by common impedance. Designing this filter needs the knowledge of the battery impedance at the desired frequencies. Therefore the present work dealt also with measuring the high frequency impedance of a battery. Afterwards, an experimental validation has been carried on with a DC-DC converter and a Class-D amplifier.

The developed model allows a virtual test of the switching device in the final application. However, it is more useful if the model is able to help the system integrator in designing filters. Thus, third, the model has been implemented in an optimization loop based on a genetic algorithm in order to optimize the filter response, and also, reduce the additional power losses introduced by an EMI filter. The optimization search space has been limited to the components available on the market and the optimization result is given as component references of the optimal filter referring to the optimal solution found. This procedure has been validated experimentally.

Finally, EMI filters often are constituted by magnetic components such as fer-rite beads or inductors with magnetic cores. Thus, introducing the EMI filter in the audio path, adds a nonlinear behavior in the audio frequency band. Design-ing a high quality EMI filter require takDesign-ing into account this phenomenon and studying its impact of the original amplifier audio performance. Therefore, the Jiles-Atherton model for magnetic materials has been used for ferrite bead mod-eling. Hereafter, the impact on the time and frequency domain signals has been simulated and compared to measurements. Finally, the total harmonic distortion (THD) has been computed for different signal amplitudes and compared to the THD measured using an audio analyzer. Accurate results have been obtained on a wide range of signal amplitudes.

Fran¸

cais:

Les convertisseurs de puissance sont largement utilis´es de nos jours dans des ap-plications qui demandent une grande autonomie ´energ´etique, comme par exemple ceux qui sont aliment´es par des batteries. En particulier, les amplificateurs de type Class-D sont fr´equemment utilis´es dans les applications audio. Ces amplifi-cateurs commut´es ont une architecture ressemblante `a celle d’un convertisseur DC-DC, ce qui les permet d’avoir une efficacit´e ´energ´etique ´elev´ee. Cependant, leur inconv´enient majeur est la forte ´emission en perturbations ´electromagn´etiques (EM). Cela peut causer des probl`emes de conformit´e avec les normes de compati-bilit´e ´electromagn´etique (CEM), ou bien perturb´e le bon fonctionnement des ap-plications ´electroniques qui l’entour. Pour cela, ils existent de nombreuses ´etudes qui permettent de r´eduire les ´emissions d’un amplificateur de Class D. Cepen-dant, cela n’est pas suffisant pour retirer le filtre de CEM. Il est donc n´ecessaire d’optimis´e ces filtres et de faciliter leurs conceptions. Ceci est le but de la pr´esente th`ese et il est divis´e en quatre grandes parties.

La premi`ere partie commence par d´evelopper une technique de mod´elisation dans le domaine fr´equentiel. Cette technique qui est bas´ee sur la d´etermination et la manipulation des matrices d’imp´edances a comme but de simuler et pr´edire les perturbations EM g´en´er´es par un amplificateur de Class D. Tous les aspects th´eoriques de la m´ethode ont ´et´e d´evelopp´es. Ensuite, une application pratique sur un syst`eme de Class D d´edi´e `a la t´el´ephonie mobile nous a permis de valider la m´ethode jusqu’`a une fr´equence de 100 MHz.

Un amplificateur de Class D est une source de perturbation aussi bien sur les rails d’alimentation que sur les rails de sortie. Pour cela, le filtre de CEM est n´ecessaire sur les rails de l’alimentation comme il y est en sortie. N´eanmoins, un filtre correctement construit doit ˆetre con¸cu en prenant en compte l’imp´edance de la charge qui est la batterie dans ce cas. Pour cela, la deuxi`eme partie a pour objectif la mesure de l’imp´edance de la batterie sur la gamme de fr´equence consid´er´ee. Ainsi, une technique de mesure d’imp´edance de batterie en utilisant un imp´edance m`etre est d´evelopp´ee. Ensuite, une application exp´erimentale sur un convertisseur DC-DC et une batterie nous a permis de valider la proc´edure de mesure.

bas´ee sur un algorithme g´en´etique. L’optimisation inclus plusieurs crit`eres dans sa fonction objective qui sont l’augmentation de la capacit´e du filtre `a r´eduire les ´

emissions EM, la diminution des pertes suppl´ementaire due `a l’utilisation du filtre et finalement le gain du filtre dans la bande de fr´equence du signal audio. Cette ´

etude est poursuivie par une validation exp´erimentale.

La quatri`eme et la derni`ere partie ´etudie et quantifie les impacts du filtre de CEM sur la qualit´e audio de l’amplificateur. En effet, le filtre de CEM est l’un des chemins propagation du signal audio. Par suite, tout comportement non lin´eaire du filtre conduit `a la distorsion du signal audio. Pour cela, cette partie est d´edi´ee `

Contents

1.1 EMC, definition and concern . . . 2

1.2 Problem background . . . 3

1.3 Objectives and scope of thesis . . . 5

1.3.1 Scientific objectives . . . 5

1.3.2 Company objectives . . . 6

1.4 Thesis structure . . . 6

2 Class-D Amplifiers from the EMC Point of View 9 2.1 Class-D amplifier basics . . . 9

2.1.1 Power stages. . . 10

The single ended power stage [21, 22]: . . . 10

The differential power stage [16, 23]:. . . 10

2.1.2 Modulations . . . 12

2.1.2.1 The Pulse Width Modulation (PWM) . . . 12

2.1.2.2 PWM for differential Class-D amplifiers . . . 14

Binary modulation: . . . 14

Ternary modulation: . . . 15

2.1.2.3 Self oscillating modulation . . . 16

2.2 EM emission of Class-D amplifiers . . . 18

2.2.1 EMI at the output rails . . . 18

2.2.2 EMI at the supply rails . . . 20

2.2.3 EMC solutions . . . 22

2.4 Summary . . . 24

3 EMI Modeling of Class-D Audio Amplifier 27 3.1 Time domain simulations . . . 27

3.2 Frequency domain modeling . . . 28

3.3 Proposed frequency domain modeling . . . 30

3.3.1 Active blocks model . . . 31

3.3.2 Passive block types and models . . . 32

3.3.3 Impedance matrix determination . . . 33

3.3.3.1 Impedance matrix determination by impedance an-alyzer . . . 34

3.3.3.2 Impedance matrix determination by VNA . . . 35

3.3.3.3 Impedance matrix determination by simulation . . 35

3.3.4 Impedance matrix association . . . 35

3.3.4.1 Association of 2 Type A blocks . . . 36

3.3.4.2 Type A and Type B blocks association . . . 37

3.3.5 Currents and voltages computation . . . 37

3.4 Experimental application on a Class-D amplifier – Output side . . . 39

3.4.1 Instrumentation used . . . 40

3.4.2 Class-D amplifier modeling . . . 42

3.4.3 Filter impedance matrix determination . . . 43

3.4.3.1 Filter impedance matrix determination using an IA 43 3.4.3.2 Filter impedance matrix determination using a VNA 44 3.4.3.3 Filter impedance matrix determination by simulation 44 3.4.3.4 Comparison between IA, VNA and ADS simulation 44 3.4.4 Load impedance matrix . . . 46

3.4.5 Currents and voltages computation . . . 47

3.5 Experimental application on a Class-D amplifier – Supply side . . . 50

3.5.1 Measurement techniques for batteries . . . 51

3.5.2 Battery impedance measurement with an IA . . . 53

3.6 Validation example using a battery and a power converter . . . 55

3.6.1 Battery impedance . . . 55

3.6.2 Voltage computation and battery impedance verification . . 57

3.7 Chapter conclusion . . . 58

4 EMI Filter Design Using a Discrete Optimization Algorithm 61 4.1 State of the art of EMI filter design . . . 62

4.2 Proposed filter design methodology . . . 63

4.2.1 Optimization algorithm. . . 63

4.2.1.1 Choice of algorithm . . . 63

4.2.1.2 Operators . . . 64

4.2.2 Optimization process . . . 65

4.3 Application to Class-D amplifier . . . 67

4.3.2 Power losses in Class-D amplifiers due to the EMI filter . . . 68

4.3.3 Optimization formulation for Class-D amplifiers . . . 70

4.3.3.1 Formulation I: Power-loss optimization . . . 70

4.3.3.2 Formulation II: EMI optimization . . . 72

4.4 Experimental Validation . . . 77

4.5 Chapter conclusion . . . 82

5 Impact of the EMI Filter on the Amplifier Base-Band 85 5.1 Ferrite beads and Class-D amplifiers . . . 85

5.2 Ferrite bead modeling . . . 87

5.2.1 Jiles - Atherton model . . . 88

5.2.2 Physical architecture modeling. . . 89

5.3 Measurements and validation . . . 91

5.3.1 Measurements . . . 91

5.3.2 Component parameter extraction . . . 93

5.3.3 Time domain comparison. . . 95

5.3.4 Frequency domain comparison . . . 96

5.3.5 THD comparison . . . 98

5.4 Simulating different magnetic materials in ferrite beads . . . 101

5.5 Chapter conclusion . . . 103

6 Conclusion & Perspectives 105 6.1 General conclusion . . . 105

6.2 Perspectives . . . 107

6.2.1 Speed of edge and EMI filters . . . 107

6.2.2 Filter structure optimization and area on PCB reduction . . 108

6.2.3 On-chip coupling in differential Class-D amplifiers . . . 108

6.2.4 Investigating the Schottky for free-wheeling diodes . . . 111

6.3 Evaluating ferrite beads with a switching amplifier. . . 113

A Definitions 133 Total Harmonic Distortion: . . . 133

Signal to Noise Ratio: . . . 133

Power Supply Rejection Ratio: . . . 133

The audio gain . . . 134

B Appendix of Chapter 3: Proofs 135 B.1 Proof of equation (3.5) . . . 135

B.2 Proof of equation (3.8) . . . 136

B.3 Proof of equation (3.9) . . . 137

B.4 Proof of equation (3.11) . . . 139

C Appendix of Chapter 3: Additional Measurements and

Simula-tions 141

C.1 Class-D amplifier transient simulation . . . 141

C.2 EMI computation for a Class-D amplifier powered by a battery. . . 143

D Appendix of Chapter 3: Speaker Impedance 147 D.1 Understanding the speaker impedance matrix . . . 147

D.2 Speaker impedance measurements under temperature variations . . 149

E Appendix of Chapter 5: THD Measurements on a Linear Ampli-fier 151 F French Report - Summarized Version 155 F.1 Introduction . . . 155

F.1.1 Objectifs de la th`ese . . . 156

F.1.1.1 Objectifs scientifiques . . . 157

F.1.1.2 Objectifs industriels . . . 157

F.1.2 Structure du rapport . . . 158

F.2 Les bases et la CEM des amplificateurs de Classe D . . . 158

F.2.1 Etage de puissance´ . . . 159

F.2.2 Modulation . . . 160

F.2.3 MLI diff´erentielle . . . 161

F.2.4 Emission EM d’un amplificateur de Classe D´ . . . 163

F.2.5 Caract´erisation d’un amplificateur de Classe D . . . 164

F.3 Mod´elisation des amplificateurs de Classe D du point de vue de la CEM . . . 164

F.3.1 Identification des param`etres du mod`ele . . . 168

F.3.2 Association de matrices d’imp´edances . . . 169

F.3.3 Calcul des spectres de tensions et de courants . . . 170

F.3.4 Validation exp´erimentale avec un amplificateur de Classe D. 171 F.3.5 D´etermination du mod`ele des diff´erentes parties du syst`eme 171 F.3.6 Exemple de validation sur une batterie et un convertisseur DC-DC . . . 173

F.4 Optimisation discr`ete du filtre CEM . . . 176

F.4.1 M´ethodologie de design du filtre . . . 177

F.4.2 Processus d’optimisation . . . 178

F.4.3 Application `a un amplificateur de Classe D . . . 180

F.4.4 Formulations pour le processus d’optimisation . . . 180

F.4.5 Validation exp´erimentale . . . 182

F.5 Impact du filtre de CEM sur le signal audio de l’amplificateur . . . 184

F.5.1 Mod´elisation d’une perle de ferrite . . . 186

F.5.2 Application exp´erimentale . . . 187

F.6 Conclusion . . . 190

List of Figures

1.1 PCB of a modern smart-phone. . . 1

1.2 Product development and noise reduction [5]. . . 2

1.3 A Class-D amplifier and its dedicated EMI filter in the final appli-cation. . . 3

2.1 A block diagram of an open loop Class-D audio amplifier. . . 10

2.2 Single ended power stage. . . 11

2.3 H-Bridge power stage. . . 11

2.4 PWM modulation. . . 13

2.5 Spectrum of a PWM signal. . . 13

2.6 Basic architecture of a Class-D amplifier [24]. . . 14

2.7 H-Bridge binary modulation.. . . 15

2.8 H-Bridge ternary modulation. . . 16

2.9 Ternary modulation output spectrum.. . . 17

2.10 Architecture of a differential Class-D amplifier. . . 18

2.11 Basic architecture of a self oscillating Class-D amplifier. . . 19

2.12 Self oscillating Class-D amplifier output spectrum. . . 19

2.13 Frequency content of a Class-D amplifier . . . 21

2.14 EMI emissions at the supply level. . . 22

3.1 System decomposition into blocks.. . . 31

3.2 Active block model. . . 32

3.3 Type A : 2N + 1 ports. . . 33

3.4 Type B : N + 1 ports. . . 33

3.5 Zii measurements.. . . 34

3.6 Zijsc measurements. . . 34

3.7 Block association technique. . . 36

3.8 Current computation at the converter output. . . 38

3.9 Currents and voltages computation at a given node after the block named k.. . . 39

3.10 The filter schematic used. . . 40

3.11 The dummy load schematic. . . 40

3.12 Class-D amplification system. . . 41

3.13 Current probe equivalent circuit. . . 41

3.15 Impedance matrix elements of the models in Table 3.3 using ADS

simulation . . . 46

3.16 Filter impedance results. . . 47

3.17 z11 and z14sc impedances seen by the IA . . . 48

3.18 Filter: Measured z11 and z14sc with an IA . . . 48

3.19 Filter: VNA minimum precision seen in s14. . . 49

3.20 Input current of the filter IINP lus. . . 49

3.21 Output voltage of the filter VOU TP lus. . . 50

3.22 Output current of the filter IOU TP lus. . . 50

3.23 Class-D amplification system. . . 52

3.24 Measurement set-up principle . . . 53

3.25 DC-DC converter used for the experimental validation placed near to a paper clip. . . 55

3.26 Battery impedance measurement . . . 56

3.27 Battery impedance model . . . 56

3.28 Battery model results . . . 57

3.29 Magnitude of the battery voltage FFT when feeding the SMPS . . . 58

4.1 General diagram of a GA. . . 64

4.2 Mutation and crossover examples. . . 65

4.3 Optimization application. . . 66

4.4 Class-D amplifier losses due to the EMI filter. . . 69

4.5 Output current in the power loss optimization case. . . 72

4.6 Output voltage in the power loss optimization case. . . 73

4.7 Calculation of the EMI criterion. . . 73

4.8 Output current in the EMI optimization case. . . 75

4.9 Output voltage in the EMI optimization case. . . 75

4.10 Another way for calculating the EMI criterion. . . 77

4.11 Filter layout. . . 78

4.12 Filter output voltage. . . 79

4.13 Filter input current. . . 79

4.14 Measurement comparison of filter’s output voltage envelopes. . . 80

4.15 Bench set-up for the power measurements. . . 81

4.16 Power losses introduced by the different EMI filters. . . 81

5.1 Ferrite bead impedance (inspired from [125]). . . 86

5.2 Example of Class-D THD and bargraph measurement. Note that, the more the bars are high the more the voltage is small since the scale is an inverted dB scale. . . 87

5.3 Ferrite bead model in the audio frequency band. . . 90

5.4 Hysteresis loop obtained by the JA model and the parameters of the first column in Table 5.1.. . . 92

5.5 A simulation example showing the occurring phenomenon. . . 92

5.6 Measurement schematic. . . 93

5.8 Ferrite bead physical architectures. . . 94

5.9 Ferrite bead broken in two part. . . 94

5.10 Ferrite bead current and voltage. . . 96

5.11 Measured and simulated ferrite bead voltage. . . 97

5.12 Measured and simulated output voltage. . . 97

5.13 Vf b THD over the audio output power. . . 98

5.14 Vin and Vout THD over the audio output power. . . 99

5.15 The current I THD over the audio output power. . . 100

5.16 Hysteresis loops obtained by the JA model and the parameters of Table 5.1. . . 101

5.17 Bead simulations with the three materials of Table 5.1. . . 102

5.18 Frequency domain output voltages with the three materials of Ta-ble 5.1. . . 103

6.1 On-chip coupling. . . 109

6.2 Single switch in the time domain. . . 110

6.3 Single switch in the frequency domain. . . 110

6.4 Coupling in case of a high to low transition. . . 111

6.5 Coupling in case of a low to high transition. . . 111

6.6 MOSFET body diode vs. Schottky diode. . . 112

B.1 k and m block association. . . 136

B.2 km and L block association. . . 138

C.1 Class-D amplifier transient model. . . 142

C.2 Chip photograph: 20 balls WL-CSP package [27]. . . 142

C.3 IC pin model according to the package. . . 142

C.4 Comparison between the simulated and the measured output spectra.143 C.5 Battery impedance . . . 144

C.6 Voltage of the battery when feeding a Class-D amplifier . . . 144

D.1 Board of the speaker load . . . 148

D.2 Impedances of the circuit in Fig. D.3 . . . 148

D.3 Speaker load equivalent circuit . . . 149

D.4 Speaker impedance measurements under temperature variations. . . 150

E.1 THD measurements of a linear amplifier and a ferrite bead. . . 152

E.2 THD measurements according to the signal amplitude at 1 kHz. . . 152

E.3 THD measurements according to signal frequency with Vin= 200 mV .153 F.1 Sch´ema de base d’un amplificateur de Classe D en boucle ouverte. . 159

F.2 Etage de puissance avec une cellule de commutation.´ . . . 159

F.3 Etage de puissance avec deux cellules de commutations.´ . . . 160

F.4 Exemple d’une modulation MLI.. . . 161

F.5 Spectre id´eal d’une MLI. . . 161

F.7 Modulation ternaire. . . 163

F.8 Contenu fr´equentiel d’un amplificateur de Classe D . . . 165

F.9 Emissions EM au niveau des rails de sorties.´ . . . 166

F.10 Mod`ele propos´e. . . 166

F.11 Mod`ele des blocs actifs.. . . 167

F.12 Calcul du spectre du courant `a la sortie du convertisseur. . . 170

F.13 Calcul du spectre de tensions et de courants apr`es un bloc nomm´e k.171 F.14 Filtre utilis´e.. . . 171

F.15 Charge utilis´ee pour les tests. . . 172

F.16 Application de l’approche sur un amplificateur de Classe D. . . 172

F.17 Tension de sortie de l’amplificateur avec deux charges diff´erentes. . 173

F.18 Imp´edances du filtre. . . 174

F.19 Courant d’entr´ee du filtre IINP lus. . . 175

F.20 Tension de sortie du filtre VOU TP lus. . . 175

F.21 Courant de sortie du filtre IOU TP lus. . . 176

F.22 Imp´edance de la batterie . . . 176

F.23 Amplitude de la tension aux bornes de la batterie . . . 177

F.24 Circulation de courants dˆus au filtre CEM. . . 178

F.25 Processus d’optimisation. . . 179

F.26 Courants de sortie du filtre. . . 181

F.27 Tensions de sortie du filtre.. . . 181

F.28 Tensions de sortie du filtre.. . . 183

F.29 Courant d’entr´ee du filtre. . . 183

F.30 Enveloppes des spectres de sorties des diff´erents filtres. . . 184

F.31 Pertes introduites par diff´erents filtres. . . 185

F.32 Exemple de mesure du bargraph et du taux de distorsion har-monique (THD) d’un amplificateur de Classe D avec et sans perles de ferrites. . . 185

F.33 Mod`ele d’une ferrite dans la bande audio.. . . 186

F.34 Perle de ferrite cas´ee en deux. . . 187

F.35 Circuit de validation. . . 187

F.36 Courant et tension de la ferrite. . . 188

F.37 Tension `a la charge. . . 188

List of Tables

2.1 Order of magnitude for Class-D audio amplifiers [17, 47, 48] . . . . 24

3.1 Filter components values. . . 40

3.2 Dummy load components values. . . 40

3.3 ADS filter models. . . 45

4.1 Reference filter component values [84]. . . 68

4.2 Power consumption obtained by simulation. . . 71

4.3 Component values and references for the power loss optimized filter. 71 4.4 Component values and references for the EMI optimized filter. . . . 74

4.5 Power consumption obtained by simulation . . . 74

5.1 JA parameters for three different magnetic materials [144] . . . 90

5.2 Parameters for the ferrite bead under test . . . 95

F.1 Ordre de grandeur d’un amplificateur de Classe D. [17, 47, 48] . . . 167

F.2 Valeurs nominales des composants du filtre. . . 172

F.3 Valeurs nominales des composants de la charge. . . 172

F.4 R´ef´erence des composants du filtre optimal. . . 180

Abbreviations

AA Audio Analyzer

ADS Advanced Design System

CISPR International Special Committee on Radio Interference

CM Common Mode

DM Differential Mode

DUT Device Under Test

EM ElectroMagnetic

EMC ElectroMagnetic Compatibility

EMI ElectroMagnetic Interference

EIS Electrochemical Impedance Spectroscopy

FCC Federal Communications Commission

FFT Fast Fourier Transform

GA Genetic Algorithm

IA Impedance Analyzer

IC Integrated Circuit

ICEM Integrated Circuit Electromagnetic Model

JA Jiles-Atherton

LISN Line Impedance Stabilization Network

MCM Multi-Carrier Modulation

MOSFET Metal Oxide Semiconductor Field Effect Transistor

PC Portable Computer

PCB Printed Circuit Board

PCM Pulse Code Modulation

PDM Pulse Density Modulation

PDN Power Distribution Network

PEEC Partial Element Equivalent Circuit

PWM Pulse Width Modulation

rms root mean square

S Scattering parameters

SC Short Circuit

SMPS Switched Mode Power Supply

SMT Surface Mounted Technology

SNR Signal to Noise Ratio

SOC State Of Charge

THD Total Harmonic Distortion

VCCI Voluntary Control Council for Interference

VNA Vector Network Analyzer

WL-CSP Wafer-Level Chip Scale Package

Chapter 1

Introduction

Nowadays, embedded electronic systems became a necessity for every working en-vironment and a companion in everyday life. Most of the time, many devices coexist on the same field or even many functionalities coexist in the same device. Hence, modern electronics offers complex devices that contain various kinds of applications, such as radio communication, navigation, audio, video, automation, control, etc. Therefore, analog and digital signals, high and low frequency signals, high and low power levels, etc., are taking place in the same package, or even more, on the same Printed Circuit Board (PCB). The decrease of the integra-tion scale which is reported for semiconductor scaling by Gordon Moore’s law [1], allows us to have more integrated scheme and more compact systems. The elec-tronic applications are then closer and the PCBs are highly packed with elecelec-tronic components. For instance, Fig. 1.1 shows the PCB of a modern smart-phone, where the electronic components are placed very close to each other. Therefore, due to the modern electronic requirements, Electromagnetic Compatibility (EMC) become a complex issue.

Design Phase Testing Phase Production Phase

Equipment Development, Time Scale Available

Techniques and Relative Cost to Solve

Noise Problem Techniques _Cost

Figure 1.2: Product development and noise reduction [5].

1.1

EMC, definition and concern

The EMC of two electronic systems is the fact that the two of them are able to operate in the same ElectroMagnetic (EM) environment, without exchanging any undesirable interference of EM energy. This can be done whether by minimizing the level of unintentional EM emission, whether by maximizing the level of im-munity against the unintentional EM emission, whether by limiting the coupling paths. In case of improper EMC, malfunctioning can occur which might lead to safety problems. The noise interference can for example disturb the police, fire and alarm communications, the radio and television broadcasting or even the air traffic control [2,3]. Therefore, EMC standards were established in many countries such as European countries (CISPR: International Special Committee on Radio Interference), USA (FCC: Federal Communications Commission), Japan (VCCI: Voluntary Control Council for Interference), etc., in order to define the limits for EM emission and immunity. A number of EMC standards is listed in [4].

EMI Filter

Class-D Amplifier

Figure 1.3: A Class-D amplifier and its dedicated EMI filter in the final application.

1.2

Problem background

Standalone and portable devices present an interesting solution for many applica-tions and usually they are powered by batteries (or by energy harvesting). Due to the variety of applications in a device, many supply levels are needed. Hence, to fulfill the power requirements of complex devices and for a longer autonomy, power converters and power management circuits are widely used. These compo-nents have a high level of EM emissions as they deal with power switching. In general, such circuits are well-filtered to limit the noise leakage onto the supply lines.

The present work is intended to study the EMC of integrated Class-D amplifiers (all the electronic units are integrated on the same silicon die). Generally, they are used in the systems where the primary function is display, audio, telecommu-nication, transmission, processing, etc., which generate unintentional EM emis-sions. Therefore, standards such as the EN55022 (Europe) [13] or the FCC-Part-15 Subpart-B (USA) [14] are often applied for these types of devices. According to these standards, the EMC study must be divided into conducted and radiated emissions. These norms define the conducted emission limits in the frequency band [150 kHz, 30 M Hz] and the radiated ones in the frequency band [30 M Hz, 1 GHz]. Dealing with both might need a long time period which exceed most probably the duration of a PhD thesis. Therefore, the present work focuses only on the conducted emissions generated by Class-D amplifiers.

As mentioned before, treating any EMC problem can be resumed to three different strategies: (i) reducing the emission of the aggressor, (ii) increasing the immunity or the victim or (iii) substituting the perturbation path. Knowing that a combi-nation between strategies can be very efficient. This work focuses on one single strategy which is the coupling path. Usually, Class-D amplifier chips are built by semiconductor manufacturers, afterwards, each system integrator uses the same chip design into its own application. Thus, the amplifier chip is mounted on a different PCB and placed in a different environment for each different application. The coupling path is then dependent from the application itself. Therefore, the passive surrounding of the Class-D amplifier, in particularly the EMI filter, must be correctly designed for each different case. Often, due to the lack of tools, their design is based on experimental tests, which is a long process that lead to subopti-mal solutions. In some cases, the previous design is also used for the newer version of the application which is not appropriate. Therefore, a method that predict the disturbances in the final application is then very interesting. Furthermore, an au-tomated design of the EMI filter, using an accurate modeling method can lead to optimal filtering solutions.

components such as magnetic components, the audio quality can be significantly reduced. Therefore, such phenomena must be carefully treated.

1.3

Objectives and scope of thesis

As a cooperation between four institutes, this PhD thesis have two different sides of objectives. On the first hand, the research laboratories AMP`ERE and INL focus on an innovative, rigorous and a scientific approach to reach the PhD goals. The AMP`ERE laboratory is specialized in the power electronics and in EMC. The INL laboratory is specialized in the analog design of integrated power circuits, in particularly Class-D amplifiers. On the second hand, both companies ST-Ericsson and ST-Microelectronics make sure that this Research and Development (R&D) work agree with the company perspectives. Both companies are worldwide lead-ers in semiconductor manufacturing, in particular integrated Class-D amplifilead-ers. Therefore, the thesis objectives, which are described by the following, are dissoci-ated as scientific objectives and company objectives.

1.3.1

Scientific objectives

According to the problem background which is presented in the precious section, the scientific objectives are set as follow:

• Develop a modeling approach for Class-D amplifiers which has a high ac-curacy in the conducted emission frequency band ([150 kHz, 30 M Hz]). It must be a predictive method with a short simulation time to be used at the early design stage. The modeling approach should be easily applied on any Class-D application.

magnetic components used for EMI suppression and analyze the occurring phenomenon in the audio frequency band.

1.3.2

Company objectives

The above mentioned companies produce integrated Class-D amplifier chips. The analog designers tend to create amplifiers with the lowest possible of EM emissions. However, this is not enough if the amplifier is improperly implemented in the final applications. Therefore, the company objectives can be resumed as follow:

• Develop a tool or a method that helps the system integrators in implementing the Class-D amplifiers. The goal is to assist the company costumers while integrating these circuits in their final application. The method must be accurate and provide the user the best EMC results. The approach need to be predictive, accurate and user friendly. In addition, it is favorable that this method be able to generate filtering solutions dedicated to a given application, without degenerating any of the amplifier original performance provided by the manufacturer.

1.4

Thesis structure

The rest of this report is organized as follow:

Chapter 2 gives a short introduction to Class-D amplifiers. Therefore, it explains some of the functioning principles and reveals the main causes for Class-D amplifier EM emissions. Afterwards, this chapter provide a quick review on the state of the art for EMI reduction regarding Class-D amplifiers.

second case is a DC-DC converter supplied by the battery. Here, the study has required to measure the high frequency impedance of the battery. Chapter 4 focuses on the automation of the EMI filter design. Therefore, the

model has been implemented in an optimization loop based on a genetic algo-rithm in order to optimize the filter response, and also, reduce the additional power losses introduced by an EMI filter. The optimization search space has been limited to the components available on the market and the optimiza-tion result is given as component references of the optimal filter referring to the optimal solution found. Afterwards, an experimental validation has been carried out.

Chapter 5 is intended to study and evaluate the impact of EMI filters on the audio quality of Class-D amplifiers. Thus, it models the EMI suppression components and investigate their behavior in the audio frequency band. For this purpose, the Jiles-Atherton model for magnetic materials has been used for ferrite bead modeling. Hereafter, the impact on the time and frequency domain signals has been simulated and compared to measurements. Finally, the total harmonic distortion (THD) has been computed for different signal amplitudes and compared to the THD measured using an audio analyzer. Chapter 6 concludes this report by summarizing the main ideas and results.

Chapter 2

Class-D Amplifiers from the

EMC Point of View

Class-D audio amplifier principles have been invented by Dr. A. H Reeves back in 1947 [15]. First practical designs appeared in the early 60’s [15] and after that, Class-D amplifiers kept evolving until today. Nowadays, they are able to provide higher than 95 % of power efficiency [16, 17]. Classical audio amplifiers such as Class-A, Class-B or Class-AB offer the best audio quality [18,19] comparing to the switching or the hybrid classes, but their power efficiency cannot exceed 78.5 % in theory [17,20]. Indeed, the Class-D amplifier is mainly used in embedded systems due to its power efficiency, but also, in addition to its smaller chip size, for low power applications it doesn’t need a heatsink to dissipate the heat due to the ohmic losses.

2.1

Class-D amplifier basics

Modulator Electric Audio Input Power Stage Modulated Pulse Train Low Pass Filter Amplified Pulse Train Acoustic Output Electric Audio Output

Figure 2.1: A block diagram of an open loop Class-D audio amplifier.

2.1.1

Power stages

Two different types of power stages can be distinguished:

The single ended power stage [21, 22]: The single ended power stage is shown in Fig. 2.2 and contains one switching cell. This, contains two MOSFET power switches which can be a N-MOSFET or a P-MOSFET. The output voltage VOU T which is the voltage across the load, can switch between the supply voltage

VS and the reference voltage 0 V . Note that most of the single ended topologies

enforce a DC current at the load which can be removed by placing a capacitor in series with the speaker.

The differential power stage [16, 23]: Also called H-Bridge power stage, the differential power stage is shown in Fig. 2.3. It contains two switching cells which can switch between VS and 0 V . Thus, the voltage across the load VOU T can

switch between VS, 0 V and −VS.

In both cases the gate drivers are used to ensure that for a single switching cell, the two power switches are never turned on at the same time [24], thus, prevent any short circuit between VS and 0 V which damaged the amplifier . This can be

done by introducing a dead time between turning off one switch and turning on the other one. During the dead time the MOSFET body diode is used as a free-wheeling diode to assure the current flow of the inductor. Therefore, the shortest a dead time is, the better it is because the body diode has higher conduction losses due to it’s narrower canal. Also, a longer dead time induce more audio distortion [24].

Gate Drivers V_S PWM V_OUT 0 V 0 V C

Figure 2.2: Single ended power stage.

Gate Drivers V_S PWM_PLUS VPLUS 0 V Gate Drivers V_S PWM_MINUS V_MINUS 0 V V_OUT

Figure 2.3: H-Bridge power stage.

to a 100 % of theoretical power efficiency. In the real world, the electrical units (transistors, diodes, inductors, capacitors, etc.) are not ideal, they have several imperfect properties such as the internal resistance, threshold voltage, leakage current, etc. that create power losses in the amplifier. Therefore, a typical power efficiency of a Class-D amplifier ranges between 80 % and 97 % [17].

differential topology.

2.1.2

Modulations

The signal at the output of a switching cell has the same shape as the modulated pulse stream, but with different voltage levels. The modulation type is then in direct relation with the structure of the amplifier output spectrum, which means a significant impact on the amplifier EMC, at frequencies related to the switching frequency. The most common modulation technique is the Pulse Width Modula-tion (PWM). However, other architectures and techniques also exist such as the Sigma Delta Modulation (Σ∆) [25], Pulse Code Modulation (PCM) [26], Pulse Density Modulation (PDM) [6] etc. A quick review for the PWM is given by the following.

2.1.2.1 The Pulse Width Modulation (PWM)

The PWM [27,28] can be obtained by comparing the audio signal [20 Hz ; 20 kHz] to a ramp waveform with a higher frequency, as shown in the example of Fig. 2.4. Generally, the carrier which is a double-sided sawtooth has a frequency at least two times greater than the maximum frequency of the audio frequency band which is 20 kHz [6, 16]. In practical implementations, the carrier frequency is chosen at least ten times greater than 20 kHz for a better audio reconstitution [16]. The switching frequency is then the same as the ramp signal frequency and the pulse widths are modulated according to the audio signal. As a square signal, it has harmonics on the odd multiples of the switching frequency. Thus, the amplifier output spectrum can be described by Fig.2.5. It contains the audio signal which is illustrated as sinusoidal signal in this figure, the switching frequency and its odd harmonics, in addition to the inter-modulation peaks located around each harmonic. The PWM spectrum components have been deeply studied in [29, 30]. Moreover, additional information concerning the carrier and it’s influence on the spectral content of a PWM can be found in [6].

0 0.5 1 1.5 -VSW 0 VSW Vol tage (V) Sawtooth Audio PWM 0 0.5 1 1.5 -VPWM 0 VPWM Time (ms) Vol tage (V) Figure 2.4: PWM modulation. Audio Signal Switching Frequency Harmonics Inter-modulation Frequency Amplitude H1 H2 H3 fA

Figure 2.5: Spectrum of a PWM signal.

Feedback V_PWM Gain Power Stage Output Gain × V_PWM V_Audio -+ Integrator

∫

Figure 2.6: Basic architecture of a Class-D amplifier [24].

2.1.2.2 PWM for differential Class-D amplifiers

In the case of a differential power stage, an additional modulation feature can be included. The power stage can switch according to a binary or a ternary modula-tion. Considering an ideal power stage, a description is given by the following.

Binary modulation: The binary modulation [16, 31] is obtained when the two switching cells of an H-Bridge are switching with complementary values (0 V and VS). Thus, they switch at the same time as shown in Fig. 2.7. Two modes

exist in the case of a differential topology, the first is the Common Mode (CM) which is given by equation (2.1). The second is the Differential Mode (DM) which is given by equation (2.2).

VCM =

VP LU S + VM IN U S

2 (2.1)

VDM = VP LU S− VM IN U S (2.2)

The output signal which is the same as the DM voltage, keeps the same shape as the original single switch PWM, but it doubles the amplitude by switching between VS and −VS. The output spectrum is then the same as the one shown in

0 0.5 1 1.5 -VS 0 VS V P LU S (V) PWM Audio 0 0.5 1 1.5 0 V MI N U S (V) 0 0.5 1 1.5 0 V D M (V) 0 0.5 1 1.5 0 V CM (V) Time (ms) VS -VS -VS -VS VS VS

Figure 2.7: H-Bridge binary modulation.

signal is equal to zero. Note as well that, for this type of modulation the output voltage or VDM switch with a step of 2 × VS.

Ternary modulation: The ternary modulation [16, 31] is obtained when the two switching cells of an H-Bridge switch at different time as shown in Fig. 2.8. On the first hand, the differential output voltage or VDM, switch between the

three available levels: VS, 0 V and −VS. In this case, two pulses appear on each

switching period of the original carrier, which doubles the switching frequency across the load. It implies in the frequency domain a cancellation of the odd harmonics, including their inter-modulations. The output voltage spectrum can be then expressed by Fig. 2.9. On the second hand, the common mode voltage or VCM keeps switching with and without audio signal which is a negative point in

0 0.5 1 1.5 0 VS V P LU S (V) PWM Audio 0 0.5 1 1.5 0 V MI N U S (V) 0 0.5 1 1.5 0 V D M (V) 0 0.5 1 1.5 0 V CM (V) Time (ms) -VS -VS -VS -VS VS VS VS

Figure 2.8: H-Bridge ternary modulation.

0 ms and 0.5 ms. In addition, the output voltage have a switching step equal to VS.

As a conclusion, the ternary architecture presents many advantages comparing to the binary architecture. It allows us (i) to remove the odd harmonic in the output spectrum, (ii) to have a zero current in the load in case of a zero audio signal and (iii) to have a low switching step in the output voltage. Therefore, it can be more often found among commercial integrated Class-D amplifiers. Fig.2.10 shows two architecture examples of a differential Class-D amplifier having a binary and a ternary modulation [27].

2.1.2.3 Self oscillating modulation

Audiov Signal Switching Frequency Harmonics Inter-modulation Frequency Amplitude H₁ H₂ H₃ f_A EvenvHarmonicsv Cancellation

Figure 2.9: Ternary modulation output spectrum.

the sliding mode or the bang-bang control. Some of the basics are given in the following:

The self oscillating modulation [7,32,33] can be obtained by creating an unstable feedback loop that force the system to oscillate. A basic architecture is given in Fig.2.11. The error signal which is the difference between the input and the output signals is integrated and injected into an hysteresis trigger. By a comparison to 0 V , the pulse train is obtained then amplified by the power stage to finally be fed to the speaker.

In such architecture, the switching frequency is dependent from the input signal level. Therefore, for an audio input, the switching frequency keep changing sys-tematically [32] which creates a spread spectrum phenomenon. This allows us to reduce the harmonic power and spread it around the central switching frequency. This is the main advantage of such modulation which lead to some peak reduction, thus, to a certain amount of EMI reduction [34]. The output spectrum can be then described by Fig. 2.12.

Feedback V_PWM-PLUS Gain Switching Cell V_Audio -+ Integrator

∫

(a) Binary modulation

Feedback V_PWM-PLUS Gain Switching Cell V_Audio -+ Integrator

∫

∫

Figure 2.10: Architecture of a differential Class-D amplifier.

2.2

EM emission of Class-D amplifiers

The switching nature of a Class-D amplifier provides an important advantage, which is the power efficiency. However, the switching behavior is also the source of EMI generated by such an amplifier.

2.2.1

EMI at the output rails

Feedback V_PWM Gain Power Stage Output Gain × V_PWM V_Audio -+ Hysteresis Trigger Integrator

∫

Figure 2.11: Basic architecture of a self oscillating Class-D amplifier.

Audio Signal Switching Frequencies Harmonics Inter-modulation Frequency Amplitude H1 H2 H3 fA

Figure 2.12: Self oscillating Class-D amplifier output spectrum.

frequency. These harmonics decrease by a negative slope equal to −20 dB/decade. A real voltage waveform has a certain non-zero rise and fall time [35]. It is then a better approximation to consider the pulse stream as a trapezoidal waveform (Fig.2.13(c)). This latter presents as well odd harmonics over the frequency band (Fig. 2.13(d)), similar to the case of a square waveform. However, in the case of trapezoidal waveform, the harmonics decrease by a slope of −40 dB/decade after a corner frequency. If the rise and fall time are equal and called τr, the corner

frequency can be calculated by equation (2.3).

fc=

1 πτr

Finally, in the case of a Class-D amplifier, the duty cycle of the square signal is modulated according to the audio signal (Fig. 2.13(g)). Thus, additional peaks appear in the frequency spectrum (Fig. 2.13(h)) which correspond to the inter-modulation (also called side bands) between the carrier and the audio signal. A Class-D amplifier generates a pulse stream that combines all the above features. In addition, many other features such as the MOSFET body diodes, switching dead time, disparity among component properties and component nonlinearities, etc., affect directly the output signal. Thus, a Class-D amplifier which mix the high power delivery with the complex output spectrum, appear to be a serious source of EM emissions.

Often, in electronic applications, the Class-D amplifier is placed distant from the speaker load. Thus, the long cables or PCB tracks used for connecting these two, are problematic in EMC. The conducted noise that propagates through long con-ductors and interfere with the surrounding electronics by inductive or capacitive coupling. Also, if the conductors are sufficiently long they behave as antennas. In this case, the EM emissions propagates in the atmosphere and provoke radiated emissions.

2.2.2

EMI at the supply rails

0 2 4 6 8 10 -1 0 1 2 3 4 5 6 Squ ar e (V ) Time (µs₎

(a) Square signal in the time domain

1002 103 104 105 106 107 108 20 40 60 80 100 120 140 Squ ar e (dB µ V) Frequency (Hz) -20 dB/Decade

(b) Square signal in the frequency domain

0 2 4 6 8 10 -1 0 1 2 3 4 5 6 Tr ap ez oid (V) Time (µs) Rise time Fall time

(c) Trapezoid signal in the time domain

1002 103 104 105 106 107 108 20 40 60 80 100 120 140 Tr ap ez oid /(dB µ V) Frequency/(Hz) -20 dB/Decade _-40 dB/Decade

(d) Trapezoid signal in the frequency do-main 0 2 4 6 8 10 -1 0 1 2 3 4 5 6 Squ ar et&tRin gin gt(V ) Timet(µs) Ringing & Overshoot

(e) Square signal with ringing in the time domain 1002 103 104 105 106 107 108 20 40 60 80 100 120 140 Squ ar eO&ORin gin gO(dB µ V) FrequencyO(Hz) Ringing & Overshoot

(f) Square signal with ringing in the fre-quency domain 0 2 4 6 8 10 -1 0 1 2 3 4 5 6 Mo dul ate dcSqu ar ec(V ) Timec(µs₎ WidthcModulation AcoordingcTo Sinewave

(g) Modulated square in the time domain

102 103 104 105 106 107 108 0 20 40 60 80 100 120 140 Mo dul ate dASqu ar eA(dB µ V) FrequencyA(Hz) Audio Signal Inter Modulation Switching Frequency

(h) Modulated square in the frequency domain

0 V

Figure 2.14: EMI emissions at the supply level.

2.2.3

EMC solutions

Class-D amplifiers are a serious source of EM emissions which is a crucial problem. Therefore, reducing their emissions has been one of the main interest of electronics designers for many years. For this purpose, numerous circuit design solutions have been created. A quick review is given by the following.

One of the most adopted techniques in power electronics is to control the switching transitions of the power stage [11, 36]. As can be seen from Fig. 2.13(c) and Fig. 2.13(d), the rise and the fall time of the trapezoidal waveform are in a direct relation with the frequency content of their spectrum. The more the rise/fall time is long (slow), the more the corner frequency is low and vise versa. Thus, for f > _πτ1

r, a trapezoidal waveform with a long rise/fall time has a frequency spectral

content which is lower than the one with a short rise/fall time [37]. This technique is cheep and simple to implement. However, a slow switching time increases the switching losses, thus, a trade-off must be made between the power efficiency and the EMI.

the EMI. The main drawback of this technique is the negative impact on the audio quality.

Recently, there has been a considerable interest in developing the active filtering technique [39–41]. The idea behind it is to sense the generated noise, then subtract it from the desired signal. This is an effective technique to reduce the EMI. However, it increases the complexity of the system control as well as the power losses of the converter.

The Multi-Carrier Modulation (MCM) [42, 43] is a technique where the audio signal is modulated twice, by two different carriers having two different frequencies. Two PWM signals are obtained, then combined by a logic circuit to deduce a single pulse stream. This latter has a frequency spectral content lower than the one of a single carrier, because the energy is split in two spectral components. This technique drawbacks are the reduced audio quality, the additional power losses and the additional inter-modulation peaks.

The most used EMI suppression method is the passive filtering [3, 12]. Even with the above presented techniques, most of the time, the passive filtering is unavoidable. Many different forms of passive filters exist such as the classical first, second or third order LC filters, the decoupling capacitors, the ferrite beads, the coupled inductors etc. Indeed, they have also a negative impact on the system performance like the audio quality degradation in case of nonlinear behavior [44], or the increase of power losses. However, it is still the most used technique to reduce the EMI.

2.3

Characterizing a Class-D amplifier

Eventually, apart the EMC and power efficiency, there exists many criteria in order to evaluate a Class-D amplifier. Some of them are used to evaluate the amplifier power characteristics, some others are used to evaluate the amplifier audio performance in the audio frequency band. Table2.1 gives important orders of magnitude and few definitions are given in appendix A. Furthermore, more information about characterizing and evaluating a Class-D amplifier can be found in [46].

Table 2.1: Order of magnitude for Class-D audio amplifiers [17,47,48]

Magnitude [Unit] Minimum value Maximum value

Output power [W] 0.5 300

Power efficiency at full scale [%] 80 97

Supply voltage [V] 2.5 100

Audio frequency [Hz] 20 24000

Switching frequency [kHz] 100 3000

Switching Rise/Fall time [ns] 5 50

Load resistance [Ω] 2 64

Total Harmonic Distortion [dB] 50 90

Signal to Noise Ratio [dB] 80 110

Power Supply Rejection Ratio [dB] 60 110

Silicon area [mm2_{] 0.1 10}

Chip price (PCB not included) [$] 0.1 15

EMI filter price [$] 0.5 10

2.4

Summary

from the EMC point of view. Thus, Class-D amplifiers are a serious source of EM emissions and can be problematic in many embedded applications.

According to the state of the art, the EMI of Class-D amplifiers is big a concern for electronic engineers. They developed numerous methods and techniques that reduce the emissions of these amplifiers. Fine results have been obtained, however, in industrial applications these techniques are not enough due to the severity of the EMI standards and the complexity of modern electronics. Therefore, EMI filters are always needed to ensure the EMC of Class-D amplifiers.

Chapter 3

EMI Modeling of Class-D Audio

Amplifier

The simulation is one of the ultimate tools that allows the electronic designers understand the physics and predict the performance of their design in the real world. The key of making the right simulation is simply choosing the right model. In our case, the model must be able to provide information about the spectral content of a Class-D amplifier, in order to design the right passive environment of the Class-D amplifier chip. To do so, this chapter aims then to to find the most adapted technique for Class-D amplifier modeling. Therefore, the solutions that seem to be adapted for this study are, whether the time domain simulations followed by a Fast Fourier Transform (FFT), whether the frequency domain macro-modeling.

3.1

Time domain simulations

Partial Element Equivalent Circuit (PEEC) modeling method has been used to extract the parasitic elements of the PCB of a DC-DC converter. The model is implemented in a transient simulation in order to forecast the EM emission. Transient simulations have been also applied in [45] in order to study the EM environment of the Class-D amplifier.

As can be seen, transient time domain simulations are widely used for EMI pre-diction. However, it cannot be used in our case for many different reasons. First, to obtain a good accuracy at high frequencies, the model must be minutely built. It must include all the parasitic components of the circuit, including those of the imperfect electric units, those of the IC packaging, those of the imperfect conduc-tors and connecconduc-tors, those of the physical architecture of the system, etc. This can be a long process, especially for designing the passive environment of the am-plifier. For each different implementation the passive environment is different and the modeling process must start all over again. Second, one transient simulation can take a very long time which depend usually on the modeling complexity and details. One simulation can take hours, days or even weeks. In the present study, this can be problematic because designing the passive environment might need numerous retake to be accomplished. Third, and from the company point of view, these models cannot be provided to the costumers because of confidentiality rea-sons. Therefore, it is then more adequate to adopt the frequency macro-modeling technique which will be discussed in the next section.

3.2

Frequency domain modeling

According to our best knowledge the frequency domain modeling has never been applied for any Class-D amplifier system. Therefore, the state of the art presented in this subsection refers to other types of power converters.

In [53] the authors have used two models in the frequency domain composed of lumped components distribution, in order to predict the resonance effect present in the CM noise of a Switched Mode Power Supply (SMPS). This approach will be more complicated if applied on a complex spectral content containing several resonances. In addition, it deals only with the CM noise.

to achieve a high level of accuracy at high frequencies. References [54, 55] deal with the S-parameters in order to study the performance or the insertion loss of a multi-phase EMI filter. However, in those papers, only a single part of the system is studied which is not optimal as the EMI behavior of a system highly depends on the load impedance and the source emissions. These issues can also be found in [56] where the authors modeled the multi-layer PCB tracks using S and Z parameters in order to study the mode conversion on differential lines. The article [57] models a multi-conductor cable in order to study the conducted emissions in a propagation path. The distributed parameter circuit model has been adopted in order to create two separate models for the CM and the DM. Afterworlds, the transfer function is used to evaluate the EMI at the load. Some differences can be seen between the experimental and the simulated results. This can be due to the mode conversion which is not taken into account in this approach. Another model has been presented in [58, 59]. The model consists of two current sources and three impedances to describe the entire system. To determine the five parameters of the model, five equations are needed. Thus, different measurements on different operating conditions are made and the parameters are extracted. Such method has a high level of abstraction and can be interesting to make system level simulations. However, it is less interesting in our case where the main interest is to design the passive environment of the system itself.

In [60] an electric-vehicle-drive system have been modeled using the admittance measurements. Interesting results have been obtained, however, only a CM current calculation is possible. In addition several symmetry approximations have been taken in order to built the model.

The authors in [66] have created a model to compare a balanced and an unbalanced architectures of data transmission on the power line network of spacecraft. The model allows to evaluate the signal transfer function of the data transmission over the frequency band. However, several assumptions have been considered for the sake of simplicity. For example the DC-DC converter input filter has been assumed as two ideal inductances. This can be problematic when studying the EMC because it reduces the accuracy at high frequencies. In addition, only the CM study has been carried out as it contributes mainly to the radiated emissions. By considering the needs of this study, the modeling approach should meet the following specifications.

1. Accurate at high frequencies, especially in the conducted EMI frequency band.

2. Can be applied on a single-ended or a differential Class-D amplifier. 3. Take into account the DM, the CM and the mode conversion. 4. Bring out the different coupling paths of the system.

5. Can be used at the design stage. 6. Has a fast simulation time.

Thus, none of the above approaches meet the requirements for Class-D amplifiers. Additionally, on each different case in the state of the art, approximations have been taken in order to simplify the model and treat one particular case. Moreover, the articles [60–62, 64, 65] were only using measurements on a prototype which make them less usable at the early design stage. Therefore, next section proposes a new modeling approach that fuse the advantages of the different methods presented earlier.

3.3

Proposed frequency domain modeling

Power

converter Block (1)Passive

Passive Block (n-1)

Passive Block (n)

N N N

Figure 3.1: System decomposition into blocks.

chain, on the one hand there are the active blocks, such as switching amplifiers, power converters, etc. On the other hand, there are the passive blocks such as filter, load, tracks, etc. Note that passive blocks can also be divided into several blocks if needed. This will help improve the design of a given system part, such as filter and PCB layout. However, the below requirements must be verified before any usage of this method:

• No feedback control for the converter coming from the following passive blocks. In the opposite case, output voltages are dependent on the passive circuit which makes the model invalid.

• No significant electromagnetic coupling between blocks. A block impedance matrix is independent from the other blocks. In other words, the block behavior do not change after segmentation.

• Block should be sufficiently short to be considered electrically short (block dimensions  wavelength).

• Passive components are used in their linear operating range.

3.3.1

Active blocks model

Active blocks with N active conductors can be modeled with N electric sources and a 2N × 2N impedance matrix as shown in Fig. 3.2. Determining the electric sources and the output impedance matrix cannot be generalized. Each particular circuit has its dedicated set of measurements. Many measurement possibilities can be imagined, such as: open circuit (if possible), loaded, open circuit when loading other ports, etc. Otherwise, a quick review on the noise source impedance extraction is given below.

ZOUT (2N 2N) AC 1 AC N V_{OUT 1} V_{OUT N} AC 2 Switching Output impedance V_{OUT 2} . . .

Figure 3.2: Active block model.

approach allows us to measure the noise source impedance of an SMPS under operating conditions. The method consist in using two current probes. The first is used to inject a continuous wave with a sweeping frequency and the second is connected to a Vector Network Analyzer (VNA) and used to sense the resultant current in the circuit. Using the voltage image of the current injection and the measured current, it is possible to compute the unknown impedance of the SMPS. In [69–71] the authors present the Integrated Circuit Electromagnetic Model (ICEM). The model consists of a Power Distribution Network (PDN) and a current noise source. The method starts by measuring the PDN of an IC using a VNA. The PDN is the passive network that connect the different supply and ground pins of the IC. Afterwards, a Resistance, Inductance, Capacitance (RLC) model, equiva-lent to the PDN is created by fitting. Finally, thanks to the PDN and the current measurement on the IC pin, the internal current noise source is computed.

The authors in [72] propose to make three different measurements of the noise source with three different loading conditions. These allows us to have three different equations which allows the computation of the noise source as well as the real and the imaginary parts of the noise source impedance.

3.3.2

Passive block types and models

Passive

Block (n)

Figure 3.3: Type A : 2N +1 ports.

Passive

Block (n)

V₁ V_N

I₁

Figure 3.4: Type B : N + 1 ports.

Fig. 3.3. Type B is intended for blocks situated at the end of the chain and can only be connected from its inputs with N + 1 ports (Fig. 3.4). More precisely, Type B blocks are intended for loads because usually they only have an electrical input, but with other types of physical output (mechanical, thermal and acoustic, etc.).

According to Fig. 3.3, Type A blocks have 2N voltages and 2N currents, so their impedance matrix dimension is 2N × 2N as shown in (3.1).

    V1 .. . V2 N     =     z_{1 1} . . . z_{1 2N} .. . . .. ... z_{2N 1} . . . z_{2N 2N}     ·     I1 .. . I2N     (3.1)

Similar to Type A blocks, Type B blocks have N × N impedance matrix because they have N voltages and N currents as shown in (3.2). Note that an impedance matrix of a passive circuit is symmetric with respect to the diagonal due to the reciprocity theorem [74] (Zij = Zji ; ∀i ; ∀j ; i 6= j).

    V1 .. . VN     =     z_{1 1} . . . z_{1 N} .. . . .. ... zN 1 . . . zN N     ·     I1 .. . IN     (3.2)

3.3.3

Impedance matrix determination

Passive

Block (n)

V

I

Passive

Block (n)

V

I

V

= 0

3.3.3.1 Impedance matrix determination by impedance analyzer

Determining an impedance matrix using an IA requires two steps. First of all, diagonal elements are measured. Equation (3.3) and Fig. 3.5 show that zii is the

input impedance of the i port.

zii = Vi Ii     Ij=0 ; i 6= j ; j = 1 . . . (2)N (3.3)

In practical term, the IA is connected directly to the ith _{port to measure z}

ii when

the remaining ports are open circuits (Ij = 0 A ; j 6= i).

The second step is to measure the off-diagonal elements (zij ; i 6= j).

Equa-tion (3.4) shows how to determine the cross elements theoretically.

zij = Vi Ij     Ii=0 ; i 6= j ; i = 1 . . . (2)N (3.4)

Nevertheless, it is not possible to apply this in practice with a single port IA and it is delicate to apply with dual-port IA. According to equation (3.4), this method needs a current injection on the jth port and exact voltage amplitude and phase sensing on the ith port with Ii = 0 A. Instead, equation (3.5) gives an alternate

user-friendly method for the determination of the cross elements. The proof of (3.5) is given in appendix B.1.

zij =

q

zjj(zii− zijsc) ; i 6= j (3.5)

Where zijsc is the impedance measured from the i

th _{port when the j}th _{port is in}

Short Circuit (SC) (Fig. 3.6), zii is the ith diagonal element presented by (3.3), zij

3.3.3.2 Impedance matrix determination by VNA

To determine an impedance matrix of a passive block, first, the scattering matrix is measured. Second, equation (3.6) can be used to convert it to an impedance matrix. More information about this equation and it’s application can be found in [76].

Z = (I − S)−1· (I + S) · Z0 (3.6)

Z is the impedance matrix, S is the scattering matrix, I is an identity matrix and Z0 is the characteristic impedance of the VNA (usually 50 Ω).

Note that, a VNA can introduce significant measurement uncertainty. The latter depends on the frequency range, the element type (diagonal or cross element) and the measured impedance level compared to 50 Ω [77–80].

3.3.3.3 Impedance matrix determination by simulation

The advantage of simulation is determining the impedance matrices before con-struction, so the designer needs to build fewer prototypes. Moreover, the only frequency band limitation is the modeling details, which means the model valid-ity. Otherwise, the band can be chosen by the user. Also, if needed, it is possible to study the influence of the uncertainty and the disparity of the components due to the fabrication procedure [81].

3.3.4

Impedance matrix association

Power converter Type A (1) Type A (2) Type B Type A (1+2) Type B Power converter Resulting Matrix V1 VN

Figure 3.7: Block association technique.

3.3.4.1 Association of 2 Type A blocks

Two Type A blocks are considered to describe this association: The first called k with an impedance matrix Zk and the second called m with an impedance matrix

Zm. Zk and Zm are divided into 4 sub-matrices having the same dimensions

(N × N ) as shown in (3.7). Zk= Zk 1 1 Zk 1 2 Zk 2 1 Zk 2 2 ! ; Zm = Zm 1 1 Zm 1 2 Zm 2 1 Zm 2 2 ! (3.7)

Then, equation (3.8) gives the association method. Note that, the proof of this equation is given in appendix B.2.