The following tables list what addressing modes the assembler will choose for the various operand syntaxes.
SYNTAX TERM DEFINITION
An R epresents an address register.
Dn R epresents a data register.
Rn R epresents either an address or data register, or a suppressed register (Z An or Z Dn). as68k does not recognize the mnemonic R n.
< abs exp> R epresents an absolute expression, including an external reference with no section specified.
< rel exp> R epresents a relocatable expression, including an external reference with a section specified.
< exp> R epresents either an absolute or relocatable expression.
{ } R epresent a field that may or may not be present. (Note that the braces are required syntax in the 68020 BFxxx instructions, however.)
Table 4-7. Definition of Syntax Terms Assembler Syntax for Effective Address Fields
Dn An
The operands Dn and An always result in the Data Register Direct (I) and the Address Register Direct (II) modes, respectively.
(An) (An)+
-(An)
The operands "(An)","(An)+ " and "-(An)" always result in the Address Register Indirect (III), Address Register Indirect with Postincrement (IV), and Address Register Indirect with Predecrement (V) modes, respectively.
# < exp> This operand results in the Immediate (XII) mode. An absolute expression must be within a certain size range that is dependent on the instruction and qualifier code. 8-16- and 32-bit immediate data can be a relocatable expression.
(< exp> ,An) This operand is resolved as Address Register Indirect with Displacement (VI), provided the expression fits in 16 bits (sign-extended). The assembler assumes an external expression will fit into 16 bits.
If the expression does not fit in 16 bits, the 68020 model mode Address Register Indirect with Base Displacement and Index (VIIb) is used. The specified A-register is used as the Address R egister and the Index R egister is taken to be null.
As a special case, "(0,An)" generates the more efficient Address Register Indirect (III) despite the explicit zero displacement. A programmer who wishes to generate an explicit zero displacement will have to use an external symbol.
These operands generate the 68020 mode Address Register Indirect with Base Displacement and Index (VIIb). The specified register is used as the Index register.
Table 4-8. Operand Syntax & Addressing Modes
Assembler Syntax for Effective Address Fields
(< abs exp> ,An,Rn,{ .W| .L} { *scl} ) (An,Rn{ .W| .L} { *scl} )
If the target microprocessor is not the 68020/30/40 or 68331/332, the address mode generated is Address Register Indirect with 8-Bit Displacement and Index (VII). The < abs exp> must resolve to an 8-bit, sign extended value. Otherwise, an error will occur. If the target microprocessor is the 68020/30/40 or 68331/332, the following cases determine the address mode generated:
1. If < abs exp> is backward defined, its value fits in 8 bits, and the scale factor is 1, the Address Register Indirect with 8-Bit Displacement and Index (VII) 68000 model mode is generated. If the scale factor is greater than 1 (2, 4, or 8), then the 68020 model mode VIIa is generated.
2. If < abs exp> is backward defined and its value is greater than 8 bits, the Address Register Indirect with Base Displacement and Index (VIIb) mode is generated.
3. If < abs exp> is forward defined and its value fits in 8 bits and the scale factor is 1, the Address Register Indirect with 8-Bit Displacement and Index (VII) 68000 model mode is generated. If the scale factor is greater than 1 (2, 4, or 8), then the 68020 model mode VIIa is generated.
4. If < abs exp> is forward defined and its value is greater than 8 bits, an error occurs because the assembler assumes that any forward defined absolutes will fit into 8 bits.
If < abs exp> is absent, a displacement of 0 is used.
R eading left-to-right, the first A-register found that does not have size code or scale factor is the Address register.
The other register is the Index register.
Table 4-8. Operand Syntax & Addressing Modes (Cont’d) Assembler Syntax for Effective Address Fields
(< rel exp> ,An,Rn{ .W| .L} { *scl} ) If the target microprocessor is not the 68020/30/40 or 68331/332, this syntax always results in an error because the assembler did not allocate enough memory on the first pass.
If the target microprocessor is the 68020/30/40 or 68331/332, this syntax results in the Address Register Indirect with Base Displacement and Index (VIIb). If
< rel exp> is forward defined, an error occurs because the assembler did not allocate enough memory on the first pass.
R eading left-to-right, the first A-register found that does not have size code or scale factor is the Address register.
The other register is the Index register.
([ . . .] ,Rn . . .)
([ < exp> ,An] ,Rn{ .W| .L} )
Any operand containing square brackets with a register specified outside the brackets (necessarily an Index R egister), but not containing "PC" or "Z PC", generates the 68020 model Memory Indirect Post-Indexed (VIIc) mode.
Any registers and displacements not specified are taken to be null. Any relocatable displacements are assumed to be 16 bits unless specified to be 32 bits by enclosing the expression in parentheses and attaching .L, i.e., (< exp> ).L.
([ . . .,Rn] , . . )
([ < exp> ,An,Rn{ .W| .L} ] )
Any operand which contains square brackets, with no register specified outside the brackets, and no "PC" or
"Z PC" inside the brackets, generates the 68020 model Memory Indirect Pre-Indexed (VIId) mode. Any registers and displacements not specified are taken to be null. Any relocatable displacements are assumed to be 16 bits unless specified to be 32 bits by enclosing the expression in parentheses and attaching .L, i.e., (< exp> ).L.
(< exp> ,Dn,Rn{ .W| .L} ) (Dn,Rn{ .W| .L} )
These operands are invalid. One of the two registers must be an A-register or PC.
Table 4-8. Operand Syntax & Addressing Modes (Cont’d)
Assembler Syntax for Effective Address Fields
(< exp> ,PC) This operand always results in Program Counter Indirect with Displacement (X) mode.
If < exp> is an absolute expression, it is by default taken to be an address. The flag NOABSPCADD may be used to cause the absolute expression to be used as the displacement.
If < exp> is an address, the displacement is calculated to be the value of < exp> minus the current value of the program counter. Sometimes, the assembler can calculate the displacement; in most cases, the calculation is
postponed until link time when the actual location of both the instruction and the operand are known.
Table 4-8. Operand Syntax & Addressing Modes (Cont’d) Assembler Syntax for Effective Address Fields
(< exp> ,PC,Rn{ .W| .L} { *scl} ) (PC,Rn{ .W| .L} { *scl} )
This operand results in modes XI, XIa, or XIb according to the following rules.
1.If < exp> is relocatable. If < exp> is defined in the same section and the same source file as the instruction, the assembler can calculate the relative distance between < exp>
and the instruction. Otherwise, the assembler cannot calculate the relative displacement and this calculation must be performed at link time.
a. If the assembler can calculate the displacement and this displacement will fit into 8 bits sign-extended, then mode XI is chosen.
b. If the assembler can calculate the displacement, this displacement will fit into 8 bits sign-extended, and a scale factor greater than 1 is specified, then mode XIa is chosen.
c. If the assembler cannot calculate the displacement or the displacement will not fit into 8 bits sign-extended, mode XIb is chosen.
2. If < exp> is absolute.
a. If the ABSPCADD flag is in effect and the instruction is also in an absolute section. In this case, the assembler can calculate the distance between < exp> and the instruction.
- If the displacement will fit into 8 bits sign-extended, mode XI will be chosen. A scale factor greater than 1 will cause mode XIa.
- If < exp> is backward defined and the displacement is larger than 8 bits, mode XIb is chosen.
- If < exp> is forward defined and the displacement is larger than 8 bits, an error will occur because the assembler did not allocate enough space on pass 1.
Table 4-8. Operand Syntax & Addressing Modes (Cont’d)
Assembler Syntax for Effective Address Fields
b. If the ABSPCADD flag is in effect and the instruction is in a relocatable section.
- If < exp> is backward defined, mode XIb is chosen.
- If < exp> is forward defined, an error will occur because the assembler did not allocate enough space in pass 1.
c. If the NOABSPCADD flag is in effect. If < exp> will fit into 8 bits sign-extended, mode XI is chosen. A scale factor greater than one will cause mode XIa. If < exp>
will not fit into 8 bits, then mode XIb is chosen.
((< exp> ).W,PC,Rn{ .W| .L} { *scl} ) ((< exp> ).L,PC,Rn{ .W| .L} { *scl} )
A size qualifier on < exp> , e.g. (< exp> ).W or (< exp> ).L causes mode XIb to be chosen.
([ . . .,PC] ,Rn,. . .) ([ < exp> ,PC] ,Rn{ .W| .L} )
Any operand containing square brackets, with PC or Z PC inside, and a register specified outside the brackets (necessarily an Index R egister), generates the 68020 model Program Counter Memory Indirect Post-Indexed (XIc) mode. When Z PC is used, the specified < exp> for the base displacement is always taken to be the displacement itself (in other words, the PC contents are not subtracted from it). At run-time, the PC is not used to create the effective address.
([ . . .,PC,Rn] , . . .) ([ < exp> ,PC,Rn{ .W| .L} ] )
Any operand which contains square brackets, with PC or Z PC inside, and no register specified outside, generates the 68020 model Program Counter Memory Indirect Pre-Indexed (XId) mode. When Z PC is used, the specified < exp> for the base displacement is always taken to be the displacement itself (in other words, the PC contents are not subtracted from it). At run-time, the PC is not used to create the effective address.
Table 4-8. Operand Syntax & Addressing Modes (Cont’d) Assembler Syntax for Effective Address Fields
< exp>
The operand < exp> results in one of three modes: Absolute Short (VIII), Absolute Long (IX), or Program Counter Indirect with Displacement (X). In most cases, good results will be obtained by allowing the assembler to use its default action.
Note The PCR assembler flag (see the OPT assembler directive) controls the selection of addressing modes from a relocatable section to the same relocatable section in the same module.
You should note the following facts carefully before using the "< exp> "
addressing modes table:
• The table does not apply to the Bcc or DBcc instructions, which use Program Counter plus Displacement mode.
• The final choice between address modes VIII and IX may be specified by the .S or .L qualifier on the JMP and JSR instructions. These qualifiers will not cause an absolute mode to be used instead of mode X, nor will they cause a reference to a location that is known to be in
short-addressable memory to use absolute long mode.
The operand forms "(< exp> ).W" and "(< exp> ).L" are subject to the same rules as < exp> with the following clarifications:
• If an absolute (as opposed to a PC-relative) mode is chosen, "(< exp> ).W"
forces the Absolute Short (VIII) mode and "(< exp> ).L" forces the Absolute Long (IX) mode.
• On forward references, "(< exp> ).W" forces 16 bits of extension to be allocated while "(< exp> ).L" forces 32 bits of extension to be allocated.
Assembler Syntax for Effective Address Fields
Instruction Section Type
Expression Type
ABS < abs exp> < rel exp> unknown
(forward ref) short, then VIII, else IX.
If OPT F is set, then
Else, if section of operand is short, then VIII, else IX.
If OPT F is set, then 2 bytes allocated, else 4 bytes allocated.
ABS External R eference in Specified Section
External R eference in Unspecified Section
If section of operand is short, then VII, else IX.
If operand was defined in XR EF.S or if OPT F set, then VII, else IX.
REL If OPT R set, then X.
Else, if section of operand is short, then VIII, else IX.
If operand was defined in XR EF.S or if OPT F set, then VIII, else IX.
Table 4-9. Choosing Address Modes for < exp>
Assembler Syntax for Effective Address Fields