Logic Diagram

PRESET

~

CLEAR _I 0

I I

~ ^{I '0}

CLOCK

~

D

TLIF/6109-2

~ Semiconductor

^NatiOnal

Corporation

DM54ALS86/DM74ALS86

Quad 2-lnput Exclusive-OR Gates

PRELIMINARY

General Description

This device contains four independent gates, each of which performs the logic exclusive-OR function.

• Advanced oxide-isolated, ion-implanted Schottky TTL process

Features

• Switching specifications at 50 pF

• Functionally and pin for pin compatible with Schottky and low power Schottky TTL counterpart

• Improved AC performance over Schottky and low pow-er Schottky countpow-erparts

• Switching specifications guaranteed over full tempera-ture and

Vee

range

Connection Diagram

Function Table

Dual-In-Llne Package vee B4 A4 Y4

A1 81 Y1 A2 82 Y2 GND

TL/F/6195-1

Order Number DM54ALS86J, DM74ALS86M or DM74ALS86N See NS Package Number J14A, M14A or N14A

Y = A G) B = AB

+

AB Inputs

A B

L L

L H

H L

H H

H = High Logic Level L = Low Logic Level

Output Y L H H L

This document contains Information on a product under development. NSC reserves the right to change or discontinue this product without notice.

Absolute Maximum Ratings

If Military/Aerospace specified devices are required, Note: The "Absolute Maximum Ratings" are those values contact the National Semiconductor Sales Office/ beyond which the safety of the device cannot be guaran-Distributors for availability and specifications. teed The device should not be operated at these limits. The Supply Voltage 7V parametric values defined in the "Electrical Characteristics"

Input Voltage 7V table are not guaranteed at tlJeabsolute maximum ratings.

The "Recommended Operating Conditions" table will define Operating Free Air Temperature Range the conditions for actual device operation.

DM54ALS - 55°C to + 125°C

DM74ALS O°Cto + 70°C

Storage Temperature Range - 65°C to + 150°C

Recommended Operating Conditions

Symbol Parameter DM54ALS86 DM74ALS86

Units

Min Nom Max Min Nom Max

Vee Supply Voltage 4.5 5 5.5 4.5 5 5.5 V

VIH High Level Input Voltage 2 2 V

VIL Low Level Input Voltage 0.7 0.8 V

10H High Level Output Current -0.4 -0.4 rnA

10L Low Level Output Current 4 8 rnA

TA Free Air Operating Temperature -55 125 0 70 °C

Electrical Characteristics

over recommended operating free air temperature range. All typical values are measured at Vee = 5V, T A = 25°C.

Symbol Parameter Conditions Min Typ Max Units

VIK Input Clamp Voltage Vee = 4.5V, II = -18 rnA -1.5 V

VOH High Level Output 10H = -0.4 rnA

Vee - 2 V

Voltage Vee = 4.5V to 5.5V

VOL Low Level Output Vee = 4.5V 54174ALS

0.25 0.4 V

Voltage IOL = 4mA

74ALS

0.35 0.5 V

IOL = 8 rnA II Input Current @ Max. Vee = 5.5V, VIH = 7V

0.1 rnA

Input Voltage

IIH High Level Input Current Vee = 5.5V, VIH = 2.7V 20 /-LA

IlL Low Level Input Current Vee = 5.5V, VIL = 0.4V -0.1 rnA

10 Output Drive Current Vee = 5.5V Vo = 2.25V -30 -112 rnA

Ice Supply Current Vee = 5.5V, All Inputs at 4.5V 3.9 5.9 rnA

Switching Characteristics

over recommended operating free air temperature range (Note 1).

Symbol Parameter Conditions DM54ALS86 DM74ALS86

Units

Min Max Min Max

tpLH Propagation Delay Time (Note 2) A or 8 to Y

3 22 3 17

Low to High Level Output Other Input Low ns

tpHL Propagation Delay Time

2 14 2 12 ns

High to Low Level Output

tpLH Propagation Delay Time A or 8 to Y

3 22 3 17

Low to High Level Output Other Input High ns

tpHL Propagation Delay Time

2 12 2 10 ns

High to Low Level Output Note 1: See Section 1 for test waveforms and output load.

Note 2: vee = 4.5V to 5.5V, RL = 500.0, CL = 50 pF.

~ Semiconductor

^NatiOnal

Corporation

DM54ALS109A/DM74ALS109A Dual J-K Positive-Edge-Triggered Flip-Flops with Preset and Clear

General Description

The DM54ALS109A is a dual edge-triggered flip-flop. Each flip-flop has individual J,

K.

clock, clear and preset inputs, and also complementary

a

^and

a

^outputs.

Information at input J or

R

is transferred to the

a

^{output on}

the positive going edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not direct-ly related to the transition time of the positive going pulse.

When the clock input is at either the high or low level, the J,

R

input signal has no effect.

Asynchronous preset and clear inputs will set or clear Q output respectively upon the application of low level signal.

The

J-R

design allows operation as a 0 flip-flop by tying the J and

R

inputs together.

Connection Diagram

Features

• Swit9hing specifications at 50 pF

• Switching specifications guaranteed over full tempera-ture and Vee range

• Advanced oxide-isolated, ion-implanted Schottky TIL process

• Functionally and pin for pin compatible with Schottky and LS TIL counterpart

• Improved AC performance over LS109 at approximately half the power

Order Number DM54ALS109AJ, DM74ALS109AM or DM74ALS109AN See NS Package Number J16A, M16A or N16A

Inputs Outputs

·This condition is nonstable; it will not persist when present and clear inputs return to their inactive (high) level. The output levels in this condition are not guaranteed to meet the VOH specification.

Absolute Maximum Ratings

If Military/Aerospace specified devices are required, Note: The "Absolute Maximum Ratings" are those values contact the National Semiconductor Sales Office/ beyond which the safety of the device cannot be guaran-Distributors for availability and specifications. teed The device should not be operated at these limits. The Supply Voltage 7V parametric values defined in the "Electrical Characteristics"

Input Voltage 7V table are not guaranteed at the absolute maximum ratings.

The "Recommended Operating Conditions" table will define Operating Free Air Temperature Range the conditions for actual device operation.

DM54ALS - 55°C to + 125°C

DM74ALS O°Cto +70°C

Storage Temperature Range - 65°C to + 150°C

Recommended Operating Conditions

Symbol Parameter DM54ALS109A DM74ALS109A

Units

Min Nom Max Min Nom Max

Vcc Supply Voltage 4.5 5 5.5 4.5 5 5.5 V

VIH High Level Input Voltage 2 2 V

VIL Low Level Input Voltage 0.7 0.8 V

IOH High Level Output Current -0.4 -0.4 mA

IOL Low Level Output Current 4 8 rnA

fCLK Clock Frequency 0 30 0 34 MHz

tW(CLK) Pulse Width Clock High 16.5 14.5 ns

Clock Low 16.5 14.5 ns

tw Pulse Width Preset and Clear 15 15 ns

tsu Data Setup Time J orK 15 j 15j

PREorCLR

10j 10j ns

inactive

tH Data Hold Time o j o j ns

TA Free Air Operating Temperature -55 125 0 70 °C

The ( i) arrow indicates the positive edge of the Clock is used for reference.

Electrical Characteristics

over recommended operating free-air temperature range. All typical values are measured at Vcc = 5V, T A = 25°C.

Symbol Parameter Conditions Min Typ Max Units

VIK Input Clamp Voltage Vcc = ^{4.5V, II} = ^{-18 mA -1.5 V}

VOH High Level Output IOH = -400 p.A

Vcc - 2 V

Voltage Vcc = 4.5V to 5.5V

VOL Low Level Output Vce = ^{4.5V 54174ALS} _{0.25 0.4 V}

Voltage VIH = 2V 10L = 4mA

74ALS

0.35 0.5 V

IOL = ^8mA

II Input Current at Max Vee = ^{5.5V, Clock, J, K 0.1} _mA

Input Voltage VIH = 7V Preset, Clear 0.2

IIH High Level Vee = 5.5V, Clock, J, K 20

Input Current VIH = ^2.7V Preset, Clear 40 p.A

IlL Low Level Vee = 5.5V, Clock, J, K -0.2

Input Current VIL = ^O.4V Preset, Clear -0.4 mA

10 Output Drive Current Vee = 5.5V, Vo = 2.25V -30 -112 mA

lee Supply Current Vee = 5.5V (Note 1) 2.4 4 mA

Note 1: Icc is measured with J, K, ClK and PRESET grounded, then with J, K, ClK and CLEAR grounded.

c

Dans le document ~ Semiconductor National Corporation (Page 150-155)