This document is intended for a design engineer or applications programmer who is familiar with Digital's extended LSI-l1 bus (Q22-bus) and the MIPS instruction set. This manual should be used along with the VAX Architecture Reference Manual as a programmer's reference to the module.
Organization
The manual is divided into six chapters and four appendices.
Chapter 1, Overview, introduces the KN210 processor module, the KN210 I/O module and MS650 memory modules, including module features and specifications.
Chapter 2, Configuration and Installation, describes the configuration and installation of the KN210 module set and MS650 modules in Q22-bus backplanes and system enclosures.
Chapter 3, Architecture, provides a description of KN210 registers, instruction set and memory.
Chapter 4, KN210 Firmware, describes the R3000 entry/dispatch code, boot diagnostics, device booting sequence, console program and console commands.
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xxii About This Manual
Chapter 5, Diagnostic Processor, describes the diagnostic processor registers.
Chapter 6, Maintenance Mode Firmware, describes the diagnostic processor entry/dispatch code, boot diagnostics, device booting sequence, console program and console commands.
Appendix A, KN210 Specifications, describes the physical, electrical, and environmental specifications for the KN210 CPU and 1/0 modules.
Appendix B, Address Assignments, provides a map of R3000 and diagnostic processor address space.
Appendix C, Q22-bus Specification, describes the low end member of Digital's bus family. All of Digi tal's microcomputers use the Q22-bus.
Appendix D, Acronyms, provides a list of the acronyms used in this manual.
Conventions
This manual uses the following conventions:
Convention Note Caution
[x:y]
I
ReturnI
D
Meaning
Provides general information you should be aware of.
Provides information to prevent damage to equipment.
Represents a bit field, a set of lines, or signals, ranging from x through y. For example, RO <7:4> indicates bits 7 through 4 in general purpose register RO.
Represents a range of bytes, from y through x.
Text within a box identifies a key, such as the
I
ReturnI
key.Boldface small D indicates variables.
Related Documents
You can order the following documents from Digital:
Document
VAX Architecture Reference Manual BA213 Enclosure Maintenance
You can order these documents from:
Digital Equipment Corporation Accessories and Supplies Group P.O. Box CS2008
Nashua, NH 03061
Attention: Documentation Products
Order Number EY-3459E-DP EK-189AA-MG
1
Overview
This chapter provides a brief overview of the KN210 CPU module set and MS650 memory modules.
1.1 Introduction
The KN210 CPU module set consists of the KN210 processor module, shown in Figure 1-1, and the KN210 110 module, shown in Figure 1-2.
Both are quad-height modules for the Q22-bus (extended LSI-II bus). The KN210 processor module features the R3000 RISC processor. The KN210 110 module features built-in DSSI and -Ethernet controllers. The KN210 CPU module set is designed for use in high speed multiuser, multitasking environments.
The KN210 CPU module set is used in the DECsystem 5400. The DECsystem 5400 utilizes a BA213 enclosure. Refer to the BA213 Enclosure Maintenance for a detailed description of the enclosure.
The KN210 CPU module set and MS650 memory modules combine to form a RISC CPU/memory subsystem that uses the Q22-bus, DSSI bus, and Ethernet to communicate with mass storage and 110 devices. The KN210 CPU module set and MS650 modules mount in standard Q22-bus backplane slots that implement the Q22-bus in the AB rows and the CD interconnect in the CD rows. The KN210 CPU module set can support up to four MS650 modules, if enough Q221CD slots are available.
The KN210 CPU module set communicates with the console device through the H3602-SA CPU cover panel, which also contains configuration switches, an LED display, and Ethernet connector.
1-1
Figure 1-1 KN21 0 Processor Module
Overview 1-3
Figure 1-2 KN210 I/O Module
The major functional blocks of the KN210 CPU module set are shown in Figure 1-3, and are described in the following paragraphs.
ETHERNET DSSI
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Figure 1-3 KN210 Block Diagram
1.2 R3000 RiSe Processor
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The central processor of the KN210 module set is the R3000 RISe processor chip. The R3000 chip implements two tightly coupled processors in a single VLSI chip. One processor is a 32-bit CPU, and the second is a system control processor (CPO).
Overview 1-5
The combined CPU/CPO processors provide the following features:
• 32-bit operation
• A 5-stage pipeline
• On chip cache control
• On chip memory management
• Coprocessor interface
1.3 Floating-Point Accelerator
The floating-point accelerator is implemented by the R3010 floating-point accelerator (FPA) chip. The R3010 FPA operates as a coprocessor for the R3000 processor and extends the R3000's instruction set to perform arithmetic operations on values in floating-point representations. The R3010 FPA interfaces with the R3000 processor to form a tightly-coupled unit with seamless integration of floating-point and fixed-point instruction sets.
1.4 Cache Memory
To maximize CPU performance, the KN210 module utilizes a system of cache memory. The cache memory is organized as two separate 64 Kbyte cache; one for instructions and the other for data.
1.5 Memory Controller
The main memory controller is implemented by a VLSI chip called the CMCTL. The CMCTL supports up to 64 Mbytes of ECC memory with a 500-550 ns cycle time for word transfers. This memory resides on up to four MS650 memory modules.
1.6 Diagnostic Processor
The diagnostic processor provides extensive diagnostic capabilities for the KN210 CPU module set.
1.7 MS650-BA Memory Modules
The MS650-BA memory modules are 16 Mbyte, 450 ns, 39-bit wide arrays (32-hit data and 7-bit ECC) implemented with 1 Mbyte dynamic RAMs in surface-mount packages. MS650-BA memory modules are single, quad-height, Q22-bus modules, as shown in Figure 1-4.
1.8 MS650-AA Memory Modules
The MS650-AA memory modules are 8 Mbyte, 450 ns, 39-bit wide arrays (32-bit data and 7-bit ECC) implemented with 256 Kbyte dynamic RAMs in zig-zag in-line packages (ZIPs). MS650-AA memory modules are single, quad-height, Q22-bus modules, as shown in Figure 1-4.
The MS650 modules communicate with the KN210 through the MS650 memory interconnect, which utilizes the CD rows of backplane slots 2 through 4, and a 50-pin ribbon cable. The KN210 memory subsystem supports a maximum of four memory modules.
MS650AA MS650BA
Figure 1-4 MS650 Memory Modules