· 28F016XS FLASH MEMORY

5.7 AC Characteristics-Read Only Operations(1)

(Continued) VCC

=

5.0V ±0.5V, TA

=

O·C to +70"C Change, Whichever Occurs First

NOTES:

1. See AC Input/Output Reference Waveforms for timing measurements.

2. Sampled, not 100% tested. Guaranteed by design.

3 .. Device speeds are defined as:

15 ns at Vee = 5.0V equivalent to 20 ns at Vee = 3.3V

20 ns at Vee = 5.0V equivalent to 25 ns at Vee = 3.3V

4. See the high speed AC Input/Output Reference Waveforms.

5. See the standard AC Input/Output Reference Waveforms.

28F016X8-20(5)

28F016XS FLASH MEMORY

1 4 - - - -t CH - - - - t i

t ClCH t_CHCl

290532-9 Figure 9. ClK Waveform

ClK

ADDR

ADV#

IXxxxxxxxxxxxxxxXXXXXXX

tEHOZ-:""

-CEx#

OE#

DATA

290532-10 NOTE:

1. The 28F016XS can sustain an endless burst access assuming alternating bank accesses; the length of the burst access is dictated by the control CPU or bus architecture.

Figure 10. Read Timing Waveform(l) (SFI Configuration = 1, Alternate-Bank Accesses)

3-32

28F016XS FLASH MEMORY

elK

290532-11 NOTE:

1. The 28F016XS can sustain an endless burst access assuming alternating bank accesses; the length of the burst access is dictated by the control CPU or bus architecture.

Figure 11. Read Timing Waveform(1) (SFI Configuration ⁼ 2, Alternate-Bank Accesses)

3·33

28F016XS FLASH MEMORY

tAVGH

~)/ :~m !~!U ^:·WlA :~iU .~~ :~!U :w ^:ij1 :ummmim~!!~~

CEX# :tCHVH I I , I , I , t'

OE#

DATA

--~--~----~--~~

290532-12 NOTES:

1. The 28F016XS can sustain an endless burst access assuming alternating bank accesses; the length of the burst access is dictated by the control CPU or bus architecture.

2. Depending on the actual operation frequency, a consecutive alternating bank access can be initiated one clock period earlier. See AP-398 for further information. .

Figure 12. Read Timing Waveform(1) (SFI Configuration = 3, Alternate-Bank Access~s)

3-34

28F016XS FLASH MEMORY

tAVGH , ,

~1l. ~!i! • ~!~ .,. ~!~ .1n~ • ^~llr • wr ., ., • ~nml!l!~~lmm

CEx#

~HQZ

,..

taax

DE#

DATA

--~--~--~----~--~H

}4-IpHCH :

290532-13 NOTE:

1. The 28F016XS can sustain an endless burst access assuming alternating bank accesses; the length of the burst access is dictated by the control CPU or bus architecture.

Figure 13. Read Timing Waveform(1) (SFI Configuration = 4, Alternating Bank Accesses)

3-35

28F016XS FLASH MEMORY

5.8 AC Characteristics for WE#-Controlled Write Operations(1) vcc

= 3.3V ±0.3V, TA = O·Gto +70·G

intel~

Versions 28F016XS-20 28F016XS-25

Unit Symbol Parameter Notes Min Typ Max Min Typ Max

tAVAV Write Cycle Time 75 75 ns

tVPWH Vpp Setup to WE# 3 100 100 ns

Going High

tpHEL RP# Setup to GEx# 3,7 480 480 ns

Going Low

tELWL GEx# Setup to WE# 3,7 0 0 ' ns

Going Low

tAVWH Address Setup to WE # 2,6 60 60 ns

Going High

tOVWH Data Setup to WE # 2,6 60 60 ns

Going High

tWLWH WE # Pulse Width 60 60 ns

tWHOX Data Hold from WE# High 2 5 5 ns

tWHAX Address Hold from 2 5 5 ns

WE# High

tWHEH GEx# hold from WE# High 3,7 5 5 ns

tWHWL WE # Pulse Width High 15 15 ns

tGHWL Read Recovery 3 0 0 ns

before Write

tWHRL WE # High to RY IBY # 3 100 100 ns

Going Low

tRHPL RP# Hold from Valid Status 3 ,0 0 ns

tPHWL RP# High Recovery 3 480 480 ns

to WE # Going Low

tWHCH Write Recovery 3 20 20 ns

before Read

tavvL VPP Hold from Valid Status 3 0 0 /Ls

tWHQV1 Duration of WordlByte 3,4,5 5 9 TBD 5 9 TBD /Ls

Write Operation

tWHQV2 Duration of Block 3,4 0.6 1.6 20 0.6 1.6 20 sec

Erase Operation

3-36

28F016XS FLASH MEMORY

5.8 AC Characteristics for WE #-Controlled Write Operations(1)

(Continued) Vcc = 5.0V ±0.5V, TA = O°C to +70°C

Versions 28F016XS·15 28F016XS-20

Symbol Parameter Notes Min Typ Max Min Typ Max

2. Refer to command definition tables for valid address and data values.

3. Sampled, but not 100% tested. Guaranteed by design.

4. Write/Erase durations are measured to valid Status Register (CSR) Data.

5. Word/Byte Write operations are typically performed with 1 Programming Pulse.

6. Address and Data are latched on the rising edge of WE# for all Command Write operations.

28F016XS FLASH MEMORY

ct.,

'"'V.

NO''''

CEll. IE)

NOT"

DEEP POWER-DOWN

VIH OE'(Gj V ..

WE'(W)

DATA(QiQ) _V,

:"'--:==-+-<1

.... ,F'}

~ ~~~~~~~~~~~~~'"WW'~H=--:::~ := ~=-~-=~~:= __ ~=-'\~~~~~~~~!!I

V,,,",

V,,,,, _________________________ _

v~ ~7

V,

NOTES:

1. This address string depicts Data Write/Erase cycles with corresponding verification via ESRD.

2. This address string depicts Data Write/Erase cycles with corresponding verification via eSRD.

3. This cycle is invalid when using CSRD for verification during Data Write/Erase operations.

4. CEx# is defined as the latter of CEo# or CEl # going low or the first of CEo* or CEl # going high.

5. RP# low transition is only to show tRHPL; not valid for above Read and Write cycles.

6. Data Write/Erase cycles are asynchronous; CLK and ADV* are ignored.

7. Vpp voltage during Data Write/Erase operations valid at both 12.0V and 5.0V.

B. Vpp voltage equal to or below VPPLK provides complete flash memory array protection.

3-38

Figure 14. AC Waveforms for WE#Command Write Operations, illustrating a Two Command Write Sequence Followed by a Extended Status Register Read

290532-14

28F016XS FLASH MEMORY

5.9 AC Characteristics for CEx#-Controlied Write Operations(1) vcc

= 3.3V ± 0.3V, T A = O°C to

+

70°C

Versions 28F016XS·20 28F016XS·25

Symbol Parameter Notes Min Typ Max Min Typ Max

28F016XS FLASH MEMORY

5.9 AC Characteristics for CEx

Controlled Write Operations(1)

(Continued) Vcc = 5.0V ±0.5V, TA = O·C to +70·C

Versions 28F016XS-15 28F016XS-20

Symbol Parameter Notes Min Typ Max Min Typ Max

tAVAV Write Cycle Time 60 60

tPHWL RP# Setup to WE# Going Low 3 300 300

tVPEH Vpp Setup to CEx# 3,7 100 100

Going Low Going High

tWLEL WE# Setup to CEx# 3,7 0 0

2. Refer to command definition tables for valid address and data values.

3. Sampled, but not 100% tested. Guaranteed by design.

4. Write/Erase durations are measured to valid Status Register (CSR) Data.

5. Word/Byte Write operations are typically performed with 1 Programming Pulse.

6. Address and Data are latched on the rising edge of WE# for all Command Write operations.

7. CEx# is defined as the latter of CEo# or CE1 # gOing low, or the first of CEo# or CE1 # going high.

28F016XS FLASH MEMORY

AOV'

V,H WE'(W)

VOL

'eHCH V,H

OE'(G) VOL

'EHOV12

""'0., ^V,H

VOL

VIH OATA(DIQ)

VOL

VOH RYISV.(R)

vOl.

V,H RPf(P)

VOL

tVPEH VpPH1

VppM VpPH2 VPPlJ(

VOL

NOTE a

NOTES:

1. This address string depicts Data Write/Erase cycles with corresponding verification via ESRD.

2. This address string depicts Data Write/Erase cycles with corresponding verification via CSRD.

3. This cycle is invalid when using CSRD for verification during Data Write/Erase operations.

4. CEx# is defined as the latter of CEo# or CEl # going low or the first of CEo# or CEl # going high.

5. RP# low transition is only to show tRHPL; not valid for above Read and Write cycles.

6. Data Write/Erase cycles are asynchronous; ClK and ADV# are ignored.

7. Vpp voltage during Data Write/Erase operations valid at both 12.0V and 5.0V.

8. Vpp voltage equal to or below VPPLK provides complete flash memory array protection.

Figure 15. AC Waveforms for CEx#--,Controlled Write Operations, illustrating a Two Command Write Sequence Followed by a Extended Status Register Read

290532-15

3-41

28F016XS FLASH MEMORY

5.10 AC Characteristics for WE#-Controlled Page Buffer Write Operations(1)

vee = 3.3V ±O.3V, TA = O·C to +70·C

Versions 28F016XS·20 28F016XS·25

Unit Symbol Parameter, Notes Min Typ Max Min Typ Max

tAVWL Address Setup to WE# 2 0 0 ns

I Going Low

Vee = 5.0V ±O.5V, TA = O·C to +70·C

Versions 28F016XS·15 28F016X5-20

Unit

Symbol Parameter Notes Min Typ Max

" Min Typ Max

tAVWL Address Setup to WE # 2 0 0 ns

Going Low NOTES:

1. All other specifications for WE#Controlied Page Buffer Write Operations see Section 5.B.

2. Address must be valid during the entire WE# low pulse.

V1H CEx#(E) NOTE 1

V1L

1 ELWL 1WHEH

V1H

WE#(!N) 1WHWL

V1L

'WLWH 'WHAX

V1H

ADDRESSES (A) VALID

V1L

'OVWH

J 9

( c

V1H HIGHZ

DATA (OIQ) OjN

V1L

290532-16 NOTE:

1. CEx# is defined as the latter of CEo# or CEI # going low, or the first of CEo# or CEI # going high.

3·42

Figure 16. WE#--controlled Page Buffer Write Timing Waveforms (Loading Data to the Page Buffer)

28F016XS FLASH MEMORY

5.11 AC Characteristics for CEx #-Controlled Page Buffer Write Operations vcc

= 3.3V ±O.3V, TA = O·C to +70·C

Versions 28F016XS-20 28F016XS-25

Symbol Parameter Notes Min Typ Max Min Typ Max

tAVEL Address Setup to CEx# 2,3 0 0

Going Low

VCC = 5.0V ±O.5V, TA = O·C to +70"C

Versions 28F016XS-15 28F016XS-20

Symbol Parameter Notes Min Typ Max Min Typ Max

tAVEL Address Setup to CEx# 2,3 0 0

Going Low NOTES:

1. All other specifications for CEx#Controlled Page Buffer Write Operations see Section 5.9.

2. Address must be valid during the entire CE# low pulse.

3. CEx# is defined as the latter of CEo# or CEl # going lOw, or the first of CEo# or CEl # going high.

WE#(W) VIL

IWLB. IEHWH

VIH

IEHEL , CExII (E)

NOTE 1 VIL

IELEH IEHAX

VIH

ADORESSES (A) VALlO

VIL

IOVEH

J 9

(

VIH HIGHZ

DATA (DIQ) OjN

VIL

Unit ns

290532-17

c

NOTE:

1. CEx# is defined as the latter of CEo# or CEl # going low, or the first of CEo# or CEl # going high.

Figure 17. CEx#-Controlled Page Buffer Write Timing Waveforms (Loading Data to the Page Buffer)

3-43

28F016XS FLASH MEMORY

5.12 Power-Up and Reset Timings

Vee POWER-UP

API!

(P)

Vee (3V,SV)

NOTE:

___

^---I.

For read timings following reset see Section 5.7.

S.OV

,---~---, ISVPH '

'.

^~'

290S32-18

Figure 18. Vee Power-Up and RP# Reset Waveforms

Symbol Parameter Notes Min Max Unit

tpL5V RP# Low to Vee at 4,5V (Minimum) 2 0 f-Ls

tpL3V RP# Low to Veeat 3.0V (Minimum) 2 0 p.s

t5VPH Vee at 4.5V Minimum) to RP# High 1 2 p.s

t3VPH Vee at 3.0V (Minimul"(1) to RP# High 1 2 p.s

NOTES:

1. The tSVPH and/or t3VPH times must be strictly followed to guarantee all other read and write specifications for the 28F016XS,.

2. The power supply may start to switch concurrently with RP# going low.

3-44

5.13 Erase and Word/Byte Write Performance(3,5)

vee = 3.3V ± 0.3V, vpp = 5.0V ± 0.5V, T A = DoC to

+

70°C

Symbol Parameter Notes Min Typ(1)

Page Buffer Byte Write Time 2 TBD 6.0 Page Buffer Word Write Time 2 TBD 12.1

tWHRH1A Byte Write Time 2 TBD 16.5

tWHRH1B Word Write Time 2 TBD 24.0

tWHRH2 Block Write Time 2 TBD 2.2

tWHRH3 Block Write Time 2 TBD 1.6

Block Erase Time 2 TBD 2.8

Full Chip Erase Time 2 TBD 44.8

Time From Erase 4 TBD 10

Suspend Command to WSM Ready

Vee = 3.3V ±0.3V, Vpp = 12.0V ±0.6V, TA = DOC to +70°C

Symbol Parameter Notes Min Typ(1)

Page Buffer Byte Write Time 2 TBD 2.2 Page Buffer Word Write Time 2 TBD 4.4

tWHRH1 Word/Byte Write Time 2 5 9

tWHRH2 Block Write Time 2 TBD 1.2

tWHRH3 Block Write Time 2 TBD 0.6

Block Erase Time 2 0.6 1.6

Full Chip Erase Time 2 TBD 25.6

Time From Erase 4 TBD 10

Suspend Command to WSM Ready

28F016XS FLASH MEMORY

Max Units Test Conditions TBD fLs

TBD fLs

TBD sec Byte Write Mode TBD sec Word Write Mode TBD sec

TBD sec TBD fLs

Max Units Test Conditions TBD fLs

TBD fLs

4.2 sec Byte Write Mode 2.0 sec Word Write Mode 20 sec

TBD sec TBD fLs

3-45

28F016XS FLASH MEMORY

5.13 Erase and Word/Byte Write Performance(3,5)

(Continued) Vcc

=

s.OV ±O.SV, Vpp

=

S.OV ±O.SV, TA = O°C to +70·C

Symbol Parameter Notes Min Typ(1) Max

Page Buffer Byte 2 TBD 6.0 TBD

Write Time

Page Buffer Word 2 TBD 12.1 TBD

tWHRH1A Byte Write Time 2 TBD 11 TBD

tWHRH1B Word Write Time 2 TBD 16 TBD

tWHRH2 Block Write Time 2 TBD 1.6 TBD

tWHRH3 Block Write Time 2 TBD 1.2 TBD

Block Erase Time 2 TBD 2.0 TBD

Full Chip Erase Time 2 TBD 32.0 TBD

Time From Erase 4 TBD 10 TBD

Suspend Command to WSM Ready

Vcc = S.OV ±O.SV,Vpp = 12.0V ±0.6V, TA = O·C to +70·C

Symbol Parameter Notes Min Typ(1) Max

Page Buffer Byte Write Time 2 TBD 2.1 TBD Page Buffer Word Write Time 2 TBD 4.1 TBD

tWHRH1 Word/Byte Write Time 2 4.S 6 TBD

tWHRH2 Block Write Time 2 TBD 0.8 4.2

tWHRH3 Block Write Time 2 TBD 0.4 2.0

Block Erase Time 2 0.6 1.2 20

Full Chip Erase Time 2 . TBD 19.2 TBD

Time From Erase 4 TBD 10 TBD

Suspend Command to WSM Ready

NOTES:

1. 25°C, and nominal voltages.

2. Excludes system-level overhead.

3. These performance numbers are valid for all speed versions.

Units Test Conditions Ils

Ils

Write Time , Ils

Ils

sec Byte Write Mode sec Word Write Mode sec

sec Ils

Units Test Conditions Ils

Ils

sec Byte Write Mode sec Word Write Mode ' sec

sec Ils

4. Specification applies to interruPt latency for Single Block Erase. Suspend latency for Erase All Unlocked Block operation typically extends erase suspend latency time to 140 IJ.s.

5. Sampled, but not 100% tested. Guaranteed by design.

3-46

28F016XS FLASH MEMORY

6.0 MECHANICAL SPECIFICATIONS

o

1 + - - - - o 1 - - - + 1

A~r__---,~SEE.OETAIL ^A

r--)---~~

DETAIL B

JL. ®

OETAIL A

290532-19 Figure 19. Mechanical S~eclflcatlons of the 28F016XS56·Lead TSOP Type I Package

Family: Thin Small Out·Line Package

Symbol Millimeters Notes

Minimum Nominal Maximum

A 1.20

A1 0.50

A2 0.965 0.995 1.025

b 0.100 0.150 0.200

c

0.115 0.125 0.135

01 18.20 18.40 18.60

E 13.80 14.00 14.20

e 0.50

0 19.80 20.00 20.20

L 0.500 0.600 0.700

N 56

0 0° 3° 5°

Y 0.100

Z 0.150 0.250 0.350

3-47

28F016XS FLASH MEMORY

Dans le document SANTA CLARA DIVISION 3000 Bowers Avenue Santa Clara, CA (Page 144-161)

5.7 AC Characteristics-Read Only Operations(1)

=

=

28F016XS FLASH MEMORY

IXxxxxxxxxxxxxxxXXXXXXX

28F016XS FLASH MEMORY

~)/ :~m !~!U :·WlA :~iU .~~ :~!U :w :ij1 :ummmim~!!~~

~1l. ~!i! • ~!~ .,. ~!~ .1n~ • ~llr • wr ., ., • ~nml!l!~~lmm

,..

taax

28F016XS FLASH MEMORY

5.8 AC Characteristics for WE#-Controlled Write Operations(1) vcc

intel~

5.8 AC Characteristics for WE #-Controlled Write Operations(1)

:"'--:==-+-<1

~ ~~~~~~~~~~~~~'"WW'~H=--:::~ __ := __ ~=-~-=~~:= __ ~=-'\~~~~~~~~!!I

V,

5.9 AC Characteristics for CEx#-Controlied Write Operations(1) vcc

+

5.9 AC Characteristics for CEx

Controlled Write Operations(1)

5.10 AC Characteristics for WE#-Controlled Page Buffer Write Operations(1)

J 9

( c

28F016XS FLASH MEMORY

5.11 AC Characteristics for CEx #-Controlled Page Buffer Write Operations vcc

J 9

(

c

5.12 Power-Up and Reset Timings

___

'.

5.13 Erase and Word/Byte Write Performance(3,5)

+

5.13 Erase and Word/Byte Write Performance(3,5)

=

=

28F016XS FLASH MEMORY

6.0 MECHANICAL SPECIFICATIONS

o

r--)---~~

JL. ®

c

28F016XS FLASH MEMORY

~)/ :~m !~!U ^:·WlA :~iU .~~ :~!U :w ^:ij1 :ummmim~!!~~

~1l. ~!i! • ~!~ .,. ~!~ .1n~ • ^~llr • wr ., ., • ~nml!l!~~lmm

~ ~~~~~~~~~~~~~'"WW'~H=--:::~ := ~=-~-=~~:= __ ~=-'\~~~~~~~~!!I