BUS OPERATION EXAMPLES

The following paragraphs contain several specific examples of MC68851 bus operations and is intended to provide better understanding of the MC68851 by demonstrating sequences of typical bus operations.

4.7.1 Table Search Operations

The bus operations required to initiate and complete a table search operation, including startup and terminate overhead, are shown in Figure 4-44. This figure demonstrates the timing for a translation descriptor fetch and address translation cache update assuming that the MC68851 is operating in the early processing startup and fast table search modes of operation (refer to 4.1.2 Bus Interface Initialization) and that physical memory operates with no wait states. The table structure accessed consists of a function code index and two levels of long format descriptors.

The startup overhead associated with a table search operation is affected by the table structure used and operational mode of the MC68851. For example, if the first level of the table search is not an index by the function codes, the startup overhead is increased by the two clock periods required to perform a limit check of the root pointer used in the search. Also, ifthe early processing startup mode is disabled, an additional six clock periods of overhead is required to initiate a table search.

Figures 4-45 and 4-46 demonstrate the bus operations and timings associated with updating the used and modified descriptor status bits. The overall time required to perform a table search operation such as depicted in Figure 4-44 is affected by the number of status bits that must be updated during the search.

It should be noted that both the used and modified bits may be set in a single operation that does not require use of a read-modify-write operation. However, if only the used bit of a page descriptor is to be set and the status of the M bit is not to be changed, the MC68851 always uses a read-modify-write operation in order to maintain status consistency in systems that allow mul-tiple MC68851s to share the same translation tables. It should also be noted that a simple write operation is always used to update the used bit at all levels of the translation table other than the page descriptor level.

4.7.2 Logical Bus Arbitration

Figure 4-47 illustrates an MC68851 table search operation that is interrupted by an alternate logical bus master requesting control of the logical bus. The MC68851 continues the table search until it detects an assertion of logical bus grant in (LBGI) after which it asserts logical bus grant out (LBGO) to indicate that it will relinquish control of the logical bus at the end of the current bus cycle. After placing all shared control lines in the high-impedance state, the MC68851 negates logical bus grant acknowledge (LBGACK).

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If the MC68851 was performing a table search to update the ATC as the result of a request for an address translation that did not have a descriptor resident in the address translation cache, the interrupted table search will not be resumed when the alternate logical bus master releases control of the bus; instead, the MC68851 will wait for the bus cycle that initiated the search to be retried by the logical master. When the master does retry that cycle, the MC68851 will resume the table search at the point it was terminated if, and only if, no operations have occurred between inter-ruption of the table search and the retry of the cycle that require that the MC68851 perform any other internal operations. Otherwise, the table search will be completely re-executed.

If the MC68851 was performing a table search in response to a PTEST or PLOAD instruction, the table search will be automatically resumed or restarted (refer to 4.4.1.2 MC68851 REQUESTING THE LOGICAL BUS).

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SECTION 5

ADDRESS TRANSLATION

This section discusses the mapping of addresses from the logical address space to the physical address space by the MC68851. Included in this section is the description of the MC68851 trans-lation table structure, formats and uses of transtrans-lation descriptors, and operation of the MC68851 address translation cache (ATC).

Dans le document Address Translation . . (Page 101-111)