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SPS 2000 68060 Development System

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The SPS 2000 68060 emulator is a high performance development system which combines the control of an in-circuit emulator with the power of a logic analyzer to provide a complete debugging environment for hardware and software.

Real-time emulation up to 66MHz* @ full bus speed 512K of emulation overlay memory std. (1, 2, or 4 MB optional). 512K Shadow RAM for real-time data monitoring.

Time based delays for break and trigger points Eight levels of trigger and break sequencing logic Up to 8192 separate trace buffers for windowing code of interest. User defined trace buffer size of up to 128K.

HMI SPS 2000 Series in-circuit emulators represent the best in emulation technology and provide the most accurate and complete microprocessor development systems available.

Primary communication with the host computer is provided using a high speed serial port or standard Ethernet port. A parallel port is provided for high speed code downloads.

Overlay RAM may be mapped in small blocks throughout the memory address space of the target system.

Shadow RAM blocks may be mapped to allow real-time monitoring of critical memory variables.

Breakpoint, trigger point, timing, and other emulator functions are activated by flexible user-defined conditions of up to eight levels deep with time delays.

Trace buffers capture addresses, data, control signals, and external trace bits. Source code information can also be shown. A Freeze Trace command allows trace buffers to be viewed without stopping emulation. User defines number and size of trace buffers shown.

*1 wait state @ 50MHz, 2 wait states @ 66MHz

Trace qualification to allow selective tracing. Freeze trace allows viewing of trace buffers and changing of events during emulation.

High-speed host communications via 115.2KB RS-232 serial port or Ethernet. Parallel port for fast code downloads.

Hardware based Performance Analysis provides analysis of up to 8 test modules, minimum/maximum/average execution time displays, histograms, code coverage displays, and trace data time stamping

.

Backplane based design results in high reliability and allows for easy expandability and in-field service. 3' emulation cable for those tough to reach target systems.

A hardware based non-statistical software Performance Analysis system is standard. This premium system provides 50 nanosecond resolution timing information and displays results in easy to read histogram or raw data formats.

Source-Level Debugger Support

SourceGate II, HMI's acclaimed source-level debugger software, is supplied with all SPS 2000 Series emulators and provides full native GUI environment support for Windows 3.1/NT/95, SUN/SPARC, and HP platforms. Please see the back of this page for additional information on SourceGate II features.

PowerPC Processor Support

The HMI SPS 2000 68060 has a pod available which supports the 68060, 68EC060, and 68LC060. Future CPU versions will be supported via new pods.

Huntsville Microsystems, Inc.

P.O. Box 12415 Huntsville, AL 35815 Tel: (205) 881-6005 FAX: (205) 882-6701 sales@hmi.com http://www.hmi.com/

SPS 2000 PRODUCT INFORMATION

EC

SPS 2000 68060 Development System

HMI announces the latest innovation in development tools for the 68060 processsor with the new

SPS 2000 Series. A new and enhanced feature set will insure that you have the most powerful

development tool available for the 68060. Of course, you would expect nothing less from HMI,

the leader in microprocessor development tools!

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