SWITCHING SPEED ENHANCEMENT OF NOVEL SUPERLATTICE GaAs PIN DIODES

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SWITCHING SPEED ENHANCEMENT OF NOVEL SUPERLATTICE GaAs PIN DIODES

Z. Hatzopoulos, A. Georgakilas, A. Christou

To cite this version:

Z. Hatzopoulos, A. Georgakilas, A. Christou. SWITCHING SPEED ENHANCEMENT OF NOVEL

SUPERLATTICE GaAs PIN DIODES. Journal de Physique Colloques, 1987, 48 (C5), pp.C5-281-C5-

284. �10.1051/jphyscol:1987561�. �jpa-00226765�

JOURNAL DE PHYSIQUE

Colloque C5, suppl6ment au n o l l , Tome 4 8 , novembre 1 9 8 7

SWITCHING SPEED ENHANCEMENT OF NOVEL SUPERLATTICE GaAs PIN DIODES

2. HATZOPOULOS, A. GEORGAKILAS and A. C H R I S T O U ( ~ ) Research Center of Crete, Iraklion, Crete, Greece

Physics Department, University of Crete, Iraklion 71001 Crete, Greece

Des diodes PIN avec faible resistance en direct ont ete fabriqudes en utilisant un super-reseau de AsGa deposCe per epitaxie par jet moleculaire. La performance statique de ces diodes mont6es en shunt en inter- rupteur demicroruban indique que lespertes d'insertion a 9.3 GHz sont plus faibles que celles de diodes simi- laires en AsGa. Des experiences dynamiques indiquent une vitesse et puisannce de ces intermpteurs superieure a celles de diodes PIN de AsGa et de Si.

ABSTRACT

GaAs Superlattice PIN diodes with low forward resistance have been successfully fabricated using Molecular beam epitaxy. Static performance data for shunt mounted chips in a microstrip switch show a lower insertion loss at 9.3 GHz over similar GaAs PIN diodes without the superlattice region. Dynamic switching experiments show both a switching speed and switching power advantage of GaAs superlattice PIN diodes over both GaAs and silicon PIN diodes.

I. INTRODUCTION

Gallium arsenide superlattice PIN (SLPIN) diode wafers with .a superlattice I-region thickness of 1 pm and 2 pm have been successfully deposited by molecular beam epitaxy (MBE) utilizing a VG, 80H MBE sys- tem. *The superlattice region consisted of low doped n-GaAs (8

x

1 0 ' ~ c m P 3 and G%.,6Alo,24As layers each 100 A thick consisting of a single period and repeated fifty times or one hundred times in order to form the intermediate I-region. The n ⁺ and p ⁺ layers were each one micron thick. The structure was grown on a semi-insulating substrate and included a 2 pm, SI (semi-insulating) buffer layer, again deposited by MBE with carrier concentration of 2 x 10" ~ m - ~ . Both mesa chip and gold plated heatsink SLPIN diodes have been processed and fabricated from these wafers. The MESA area dimensions were maintained at 40 pm by 40 prn in order to minimize the diode capacitance.

Through the utilization of a superlattice region which is lightly doped or modulation doped, a spatial separation of electrons and holes has been previously observed in modulation doped The resul- tant effect has been both an increase of carrier lifetime and carrier mobility. Mobility values should approach those obtained in two dimensional electron gas s t r ~ c t u r e s ~ ~ ~ and carrier lifetime should only be limited by recombination processes at defect centers, probably in the AlGaAs layers and by impurity and alloy scatter- ing. The advantages of a superlattice PIN structure over the conventional PIN configuration should be faster switching speeds, low forward resistances and low reverse bias requirements. The limitations present in PIN diodes as microwave switches have previously been i n v e ~ t i ~ a t e d ~ - ~ and have been related to scattering processes in the intrinsic undoped layer.72839 The present investigation attempts to overcome these limitations of spatially separating the carriers from their ionized donors.

("~aval Research Laboratory, Washington. DC 20375. U.S.A.

Article published online by EDP Sciences and available at http://dx.doi.org/10.1051/jphyscol:1987561

JOURNAL DE PHYSIQUE II. EXPERIMENTAL RESULTS

1. GaAs SLPIN Diode Fabrication and Resistance Measurements

The diodes were fabricated by initially defining a 40 pm wide by 40 pm long mesa area. The mesa thus formed has an (111) outer facet. A stripe ridge in <011> direction is then formed in the mesa by preferen- tial etching, allowing for selective growth by MBE in the preferentially etched ridge. The angle between the (111) facet and the (100) ridge surface is fixed at 54" so that selective MBE deposition forms a narrow super- lattice region in a self-aligned manner. The p contact is formed by masking the entire structure and then opening the 2 pm x 2 pm contact windows followed by zinc diffusion. Similarly, the entire structure was then masked followed by AuGeNi deposition, 3000

A

thick and then sintering the structure at 450°C for one minute, in order to form the n contact side as shown in the cross-section of the diode in Figure 1. The p + GaAs contacts consisted of Au-2wt percent Mn alloy, 3000 A thick sintered at 450°C for thirty seconds.

Gold plating, 112 pm thick, completed the top p ⁺ and n + contacts. A sidewall passivation of sputtered SiOz was also utilized as shown in Fig. I. A passivation of polycrystalline GaAs was deposited on top of the superlattice region.

Since GaAs is a direct bandgap semiconductor, the injected charge during forward conduction is pri- marily stored at the NI and IP interfaces with little or no charge stored in the central portion of the I-region, contrary to silicon PIN diodes where the maximum stored charge occurs at the center of the I-region. The electron mobility 01,) and carrier lifetime (7) product @T) for GaAs is about the same as for silicon. This factor is due to the canceling effect of the high

a

and small 7 for GaAs. However, the pr product for a modulation doped GaAs structure is expected to be higher than that for silicon and bulk GaAs due to the spa- tial separation of electrons from the ionized donors. The consequences of this have resulted in the following observations: (1) The higher carrier mobility for GaAs and GaAs two dimensional electron gas (2DEG) structures has resulted in a reverse biased series resistance RR of approximately half that of silicon (2). The large p7 product results in a measured forward resistance RF of less than one Ohm, a value smaller than that for silicon or for bulk G~AS.' The forward resistance for GaAs SLPIN diodes also was observed to asymp- totically approach lower values (0.2-0.4 Ohms) at current drives greater than 100 mA. In contrast to this behavior, GaAs PIN diodes of an equivalent geometry reach a minimum limiting value at IF levels typically less than 100 mA.' For diodes with total capacitance values fabricated to date, GaAs SLPIN diodes behave like ideal PIN diodes with no exhibited performance dependence on device area

variation^.^.'^

The reverse bias breakdown voltage of these devices of greater than 40 volts compares favorably with GaAs PIN diodes of equivalent I-layer thickness. The junction capacitance has been maintained in the 0.05 pF to 0.10 pF range in order to minimize rf insertion losses. The devices were observed punchthrough at zero bias and typically exhibited a forward biased resistance of less than 0.9 Ohms at a forward current .(IF) of 25 mA and a reverse biased resistance RR of 2 Ohms at a bias level near zero volts.

2. RF Characteristics

The test circuit utilized was the standard microstrip circuit 2.5 cm in lengths and soldered to the bottom of a metal channel in order to insure only TEM propagation mode at frequencies above X-band. Two 40 pF lumped element blocking capacitors were employed on each side of the diode. Diode bias and diode drive was provided through a miniature choke with a 100 nH inductance at 250 MHz.

Au-Mn POLY GaAs AuGeNi

I '+ /

SL REGION

1

N +

I

\\ -

^{S.I. GaAs}

- ^//

T 7 7 f j 7 - 7 7 - ~ - - , 7 - - r 7 - *

S.I. GaAs

Fig. 1 - Schematic of the PIN superlattice diode structure showing the 100 A Gao~7&lo,24As1100 A GaAs superlattice region.

REFERANCE

-__--- _{. . / *}

_-*-

-1GaAs SLPlN

9 - ^*-.-.-. _\

^{-0--- *-.}

_{1 .}

GaAs PIN

2

3

k

u 4 RF PERFORMANCE OF SHUNT MOUNTED

V) GaAs DIODES

z

5

' I-

FREQUENCY (GHz)

Fig. 2 - RF performance of shunt mounted GaAs superlattice PIN diodes showing insertion loss and isolation.

\

GaAs INJECTION

GaAs SLPlN INJECTION

v

GaAs SWEEPOUT

GaAs SLPlN

VR= -5V. VF= +5V

1

^{I I} I

0 10 20 30 40

IF(mA)

Fig. 3

-

Total switching speed of GaAs SLPIN, GaAs PIN and Si PIN diodes measured at VR = -5 and V F = + 5 V.

C5-284 JOURNAL DE PHYSIQUE

RF static performance data for 1 pm SLPIN diodes over 2-18 GHz frequency are shown in Figure 2 . The insertion loss of the reference includes all of the switching elements, substitutes a section of the micros- trip line for the diode and is shown in Fig. 2 so that the diode contribution to the loss may be identified. The isolation data was taken at two current levels. the isolation loss remained constant at approximately 1 dB.

Switching speed measurements have been performed on GaAs SLPIN diodes using the standard test circuit.' The total switching speed includes a time delay between drive initiation and diode response. The toggle speed for all tests was 1 MHz at a 50 percent duty factor. The test results are plotted in Fig. 3 for the one micron diodes. The "injection" measurement implies forward current flow and the "sweep out" measure- ment implies reverse bias. The total switching speeds for 1.0 pm GaAs SLPINS and Si PIN diodes are com- pared in Figure 3. The reverse bias in all cases was -5 volts and the current was varied from 8 to 30 mA.

At IF = 30 mA and V R = -5 V, the one micron GaAs SLPIN diodes exhibit switching speeds of 4 ns for sweep out and 20 ns for injection respectively. In all cases, the GaAs SLPIN diodes have a faster response time than GaAs PINS and silicon PIN diodes. A similar behavior was observed for the 2 pm I-region diodes.

The reverse bias levels for the GaAs PIN and GaAs SLPIN diodes utilized was maintained at +5 volts and -5 volts. The switching speed for the sweepout mode was 5 ns for the GaAs SLPIN and 10 ns for the GaAs PIN diode at a forward current of 10 mA. The injection mode switching speed for the GaAs SLPIN was measured to be 20 ns. It is also noted that the switching speed for the GaAs SLPIN remained constant for the current levels which were applied probably due to its low forward resistance.

111. CONCLUSIONS

Superlattice PIN diodes have been fabricated and tested as microwave switches in the 2-18 GHz fre- quency range. Switching speed advantages have been obtained t h r o ~ g h the utilizeon of a superlattice I- region consisting of fifty periods and one hundred periods of 100

A

GaAsllOO A Gao,76A10.24As layers.

Total switching speeds measured were 4-5 ns for the sweep out mode and less than 20 ns for the injection mode. This investigation shows that superlattice PIN diodes are also characterized by low forward resistances and low insertion loses. Since recombination lifetime has been enhanced, the I-region thickness may be varied depending on frequency, power handling and forward resistance requirements.