Analysis of a dual mode forward/flyback converter

ANALYSIS OF A DUAL MODE FORWARD/FLYBACK CONVERTER

by

Thomas Raymond Zaloum

SUBMITTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE

DEGREES OF

BACHELOR OF SCIENCE and

MASTER OF SCIENCE

at the

MASSACHUSETTS INSTITUTE OF TECHNOLOGY June, 1982

Thomas Raymond Zaloum, 1982

The author hereby grants to MIT permission to reproduce and to distribute copies of this thesis document in whole or in part.

Signature redacted

Certified by

Auth r

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redactedomputer

<Si gnature

redacted

rY.

.7L-uprio

Arthur C. Smith

Chairman, Departmental Committee on Graduate Students

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ANALYSIS OF A DUAL MODE FORWARD/FLYBACK CONVERTER

by

Thomas Raymond Zaloum

Submitted to the Department of Electrical Engineering and Computer Science on May 14, 1982 in partial fulfillment of the requirements for the Degrees of

Master of Science in Electric Engineering and Bachelor of Science in Electrical Engineering

ABSTRACT

A single transistor dc-dc converter that combines both forward and flyback action is presented. The resulting circuit is ohmically isolated and can operate over a wide range of. input-to-output voltage ratios. An analysis of the circuit indicates that the forward and flyback portions of the circuit interact to produce three distinct regions of operation. With the design information presented, the circuit can be tailored to utilize the desirable charac-teristics of either converter action for a specific application. The dynamics of the dual. mode circuit are modeled by means of the state-space averaging technique. Also described is the testing of an ac-dc regulator that takes advantage of the wide operating range of the dual mode converter to operate off the ac line with only a small input filter.

Thesis Supervisor: Dr. John G. Kassakian

ACKNOWLEDGMENT

The author would like to thank the General Electric Company, Corporate Research and Development, for providing the opportunity to undertake this thesis. In particular, I thank Dr. James W.A. Wilson, manager of the Power Circuits and Systems Branch, for his encouragement and support. Great thanks go to Dr. John N. Park for his guidance on this project throughout my stay at GE.

I also appreciate the assistance of Professor John Kassakian of MIT in completing the final thesis.

TABLE OF CONTENTS Chapter _Page 1 INTRODUCTION ... 1 2 PRIOR TECHNOLOGY ... 4 3 CIRCUIT OPERATION ... 10 3.1 O verview ... 10 3.2 Basic Relations ... 11 3.3 R egion 1... ₁₅ 3.4 R egion 2 ... ₁₇ 3.5 R egion 3... ₂₀

3.6 Normalized V-I Characteristics ... 22

3.7 Device Ratings ... 26

3.8 Effects of Non-Ideal Elements ... ₃₀

3.9 Sum m ary ... ₃₂

4 SMALL SIGNAL ANALYSIS ... 33

4.1 O verview ... ₃₃

4.2 Region 1: State-Space Analysis ... 33

4.3 Region2: State-Space Analysis ... 42

4.4 Region 3: State-Space Analysis ... 49

4.5 Sum m ary ... ₅₀

5 EXPERIMENTAL WORK ... 53

5.1 Description of the Breadboard... ₅₃

5.2 Presentation of Steady-State Results ... 63

5.3 Sum m ary ... ₆₉ 6 CLOSED-LOOP TESTING ... ₇₆ 6.1 O verview ... ₇₆ 6.2 Basic Tests... ₇₆ 6.3 Line Operation ... 84 7 CONCLUSIONS... 91 REFERENCES ... 94

GLOSSARY OF TERMS D D' 82 fs iL i'L in io LM Ls N, N₂ RL T Vs VSE VO

fraction of switching period that transistor conducts fraction of switching period transistor is off

decay interval of flyback current in Region 1 decay interval of forward current in Region 2 switching frequency

forward contribution to output current flyback contribution to output current magnetizing inductance current output current

magnetizing inductance forward smoothing inductor forward winding turns ratio flyback winding turns ratio load resistance

switching period source voltage

effective source voltage

Example of Nomenclature

output voltage

iL = iL (t) instantaneous current (total variable)

IL average current (dc component)

iLmax maximum of iL during T

iL min minimum of iL during T

ILN normalized average current

1

LIST OF FIGURES

Figure _Page

1 _{Typical ac-dc converter ...}

3 2 _{Linear and switched mode converters ... 3} 3 Essence of dc-dc regulator... 3 4 _{Non-isolated single transistor switching topologies ...}

5

5 _{Isolated single transistor switching topologies ... 7}

6 Transformer clamp reset method... 7 7 Forward/flyback converter... 9 8 _{Equivalent circuit for forward/flyback converter ...}

12 9 Definition of the duty cycle ... ₁₂ 10 _{Continuous and discontinuous mode inductor currents ...}

12 11 D versus V---V-- -- -- ---... -.... ... _{... ... 14}

12 _{Current waveforms for regions of operation ... 14}

13 _{Flyback current in Region 1 ...}

18 14 _{Forward current in Region 1 ... . 18}

15 _{Instantaneous output current in Region 1 ...---... 18} 16 _{Forward current Region 2...}

21 17 _{Flyback current Region 2 ...}

21 18 Output current Region 2 ---... ---... ₂₁

LIST OF FIGURES (Cont'd)

Figure Page

19 O utput current : Region 3 ... 21

20 V-I characteristic for forward circuit ... 25

21 _{V-I characteristic for flyback circuit ... 25}

22 _{D efinitions of device stresses ... 28}

23 Comparison of unfiltered output currents ... 29

24 _{Circuit model with some parasitic elements ... 31}

25 Switching states: Region 1 ... ₃₅

26 Root locus: Region 1 ... ... 39

27 C anonical circuit m odel ... ₄₁

28 Circuit model for dual mode converter : Region 1 ... 41

29 Switching states : Region 2 ... 44

30 R oot locus : R egion 2 ... 48

31 Transition at Region 1 -Region 2 boundary ... 51

32 Incremental block diagram of regulator ... 52

33 Output capacitor current at rated load ... 59

34 Cross section of "EC" core for inductor construction ... 62

LIST OF FIGURES (Cont'd)

Figure Page

36 Snubber configuration ... 62

37 _{Power circuit components ...--- 64}

38 D ual m ode converter breadboard ... 39 SG 1525 block diagram ... 66

40 _{O pen-loop drive circuit ... .. 66}

41 _{Forward and flyback currents : rated load ...} 70 42 _{Output current and voltage : rated load ... 70}

43 Transistor turn-off waveform s ... 71

44 _{Prim ary current ... 71}

45 Forward and flyback current : Vo = 2.5 volts ... 72

46 Transistor voltage and current : Vo = 2.5 volts ... 72

47 _{Forward, flyback currents, transistor voltage boundary case ...} 73 48 _{Output current and voltage : Region 2 ... 73}

49 Forward and flyback currents : Region 2 ... 74

50 _{Forward and flyback currents : Region 3 ...} 74 51 _{Experimental D versus Vo/ Vs plot ... 75}

LIST OF FIGURES (Cont'd)

Figure Page

53 _{Uncom pensated SG1525 transfer plot ... 78}

54 Uncompensated loop - transmission : Region 1 ... 79

55 Representative uncompensated loop transmission : Region 2 ... 80

56 _{C om pensation param eters ... 81}

57 _{Response to reference step : Region 1 (slow compensation) ... 83}

58 Response to reference step : Region 1 (fast compensation) ... 83

59 _{Response to Vs step : Region 1 (slow compensation) ... 85}

60 Response to Vs step : Region 2 (slow compensation) ... 85

61 Response to Vs step : Region 1 (fast compensation) ... 86

62 A C line connection ... 87

63 _{Illustration of input im pedance ... . 87}

64 Source and output voltages : C, = 60.F , Vref = 1.75V ... 89

65 Source and output voltages : C, = 60pF , Vref = 5.0V ... 89

66 _{Source and output voltages : C, = 20tF , Vref = 3.OV ...} 90 67 _{Modulation of duty cycle (high ripple source) ... 90}

LIST OF TABLES

Table Page

1 Comparison of various switching converter topologies ... 9

2 Comparison of peak device stresses... 27

3 Idealized circuit component values ... 55

4 N om inal turns ratios ... 56

Chapter 1

INTRODUCTION

There are many applications for regulated dc sources. These range from low voltage supplies for logic circuits to high voltage supplies for cathode ray tubes. Since most com-mercially distributed power is ac, such sources are ultimately ac-dc converters. A change in the voltage level may be accomplished before any rectification by a transformer, or after, in a dc-dc stage.

A commonly used configuration employs a dc-dc regulator which automatically com-pensates for possible variations in the source voltage. Typically, three stages are involved: an input filter, the regulator, and an output filter (Figure 1). The input filter rectifies the ac line and generally provides a low ripple source to the regulator. The regulator converts that source to the required dc level, acting as a dc-dc transformer. The output filter at-tenuates any harmonics that may be generated by the action of the regulator.

The regulator can either be of the linear type or one designed to operate in a switched mode (Figure 2). In each case, the variable element represented by S can be achieved with a transistor. Either circuit becomes a regulator when the output voltage is fed back and compared to a reference, the difference determining the drive signal D (Figure 3).

A major problem with the linear regulator is that its efficiency is no better than the output/input voltage ratio. Improving this efficiency becomes especially difficult when ei-ther voltage is required to vary significantly. Also, the linear regulator can only convert to

a lower voltage level, which is not a constraint for the general switching converter.

Switching regulators use time-averaging to effect the dc-dc transformation. With the prop-er inductive enprop-ergy storage, step-down, step-up, or both are possible. Since switched mode supplies do not inherently waste energy (although there are inevitable losses), they

are preferable when efficiency is a concern. This efficiency comes at the cost of greater filtering requirements, as compared to a linear supply.

The scope of this thesis is confined to the switched mode circuits. The work began with a proposed, but undeveloped, new topology. In the next chapter, the potential benefits of this circuit over previous ones are indicated. Following that, a detailed analysis quantifies the improvement. A breadboard of the circuit was constructed and evaluated and the results are presented.

ac FIT REGULATOR VFLTER Vo (dc)

Figure 1. Typical ac-dc converter

S D + VS RL Vo S D 4 Vr RL V 0 LINEAR SWITCHED

Figure 2. Linear and switched mode converters

V- CONVERTER

F

LCONTROL

(FEED FORWARD, IF USED)

VREF

Figure 3. Essence of dc-dc regulator

-- Vo

Chapter 2

PRIOR TECHNOLOGY

The intended application of a power supply generally determines what parameters (size, cost, weight, reliability, etc) are most carefully controlled in its design. These dom-inant parameters, along with the electrical specifications, will determine the approach tak-en. In regulated supplies where high efficiency is desired, the dc-dc switching converter is well suited. Within this category, the designer still has several choices. Each of the vari-ous types of high frequency dc-dc converters has its own distinct advantages and disad-vantages for each application. Often, a compromise is necessary because no single convert-er topology incorporates all the desired charactconvert-eristics.

The standard single transistor switching topologies are the buck (forward), the boost, and the buck/boost (flyback) circuits (Figure 4).1 As the name implies, the transistor in each of these circuits operates as a switch, ideally being either fully on or fully off. The duty cycle D represents the percentage of time the switch is closed. This controls the ra-tio of charging time to discharging time for the inductor. Since the average voltage on the inductor must be zero in the steady state, the ratio Vol Vs is thus constrained by D.

No-tice that in the buck and boost converters, there is a period when energy flows directly from the source to the load, while in the flyback circuit the charging interval and the discharging interval do not overlap.

If ohmic isolation and step-down capability are required, which is true of the majority of line operated dc supplies, the choice narrows to the isolated forward or flyback circuits (Figure 5). Note that the isolated flyback converter (Figure 5b) requires only one mag-netic component since the transformer's magnetizing inductance serves as the energy storage element. The forward converter (Figure 5a) uses a separate transformer.

D

VS Vo

(a) FORWARD (BUCK) CONVERTER

VS

,,Vo

(b) BOOST CONVERTER

D

Vs _V0

T +

(c) FLYBACK (BUCK/BOOST) CONVERTER

The pulsed dc voltage applied to the primaries of these transformers has a non-zero average value. Precautions must be taken to ensure that the flux level is reset by the end of each switching period to prevent saturation of the core material. In the flyback circuit, this is inherently accomplished as the magnetizing energy is transferred to the load during the transistor's off period. The forward circuit, on the other hand, requires a separate en-ergy recovery network. In Figure 5a, this is shown as a third winding which returns

ener-gy to the source through a diode, during the "off" interval. This is the traditional

method and can be implemented with N2 = 1 or with the ratio optimized to some design

goal (such as reducing device stresses).

The transformer clamp (Figure 6) resets the transformer with a constant voltage,,in-dependent of source voltage.2 This can reduce the peak stress on the transistor, particu-larly when the input voltage is subject to large variation. However, unless there is some use for the auxiliary supply created, the efficiency of this connection is jeopardized.

Ideal-ly, this energy should be transferred to the load, which is desirable for both efficiency and

device utilization.

The previous discussion of the transformer saturation problem makes the flyback con-verter look especially desirable for isolated supplies. However, other factors force compromises in circuit selection. Table 1 summarizes characteristics of the various topo-logies. Note that if the turns ratio of the transformer does not equal unity in the isolated circuits, the input-output voltage relations must be suitably scaled.

The flyback converter, which is capable of either buck (VO < Vs) or boost (Vo > Vs) operation, can tolerate a wide range of source voltages for a given output. This reduces the requirements for the input filter (stage 1 of Figure 1), providing the feedback circuit is fast enough to follow and suppress the effect of the input ripple on the output voltage. This advantage of the flyback circuit comes at the expense of increased device stress, as

+ D

+

Vs _V0

1:N2:N1

a) ISOLATED FORWARD CONVERTER WITH RESET WINDING

DI

Vs D _{-- Vo}

FI

1:N

b) ISOLATED FLYBACK CONVERTER

Figure 5. Isolated single transistor switching topologies

Vs

TRANSFORMER CLAMP RESET METHOD

will be detailed in the following chapter. It can be readily seen, however, that while energy can flow directly from the source to the load when the switch (transistor) is closed in the forward converter, in the flyback circuit all energy must first be stored in the induc-tor for transfer during the "off" interval. This causes the peak device stresses to be higher in the flyback circuit.

A circuit that combines direct energy transfer with a wide operating range would have advantages over a forward or flyback converter alone. Such a circuit is possible. If Figures 5a and 5b are compared, it can be seen that the reset network of the isolated for-ward converter is identical to a flyback connection, except for where the stored energy is delivered. Additionally, note that the transformer clamp network (Figure 6) is a flyback connection to an auxiliary load, regulated by the zener diode. However, there is a constant potential available elsewhere in the circuit: the regulated output. Continuing this path to its conclusion leads to the dual mode forward/flyback converter (Figure 7).

The dual mode circuit can be viewed as two converters operating in parallel, from the same source and into the same load. The flyback circuit serves as the reset mechanism of the isolated forward converter. Since both modes supply load current and are forced to have the same duty cycle (D), they are not independent. This interaction makes a com-pletely new analysis of the circuit necessary. Fortunately, the standard switching convert-er analysis techniques can be readily applied.3'4 The next two chapters detail the steady state and ac small signal operation of the dual mode converter.

Table I

COMPARISON OF VARIOUS SWITCHING CONVERTER TOPOLOGIES

VO Input Current Output Current

t I I Vs Unrestricted VO > VS Discontinuous Discontinuous Continuous Continuous Discontinuous Discontinuous Reset Problem If Isolated Yes No Yes N₂ 0 N1 V0

Figure 7. Forward/flyback converter Circuit Forward Flyback Boost 0

<

<

Chapter 3

CIRCUIT OPERATION 3.1 Overview

The steady state operating conditions of the dual mode converter are detailed in the following pages. The basic constraining relations are derived by assuming continuous periodic currents in the two inductors. These relations indicate the existence of three dis-tinct regions of operation, each of which are presented in detail.

To provide a graphic display of how each mode responds to variation in the load current, output voltage versus output current characteristics are presented. These quanti-ties are normalized to the component values and operating conditions so that dimension-less axes can be used. Finally, a table of device ratings for the dual mode, forward, and flyback converters is presented. The benefits of the new circuit, as compared to the single mode topologies, are indicated.

To avoid confusion, a consistent language for referring to various aspects of the circuit has been adopted. When making a distinction between the flyback and forward portions of the circuit, the words "circuit" or "converter" are used, e.g., forward circuit or for-ward converter. The word "mode" is used to denote the distinction between continuous and discontinuous inductor currents. The operating point is defined to be within certain "regions of operation." Either or both the forward or flyback converters may be in con-tinuous or disconcon-tinuous conduction mode, depending on the region of operation. Both continuous and discontinuous inductor currents may exist at a given operating point, hence the name "dual mode."

3.2 Basic Relations

An equivalent circuit for the dual mode forward/flyback converter represents the transformer by a set of ideal turns ratios and a magnetizing inductance (Figure 8). A real transformer also has loss elements and leakage inductance. While these may have observ-able effect on an actual circuit, they do not alter the basic operation and would introduce unnecessary complication at this point. To derive the basic operating regions, it will be as-sumed that there are no losses; i.e., ideal diodes and R, = 0. The results of this assump-tion are assessed after the basic analysis.

The circuit is considered in steady state when the various voltages and currents are periodic at the switching frequency (Figure 9): i(T) = i(0). This periodicity condition at the two inductors requires zero net volt-secs per switching cycle. Assuming continuous inductor current:

T

f vL (tdt = 0 or VL,,,D - VLOf (0-D)

where VL is the voltage across the inductor. Applying this to the magnetizing inductance:

VsD = yielding N₂ DN2 ( a) VO - -DVs (a V0 D - VO(b) VO + N2Vs

Similarly, at the forward smoothing inductor Ls:

(N1 Vs - VO) D =- (1-D) VO yielding

VO - DN1Vs (2a)

D - 0 (2b)

These are the standard relations for flyback and forward converters, respectively, oper-ating separately in the continuous conduction mode (Figure 10). However, the con-straints on the two converters are simultaneously in effect, since they have the same

Vs, V0, and D. LL DRIVE D 1:N2:N1 Ls it) SIGNAL| m --- IL RC - - + VsLm I LRL Vo co-_

J

Figure 8. Equivalent circuit for forward/flyback converter DRIVE SIGNALSWITCHING FREQUENCY = fs= T SlDUTY CYCLE = D =-. T 10 t D' = 1-D =of 0 DT T T

Figure 9. Definition of the duty cycle

L L

-DT T t DT (D + d)T T

a) CONTINUOUS MODE b) DISCONTINUOUS MODE

The plots of D vs. Vo/ Vs for Equations lb and 2b, as shown in Figure 11, have one point of intersection (other than D = 0). This is the only voltage ratio, for a given transformer, for which both inductor currents can be continuous and periodic. For each converter, operation below its constraint line (smaller D) corresponds to discontinuous conduction. Operation above the constraint line corresponds to increasing average current, and thus is not a steady state condition. For this reason, the operating point must be on or below the lower of the two curves, as indicated by the dotted path on Fig-ure 11. The expected current waveforms for the three regions defined in FigFig-ure 11 are shown in Figure 12.

The switching action of the power circuit determines the ripple of the inductor current, but not necessarily its dc component. It is the load impedance that determines the aver-age value of the current in the continuous conduction mode. Only in discontinuous con-duction is the amplitude of the inductor current determined by the switching circuit. That is, in a normal single mode circuit, the duty cycle is dependent only on Vo in continuous conduction, but on both Vo and Io when the inductor current becomes discontinuous.

The load condition for the dual mode converter is:

10- -- = IL + 'L (3)

R L

The average flyback current and the average forward current sum to the output current (though not instantaneously). An interesting aspect of the dual mode circuit is that the duty cycle is determined by the continuous mode, and thus is independent of Io, despite the existence of the discontinuous mode. This is true providing that the load is sufficient

(I great enough) to sustain continuous conduction. Since the continuous mode

deter-mines the duty cycle, it will be considered the dominant mode. Thus, in Region 1 the forward converter dominates, while in Regions 2 and 3, the flyback converter is dom-inant. It should be noted that Figure 11 shows the case N1 > N2. If N1 < N2, the

D

A4

,1

4

0

Current waveforms for regions of operation 1 .5 im

A.

t

flyback converter would always be dominant. The contribution of the forward converter would be small and the benefit of its continuous output current significantly reduced.

At a given operating point, the circuit's behavior follows this sequence:

1. Vo/ Vs determines the region of operation and the dominant converter

2. The dominant converter determines D.

3. D determines the contribution of the discontinuous mode to the output current. 4. The remaining output current (defined by Equation 3) determines the contribution

of the continuous mode current.

Following this sequence, quantitative relations among the circuit and load parameters can be determined for each region.

3.3 Region 1

In this region the forward converter operates in continuous conduction mode and determines the duty cycle D by Equation 2b. The forward current is fixed by:

IL = 10 - IL

Thus the flyback current must first be evaluated. Referring to Figure 13:

VsDT

iMmax -

LM

""Lm

Since the waveform is triangular, the average IM over the conduction period (D + 8 1) is:

_____ VsDT

IM - ₂ =ma VD 2_LM (5)

Instantaneously, during the "off" period

l'L (t)

-(6) N₂

and the conduction interval of i4 is 81, thus the average flyback contribution to I is

VsDT 8

1

-2_Lm

The decay interval 81 can be determined from the zero net volt-secs constraint that must still hold at L11:

V0

VsD = 81 (8)

N₂ which, with substitution for D from (2b), yields:

N2

81 = -- (9)

NI

which is a constant for a given circuit. Using (2b) and (9) in (7) yields

, VsDT V0T

I L = _{T (10)}

2NILM 2NLM

which shows that for a given VO and fs the total flyback contribution is constant. This would be expected, since the energy stored in the magnetizing inductance during to,, is proportional to (VsD), which is held constant by the forward condition (2a).

Finally, from (3) and (10) the total forward contribution can be fixed.

Vo V

IL - _{RL 2N2LM} (11)

As Vs changes (with the operating point remaining in Region 1) D must vary to hold VO constant, but the two average currents IL and Ii remain constant. There are limitations on this, which are determined by considering the instantaneous currents iL t) and I (t).

The flyback current iL (t) has been shown to be triangular in shape. The forward current iL () _{will have the form shown in Figure 14. The difference between the}

ex-tremum, from Ai =

j

L0

AL== (N1Vs - VO) DT TVOD' (12)

Ls Ls

Thus the maximum and minimum values of iL (t) are respectively:

TV0D'

iLmax = IL + 2Ls (13a)

= - TVD (13b)

'Lni IL _ULs

To maintain continuous conduction, the average current must be great enough to maintain 'L > 0. This is the same condition that any forward converter faces, the

difference here is that IL is reduced by the flyback current (eq. 11), which increases the minimum load. The load condition is:

10 > TV+ _(13c)

2 N'LM Ls

The instantaneous output current is shown in Figure 15.

10 ma Lmax + 'ILmax

014a)

i0 . == iL mi LI b

As D is increased, the operating point approaches Region 2. Equation 9 indicated that the decay period for the flyback current, 81, was constant. Clearly, 81 T must be less than the tiff period (1-D)T. Evaluation of this boundary shows that it is in fact the same con-dition that leads to the intersection point at Vo/ Vs - N1- N2 in Figure 11. According to

the model pursued thus far, both the flyback and forward converters are in continuous conduction at this point. Since neither current's magnitude is directly constrained, the distribution of the load current between the two is undefined. As D is further increased, moving the operating point into Region 2, the forward circuit drops into discontinuous conduction and the current distribution is again constrained.

3.4 Region 2

The analysis for this region parallels that for Region 1. The flyback converter will operate in the continuous mode and thus determine the duty cycle by Equation lb. The flyback current is fixed by (Figure 8):

DT = ON PERIOD d1T = DECAY PERIOD D'T = OFF PERIOD DT (D+ d1)T T a) MAGNETIZING CURRENT N. (D+ 6₁)T T

b) OUTPUT COMPONENT OF MAGNETIZING CURRENT

Flyback current in Region 1

ImIaxI SAI " I A iL T Figure 1 o max i0min Figure 15.

4. Forward current in Region 1

DT (D+ d1)T T

Instantaneous output current in Region 1

iM(t)A M max

i'L(

First evaluate the forward current; refer to Figure 16 and from i 1 DTV L dt:

L0

L~ =[N1Vs - Vo DT/Ls=82VoT/Ls (15)

The average over the full period is

IL = iL +(D + 82)/2 (16)

Equation 15 with (ib) can be solved for 82, yielding

82 - N, or D + 821 = DN1 VS (17)

N 2 + VO/ VS I VO

Note that unlike Region 1, the decay interval is dependent on Vol Vs. It is a max-imum at Vol Vs = N1 - N2, where 82 - N2/N1 - 1-D at the intersection point, and the

forward current just becomes continuous. When Vo/ Vs - N1, 82 - 0 and the forward

converter ceases contributing, because its effective source voltage is less than VO. Fig-ure 11 displays these boundaries. From (15) and (17) it can be seen that for a given

VO, iL a is a maximum at Vo/ VS - N₁ - N2 and diminishes to zero at Vo/ Vs - N1.

The maximum peak value

N2V0T

Max iL = LN₁ (18)

From (ib) and (17):

N₁ (D + 82) N (19) N2 + VO/ VS and (15), (16) and (17): VO T (N₁ - Vo/VS)N _{1 (20)} IL Vo VO 2Ls (N2 + V/ Vs)2 N2 VO T

Note that as (Vo/ VS) approaches (NI - N2), IL - N 2 0 which is the condition

N1 2Ls

defined by (13b), proving that the magnitude of this current is continuous across the boundary point. From (3) and (6): (Figure 17)

I N2 (21) ita =iL _N (22) DVsT ₍₂₃₎ L,,v 1

Mmax = N2IL DVsT (24a)

(1-D) 2_LM N2IL D VS T (24b) Mmin = (1-D) 2LM ,Ij D Vs T max = +

D

T(25a)

The condition that continuous conduction is possible is immin > 0. A stand-alone flyback converter faces the same constraint, while in this case IM is reduced by the reflected forward contribution, 1L (Equation 20). This increases the minimum load current for continuous conduction. The output current for Region 2 is shown in Fig-ure 18.

3.5 Region 3

In this region, the dual mode circuit reduces to a simple flyback converter, because the source voltage is too low for the forward converter to operate. The forward contribution is zero, thus

II - Io (26)

The previously derived relations for Region 2 hold with the substitution

iL W ) L 0.

N ₂1₀

I = 1-D) ₍₂₇₎

iL-max L Figure 16. max- M iM min--DT = ON PERIOD 62T = DECAY PERIOD

(I-D)T = D'T = OFF PERIOD

DT (D + 62)T T Forward current: max Lmin l'L _____________________ -.--. ~ + DT Figure 17. ioA

O max L max+L max'

L max Figure 18. iL(t) - io(t) IL = 10 T DT

Output current: Region 3 Region 2

DT T t

Flyback current: Region 2

7

DT (D + 62)T T

Output current: Region 2

Figure 19. T t * Iit M

;;;z-

Loo

3.6 Normalized V-I Characteristics

While the D vs. Vo/ Vs sketch (Figure 11) is useful in determining the operating point

as a function of voltage, it does not convey the circuit's response to the load condition. For this purpose, normalized V-I characteristics can be derived. The output current, on the horizontal axis, is normalized to the quantity I = VSE TIL. Since two inductors

(Ls and Lm) which face different effective source voltages VSE equal to (N1 Vs and Vs,

respectively) are involved, the dual mode behavior is most easily shown with two separate characteristics, one for the forward circuit and one for the flyback. The output voltage, on the vertical axis, is normalized to NI Vs for both plots, so that a given operating point corresponds to the same vertical position on both Figures 20 and 21. To avoid confusion, these characteristics are for the specific value of N2/Ni - 0.7, which fixes the duty cycle at the intersection point to D = 0.3. The individual characteristics are drawn as a func-tion of the parameter D.

Each sketch has four major parts.

1) an area corresponding to continuous conduction, where the current is not constrained by the duty cycle,

2) a boundary where the current is just barely continuous,

3) an area where the current is discontinuous, to the left of the boundary, and

4) a constraint line within the discontinuous area, imposed by the operation of the dom-inant (continuous conduction) converter.

1) The continuous conduction area is indicated by the horizontal lines on both the for-ward and flyback characteristics.

2) To derive the boundary (IN) line (dashed) for each converter

iL= = IL - TVOD'/2Ls = 0

Since the forward current is still continuous, Equation 2b applies, yielding

IL LS V (-VN)

Ni TVs 2 (28)

where VN = Vo/Ni Vs. As Figure 19 shows, I*LN = 0 at Nv = 0 and VV = 1. b) For theflyback circuit, set Equation 25b to zero:

,IL DVs T

1

Lmin = (-D) 2N2LM 0

Since the flyback current (M) is still continuous, Equation lb applies, yielding N₂ ILN2LM ILN TIs Ni (N 2 2 21 + VNI Ni

which is zero only at VN=0 (Figure 21).

3) In the discontinuous area, the current is constrained by the duty cycle:

a) For the forward converter for ILN < 'LN

Equations 15 and 16 apply:

ILLs ILN NiV S b) For the Flyback Converter for ILN <iO Equations 7 and 8 apply:

II VN - 1i (30)

(31) , ILN2LM _ N₂ D2

TVs N, 2VN

4a) To find the particular locus of points for operation in Region 2, substitute the duty cycle constraint of the flyback mode Equation 16.

(29)

= V\(1 - V\) (2 ILN = 2

+ 2 2 32

N2

2 V\ +

-This is the dotted line in Figure 19. Notice that it intersects the normal boundary line (dashed) at the dual mode point V' = ( 1 - N2/N1) as required.

4b) To find the particular locus of points for operation in Region 1, substitute the duty cycle constraint of the forward mode , Equation 2b.

IiN = N2 VN/ (2N1) (33)

This is the dotted (straight) line in Figure 20. Notice that it intersects the normal bound-ary (dashed) at the dual mode point, VN = 1-N/N1.

The path of the circuit's operating point can now be traced out as any parameter varies. Refer to Figures 11, 20, and 21 and assume VN is swept from a minimum to a maximum. Operation begins towards the left of Figure 11, in Region 1. This corresponds to a flyback current on the dotted line in Figure 21 with the remainder of the load current supplied by the forward converter, operating on the horizontal characteristics in Figure 20. As VN increases, the flyback contribution increases as the intersection point is reached. At this point, the current sharing is unconstrained until VN increases further. The two converters trade roles, the forward current on the dotted line of Figure 20 while the flyback circuit picks up the remaining load current, operating on the horizontal characteris-tics of Figure 21. As VN becomes greater than unity, the forward action ceases, as indi-cated by the vertical line at ILN=O on Figure 20. This condition corresponds to Region 3.

1.2 1.1 VN 1.0 W 9 8 0 7 C-5 < 4 z .2 0 D =.5 0=4

o

Figure 20. V-I characteristic for forward circuit

-N

4~

Figure 21. V-I characteristic for flyback circuit

0

3.7 Device Ratings

The peak values of the various voltages and currents which appear on the circuit ele-ments are listed in Table II for the dual mode, the forward, and the flyback converters. These parameters are defined in Figure 22. So that a reasonable comparison can be made, all three converters are assumed to be operating in a step down condition and the dual mode converter is in its Region 1 of operation.

The dual mode converter has a lower V-I requirement on its switching device for two main reasons. The peak off-state voltage is reduced (as compared to the isolated forward converter) because the energy recovery network clamps the transformer secondary to VO, rather than Vs. The current is reduced because the magnetizing energy supplies load current, reducing the forward contribution IL. In the form shown in Table II, it is clear that the transistor current over and above the reflected load current (ION,) is reduced by a factor of two. As the table shows, this does not impose a penalty in diode stress. The output capacitance required to achieve a given voltage ripple will be increased somewhat, but this will still be much less than required by a flyback converter (because of its discon-tinuous output current.) Table II does not list expressions for CO because more insight is gained from a graphical comparison. Figure 23 illustrates the currents that CO must filter in each case.

Depending on the application, the forward and flyback contributions in the dual mode converter can be adjusted to best suit the governing conditions. Thus far, the dual mode converter has been described analytically. In later chapters, the correlation of theory and experimental results will be shown, including a numerical version of Table II for a typical application.

Table II

COMPARISON OF PEAK DEVICE STRESSES Isolated

Dual Mode Forward

Vs + VO/N2 IoN1+ TVo/2NILm N1 -(VO+ _{VF)- VF} N₂ VsNI- VF VO+ VSN2 TVO 2N? L, Vs(l+l/N ₂) ION1+ TVO/NlLm N1 ( S VF)- VF VSNI- VF Vs(1+ N2) I0 Vs+ Vo/ N2 Io(N₂+ /01 VS) V0+N 2VS

Io(N

2) VF _{is diode forward drop, assumed zero except for} VDR'S

3) Assume low ripple of continuous currents, i.e., A iL « IL to simplify equations. Parameter VQ Isolated Flyback IQ VDR 1 VDR 2 VDR 3 <IL> Notes:

+ VDR3 -- VDR1 + N2 + VN Vs VDR2 VO 1 N1 Co

a) ISOLATED FORWARD CONVERTER

+VQ - VDR3 + S1 N Vs _VO b) FLYBACK CONVERTER + V0

-10

i0 (t)

10

T t

a) DUAL MODE CONVERTER (REGION 1)

io (t) 10 T -t b) FORWARD CONVERTER io (t) 10

Comparison of unfiltered output currents Figure 23.

-3.8 Effects of Non-Ideal Elements

The basic operating relations have been shown for an ideal circuit. A physical circuit will differ due to the existence of resistive losses, leakage inductance, and stray capaci-tance (Figure 24). The effects of losses in the various legs of the circuit can be accounted for by the inclusion of suitable terms in the relations already developed. For example, the diode "on" state voltage drops (VF) are easily added to the duty cycle constraints for the two converters (Equations 1 and 2). From VL, D - VL,,1-D):

(1-D) ( VO+ VF)

AtLM _{VsD =N}

2

At Ls (N1 Vs - VO - VF)D - (1-D) (Vo+VF)

With the substitution of VOF - VO + VF for VO, the result is identical to that of Sec-tion 3.1. Figure 11 is still valid, if the plot is considered to be D versus VoEI VS. For

high voltage outputs (VO >> VF) the change will not be significant. For a 5 volt supply, however, a VF of 0.6 V would cause a 12% deviation in the effective output voltage.

Resistance in the secondary circuits will also cause the dual mode behavior to deviate from the simplified description. Figure 24 illustrates one way of modeling parasitic resis-tances in the outputs of the forward and flyback portions of the circuit. It can be seen that R, and Rp will add current-dependent terms to the above volt-seconds equalities at

Ls and Lm. This contrasts with the ideal behavior where the duty cycle is independent of

the output current, given continuous conduction in the dominant converter.

Two effects can be predicted without a detailed mathematical analysis. Parasitic resis-tance in the output of either converter will cause it to "see" a greater output voltage. This will shift its D versus Vo/ Vs constraint to the left (assuming the axes are un-changed). If the effect is greater for the forward converter, the intersection of the two constraints will occur at a lower Vo/ Vs. If the flyback converter has a greater shift, the

Figure 24. Circuit model with some parasitic elements LI vs LM

V6

Lm

-intersection will move to the right, to greater Vo/ Vs. A second effect is that the current distribution (between the forward and flyback portions of the circuit) will be constrained at that intersection point, because of the existence of the current-dependent terms. This behavior was demonstrated with the breadboard circuit, as shown in Chapter 5.

The inevitable transformer leakage inductance will contain energy that produces volt-age peaks when the switching device is turned off. Depending on the components used, some means of protective snubbing may be required. Also, stray capacitance may interact with this parasitic inductance to produce oscillatory behavior during switching, although this was not a problem.

One last significant non-ideality is related to the output capacitor. The effective series inductance (ESL) and effective series resistance (ESR) of the capacitor will place con-straints on its selection other than its capacitance and current rating. The ESR and ESL will increase the output voltge ripple as compared to an ideal capacitor. This is especially noticeable for discontinuous output currents. These and other parasitic effects are not peculiar to the dual mode circuit, and thus are not further addressed here.

3.9 Summary

This chapter has presented the steady state operation of the dual mode converter, both graphically and mathematically. Much detail has been shown, which supports the funda-mental consequences of dual mode operation. This detail may at times tend to obscure the basic results, however. The most important aspect is the interaction of the two modes, which thus defines the regions of operation (Figures 11, 12). Once this is accept-ed, mathematical detail follows directly. The method of depicting the operating point on the normalized V-I characteristics (Figures 20, 21) is also important. This is a concise way of showing how the two modes react to the load condition. An understanding of these concepts is necessary before proceeding to the small signal analysis which follows.

Chapter 4

SMALL SIGNAL ANALYSIS 4.1 Overview

The dual mode forward/flyback converter has been analyzed using the state-space averaging techniques of Middlebrook and C'k.5 These techniques provide detailed predic-tions for the transient behavior of the switching circuit which are used to achieve closed-loop regulated operation. The analysis method represents each state of the switching cir-cuit by an appropriate matrix of equations, the coefficients of which are averaged (weight-ed by the period each is in effect) to yield a single steady state representation. The appli-cation of standard perturbation and linearization techniques yields a transfer function representation of the circuit. A circuit model is readily obtainable from these equations. As a check, the circuit model can also be derived directly by equivalent circuit manipula-tions.

The dual mode circuit, in addition to presenting a new topology, poses the additional problem of having several distinct regions of operation where different constraints are in effect. The solution is a separate analysis for each region which provides a root locus not only as a function of loop gain, but as a function of operating point as well.

4.2 Region 1: State-Space Analysis

The dual mode circuit has three states (circuit configurations), not two as in the simple buck converter. Three state variables will be used, the output voltage and the two induc-tor currents. The magnetizing current is discontinuous, which will require substituting its average value as the state variable.6

The basic equations are:

A = DAI + D2A2+ D3A3

b = Dbi + D2b2 + D3b3 (35b)

and d - D + d => Transistor ON Period

d2= D2 + d2 => Flyback conduction period d3 = D3 + d2 => Forward only period

An is the coefficient matrix for the n"' state. As indicated by the duty cycle expressions, each total variable consists of a dc component and a small signal perturbation (indicated by the carat '^').

In the steady state, x = 0, yielding:

X = -A~ 1bVs (36)

Perturbing and linearizing (34) provides:

X = Ax + biVs + d [(A

1 - A3) x + (bi - b3) vsj

+ d2 (A2 - A) x + (b2 - b3) vs (37)

as the small signal relation.

The circuit configurations for each of the three states are shown in Figure 25. The state variable matrix is

IL x -m l(37b)

Evaluating the A. and b,, and applying equations 35a and 35b:

0 -D2 D 0 0 N2LM Lm -1 DN1 A= 0 0 -- b= LS _LS D2 1 -1 ₍₃₈₎ N2C C

RC

LM

v + IM

a) STATE 1: "ON" INTERVAL

1:N₂

L

LM _C

VO RL

IT

b) STATE 2: FLYBACK CONDUCTION PERIOD

vo C RL Ls iL

c) STATE 3: FORWARD ONLY PERIOD Figure 25. Switching states: Region 1

1:N1 Ls

, , +

C vo RL

1M

There are additional constraints to consider due to the discontinuous nature of i1. In state 3, jn 0. Therefore,

- -i ( T) - im (0) 0 (39)

dt -TII

which prevents iM from being used as a state variable in the normal sense.

Although a perturbation of the instantaneous current iM(t) may exist, the discrete derivative of Equation (39) will always be zero. To remedy this situation, the iM state variable is replaced by its average, defined as

1

Mm vsdT

1_{M = -L (40)}

2 2LM

Note that this is the average over the conduction interval of iM, which is (D + D2) T, not

the switching period T. Since the state variable defined in this way depends on the value of the current at one point (IMAX), its derivative over the period T is in fact zero (the average for a given period being constant throughout that period).

If an attempt is made to evaluate the steady state condition (Equation 36), it is found that the |Al - 0, indicating no closed form solution. Solving 0 - A X + b V, explicitly, and rearranging, yields:

VO = DNI Vs (41)

SI + IL(42)

N2 _RL

D2 - -- (43)

Ni

which are the same relations found in the preceding chapter. Matrix Equation (36) could not be solved directly because IM and IL cannot be independently determined, as was found previously.

4.2.1 Perturbation

Applying Equation (37) is straightforward, yielding:

diut D2 D V s --- = - + v + d -dt N₂L L V0 L A diL dt Ls dvo D2 dt N₂C +-+ - iL ~ DN₁ V₅N₁ + _{vs +} 1 RLC C

From (39), (44) can be set to zero and solved for the perturbation in the flyback conduc-tion period (d2):

-D2 N₂D N2Vs

d2 v o+

VO V S V₀

From (40), 'M can be resolved in terms of the other small signal quantities. i= iM(v, d, T, LM): IM -

aVS

vsd

IM = VsD I Evaluating (48) with (49) provides:

(49)

(50)

MV d

I V' s v.+ D d

Now, with substitution of (47) and (50) into (45) and (46), the system can be reduced to two state variables, iL and v. After collecting terms and simplifying, the result is reason-ably tractable. V ₂₂ N2LM d A (44) (45) (46) N 2 2 N2C d

diL 0 DN1 NIs diL +L Ls L dt _ 1 S [L+ IL 2 + L d (51) dfvc 1 1 A 1 21M V 2Ijf dt C Re1 NICV N1CD

where Rei = _{RL 11 Rj and R i is the apparent load impedance as seen by the flyback}

cir-cuit:

, VO VO N2 ' 2NLM (52)

L IM D2 T

Solving (51) for IL and 0 :

S+ N1C- 21 IL_ _ ReiCJ NDVs L 2sIML (D' + Vsd) (53) s2LsC+s ₊₁₁ N1DVs V₀ io

from which the transfer functions -- , -- _{etc. are readily available. For example, with}

d vs

use of (5) to replace If:

VsN1 + S NL

1

- = ₍₅₄₎

d

This is the same result achieved for a forward converter, with two exceptions: the effective load impedance is reduced from RL to RL 11 R 1', and a zero is added by the ac-tion of the flyback connecac-tion. Note that if Lm - oo (no magnetizing current), (54) reduces to the forward only case. As flyback action increases, the zero moves nearer to the origin, and transfer function (54) is not a function of D, so the singularities do not move as VO is changed by varying the duty cycle. Figure 26 illustrates the behavior of the singularities, as the operating point is changed with a fixed circuit and as the circuit is changed for increasing flyback action.

Xl

X

C a)

X-POLE O-ZERO

a) vo SINGULARITIES FIXED FOR ANY OPERATING POINT

a

A

I

/

b) MOVEMENT OF SINGULARITIES AS CIRCUIT IS ALTERED

FOR INCREASED FLYBACK CURRENT IN REGION 1. Figure 26. Root locus: Region 1

4.2.2 Canonical Circuit Model

Middlebrook and Cnk have established a canonical circuit model for representing any switching converter input-output model. This circuit is shown in Figure 27, with the effective output filter network, H,(s), represented by an L-C section. The actual form of

H,(s) will depend on the switching circuit modeled. The elements of the canonical circuit

model for a specific converter can be derived from the transfer function representation of the switching circuit. This involves expressing the input-output properties of the circuit with an input current-output voltage two-port representation.

The canonical circuit model was derived for the dual mode converter (Region 1 opera-tion), with the result shown in Figure 28. The effective output filter of the dual mode cir-cuit has the transfer function:

TLS 2L5

l+s NM+s____

H,(s) - L L (55)

s2LsC+s -- +1 s2 LC+s - +1

Rei _Re

This function can be realized with a dependent current source as shown in Figure 28. No-tice also the added resistor at the primary of the transformer. This represents the added load that the magnetizing inductance places on the source. This does not represent a loss, because the power into that resistance equals that power provided by the current source in the secondary circuit. These two elements represent the flyback circuit as added to a for-ward converter.

The canonical circuit model can also be obtained by equivalent circuit manipulations. The multi-state switching circuit is represented by a continuous, averaged circuit model whose parameters are then perturbed and linearized. This approach was also used for the dual mode converter operating in Region 1, yielding the circuit of Figure 28 as before.

Re Le e(s)a V, + ~s)8 . L --- --++ I I I

CONTROL FUNCTION IDEAL DC-DC EFFECTIVE FILTER TRANSFORMATION NETWORK H*(s) Figure 27. Canonical circuit model

Vs

-d L

V__+Ni_ ___'__ (2va-v₀) v

R D2N1 R'

1:DN1