Fixed-Point Logical Instructions

The Logical instructions perform bit-parallel operations on 64-bit oper-ands.

The X-form Logical instructions with Rc=l, and the D-form Logical instructions andi. and andis., set the first three bits of CR Field 0 as described in Section 3.3.8, "Other Fixed-Point Instructions," on page 80.

The Logical instructions do not change the SO, OV, and CA bits in the XER.

Extended mnemonics for logical operations

An extended mnemonic is provided that generates the preferred form of

"no-op" (an instruction that does nothing). This is shown as an example with the OR Immediate instruction.

Extended mnemonics are provided that use the OR and NOR instruc-tions to copy the contents of one register to another, with and without complementing. These are shown as examples with the two instructions.

See Appendix C, "Assembler Extended Mnemonics," on page 215 for additional extended mnemonics.

AND Immediate D-form

andi. RA,RS,UI

[Power mnemonic: andil.]

28 RS

I 11 RA UI

RA~ (RS) & C⁴⁸

o

^{II UI)}

The contents of register RS are ANDed with ⁴⁸0

II

UI and the result is placed into register RA.

Special Registers Altered CRO

AND Immediate Shifted D-form

andis. RA,RS,UI

[Power mnemonic: andiu.]

29 RS RA

0 11 16

RA ~ (RS) & ( ³²⁰ II U I II ¹⁶⁰⁾

UI

31

The contents of register RS are ANDed with ³²0 II UI II ¹⁶0 and the result is placed into register RA.

Special Registers Altered CRO

OR Immediate D-form

on RA,RS,UI

[Power mnemonic: oril]

24 _I

11 RA UI

RA~ (RS)

I (

⁴⁸0 II Uil

The contents of register RS are ORed with ⁴⁸0 II UI and the result is placed into register RA.

The preferred "no-op" (an instruction that does nothing) is:

ori 0,0,0 Special Registers Altered

None

Extended Mnemonics:

Example of extended mnemonics for 0 R Immediate:

Extended: Equivalent to:

nop on 0,0,0

OR Immediate Shifted D-form

ons RA,RS,UI

[Power mnemonic: oriu]

25 RS

I 11 RA RA~ (RSl I (³²0 11 UI 11 ¹⁶0l

UI

The contents of register RS are ORed with ³²0IIUI11¹⁶0 and the result is placed into register RA.

Special Registers Altered None

XOR Immediate D-form

xon RA,RS,UI

[Power mnemonic: xoril]

26 I 11 RA UI

RA+-- (RS) \B <⁴⁸0 II UI)

The contents of register RS are XO Red with ⁴⁸0 II UI and the result is placed into register RA.

Special Registers Altered None

XOR Immediate Shifted D-form

xons RA,RS,UI

[Power mnemonic: xoriu]

I

o 27

16 RS

I

^{11 RA} 116

RA +-- (RS) \B ( ³²0 II UI II 16

o

J

UI

The contents of register RS are XORed with ³²0 II UI II ¹⁶0 and the result is placed into register RA.

Special Registers Altered None

AND X-form

and RA,RS,RB

and. RA,RS,RB

I o 31

16

^RS

111

^{RA I}

16

RB RA ~ (RS l & ( RB l

I

21

²⁸

(Rc=O) (Rc=l)

The contents of register RS are ANDed with the contents of register RB and the result is placed into register RA.

Special Registers Altered CRO

OR X-form

or RA,RS,RB

or. RA,RS,RB

lo

³¹

16

^RS I

11

RA ~ (RS l (RB)

RA

116

^RB I

21

⁴⁴⁴

(if Rc=ll

(Rc=O) (Rc=l)

The contents of register RS are ORed with the contents of register RB and the result is placed into register RA.

Special Registers Altered CRO

Extended Mnemonics:

Example of extended mnemonics for OR:

Extended: Equivalent to:

mr Rx,Ry or Rx,Ry,Ry

(if Rc=ll

XOR X-form RB and the result is placed into register RA.

Special Registers Altered RB and the complemented result is placed into register RA.

Special Registers Altered

The contents of register RS are ORed with the contents of register RB and the complemented result is placed into register RA.

Special Registers Altered

Extended Mnemonics:

Example of extended mnemonics for NOR:

Extended: Equivalent to:

not Rx,Ry nor Rx,Ry,Ry

Equivalent X-form

eqv RA,RS,RB (Rc=O)

eqv. RA,RS,RB (Rc=l)

lo

³¹

16

^RS

I ¹¹

^{RA 116 RB}

I

^{21 284}

~~I

RA f- CRS)

-

^CRB)

The contents of register RS are XORed with the contents of register RB and the complemented result is placed into register RA.

Special Registers Altered CRO

AND with Complement X-form andc

andc.

31

RA,RS,RB RA,RS,RB

111

^RA

RA f - (RS) & -.CRB)

I

^{16 RB 60}

(if Rc=l)

(Rc=O) (Rc=l)

The contents of register RS are ANDed with the complement of the contents of register RB and the result is placed into register RA.

Special Registers Altered

CRO (if Rc=l)

OR with Complement X-form

ore RA,RS,RB

Vu .... RA,RS,RB

I o

31

16

^RS

111

^RA

RA~ CRSl

I

-,(RB)

116

^RB I

21

⁴¹²

(Rc=O) (Rc=l)

The contents of register RS are ORed with the complement of the con-tents of register RB and the result is placed into register RA.

Special Registers Altered CRO

Extend :iign Byte X-form extsb

extsb.

31

s ~ CRSJ 56

RA,RS RA,RS

RAs6:63 ~ (RSls6:63 RAo:55 ~ 56s

I 11 RA I

16

Ill 954

( i f Re= 1 l

(Rc=O) (Rc=l)

(RS)56:63 are placed into RA56:63 . Bit 56 of register RS is placed into RAo:55·

Special Registers Altered

CRO (if Rc=l l

Extend Sign Halfword X-form extsh

extsh.

RA,RS RA,RS [Power mnemonics: exts, exts.]

31 RS I 11 RA

5 <c- (RS) 48

RA43.53 f - ( RS)43.53

RAo:~7 ^{f -} 485 .

116 ///

⁹²²

(Rc=O) (Rc=l)

(RS)48:63 are placed into RA48:63· Bit 48 of register RS is placed into RAo,47.

Special Registers Altered CRO

Extend Sign Word X-form extsw

extsw.

31

5 f - (RS) 32

RA,RS RA,RS

RA3z.53 f - (RS)3z.53

RAo:~l ^{f - 325 .}

I

11

RA

116 ///

⁹⁸⁶

(if Rc=l)

(Rc=O) (Rc=l)

(RSlJ2:63 are placed into RA32:63· Bit 32 of register RS is placed into RAo:31·

This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.

Special Registers Altered

CRO ^(if Rc=l)

Count Leading Zeros Doubleword X-form

A count of the number of consecutive zero bits starting at bit 0 of reg-ister RS is placed into RA. This number ranges from 0 to 64, inclusive.

If Rc=l, CR Field 0 is set to reflect the result.

This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.

Special Registers Altered CRO

Count Leading Zeros Word X-form cntlzw

cntlzw.

RA,RS RA,RS

[Power mnemonics: cntlz, cntlz.]

I o For both Count Leading

Rc=1 then LT is set to 0 in CR Field 0.

3.3.13 Fixed-Point Rotate and Shift

Dans le document BUSl, ~ESS (Page 140-150)