Supply Voltage ... , ± 20V Differential Input Current (Note 1) . . . .. ± 10mA Input Voltage ... ± 20V Output Short Circuit Duration ... Indefinite Operating Temperature Range
LT1024AM/LT1024M ... - 55°C to 125°C LT1024AC/LT1024C ... 0°Cto70°C Storage Temperature Range
All Devices ... -65°Cto 150°C Lead Temperature (Soldering, 10 sec.) ... 300°C
TOP VIEW
D PACKAGE N PACKAGE 14 PIN HERMETIC 14 PIN PLASTIC
(SIDEBRAZED)
NOTE: DEVICE MAY BE OPERATED EVEN IF INSERTION IS REVERSED; THIS IS DUE TO INHERENT SYMMETRY OF PIN LOCATIONS OF AMPLIFIERS A AND B (NOTE 2).
ORDER PART NUMBER
LT1024AMD LT1024MD LT1024ACN LT1024CN
ELECTRICAL CHARACTERISTICS
Vs= ±15V, VCM=OV, TA=25°C unless otherwise noted Individual AmplifiersL 11 024AM I L 11 024AC L 11 024M I L 11 024C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Vos Input Offset Voltage 15 50 20 100 p.V
Long Term Input Offset Voltage Stability 0.3 0.3 p.V/month
los Input Offset Current 20 100 25 180 pA
IB Input Bias Current ±25 ±120 ±30 ±200 pA
en Input Noise Voltage O.lHz to 10Hz 0.5 0.5 p.Vp-p
en Input Noise Voltage Density fo= 10Hz (Note 3) 17 33 17 33 nVNHz
fo= 1000Hz (Note 3) 14 24 14 24 nV/yfu
in Input Noise Current Density fo= 10Hz 20 20 fA/yfu
AVOL Large Signal Voltage Gain VOUT- ± 12V. RL;:; 10kO 250 2000 180 2000 V/mV
VOUT= ±10V. RL;:;2kO 150 1000 100 1000 V/mV
CMRR Common-Mode Rejection Ratio VCM=±13.5V 112 132 108 132 dB
PSRR Power Supply Rejection Ratio Vs=±2Vto ±20V 112 132 108 132 dB
Input Voltage Range ±13.5 ±14.0 ±13.5 ±14.0 V
VOUT Output Voltage Swing RL = 10k!} ±13 ±14 ±13 ±14 V
Slew Rate 0.1 0.2 0.1 0.2 VII's
Is Supply Current per Amplifier 380 600 380 700 p.A
Matching Specifications
L 11 024AM I L 11 024AC L11024M ILTlO24C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
Input Offset Voltage Match - 20 75 - 25 150 p.V
IB+ Average Non-Inverting Bias - ±30 ±150 - ±40 ±250 pA
Current
los + Non-Inverting Offset Current - 30 150 - 30 300 pA
.:lCMRR Common Mode Rejection Ratio VCM=±13.5V 110 132 - 106 132 - dB
Match
.:lPSRR Power Supply Rejection Ratio Vs=±2Vt020V 110 132 - 106 132 - dB
Match
ELECTRICAL CHARACTERISTICS
VS= ±15V, VCM=OV, O°C:::;TA:::;70°C for the LT1024AC and LT1024C;
- 55 a C :::; T A:::; 125 a C for the L T1 024AM and L T1 024M unless otherwise noted Individual Amplifiers
SYMBOL PARAMETER CONDITIONS
Vos Input Offset Voltage ocC to 70°C
- 55 cC to 125cC Average Temperature Coefficient 01
Input Offset Voltage
los Input Offset Current OCC to 70 cC
- 55'C to 125°C Average Temperature Coefficient 01
Input Offset Current
I B Input Bias Current O°C to 70 cC CMRR Common-Mode Rejection Ratio VCM=±13.5V PSRR Power Supply Rejection Ratio Vs= ± 2.5V to ± 18V
Input Voltage Range
VOUT Output Voltage Swing RL = 10kll Is Supply Current
Matching Specifications
SYMBOL PARAMETER CONDITIONS
Input 011set Voltage Match ooG to 70°C - 55°C to 125°G Input 011set Voltage Tracking
Is + Average Non-Inverting Bias Current O°C to 70°C -55°Cto125 cC los + Non-Inverting Offset Current OOG to 700G
-55°Gto125°G ,;CMRR Common-Mode Rejection Ratio Match VCM=±13.5V ,;PSRR Power Supply Rejection Ratio Match Vs= ± 2.5V to ± 18V The. denotes the specilications which apply over the lull operating temperature range.
Note 1: Differential input voltages greater than 1 V will cause excessive current to 110w through the input protection diodes unless limiting resistance is used.
Note 2: The V + supply terminals are completely independent and may be powered by separate supplies il desired (this approach, however, would sacrilice the advantages 01 the power supply rejection ratio matChing). The V ~ supply terminals are both connected to the common
L T1 024AM / LT1 024AC LT1024M/LT1024C MIN
-Optional Offset Nulling Circuit v+
TYPICAL PERFORmAnCE CHARACTERISTICS
1000
1
Offset Voltage vs Source Resistance (Balanced or Unbalanced)
SOURCE RESISTANCE (Il)
Warm-Up Orift TEMPERATURE (OC)
Offset Voltage Orift and Tracking with Temperature of Representative Units
Vs= ± 1SV
-40 CD INDIVIDUAL AMPLIFIERS
(g) TRACKING (MATCH DRIFT)
Noise Spectrum
TA 25°C Common-Mode Range
VS=±1SV
I
TA= 2SoC
I I
DEVICE WITH POSITIVE INPUT CURRENT
-
RI'NCM=~X1012h ICOMMON-MODE INPUT VOLTAGE (V)
Supply Current vs Supply Voltage per Amplifier
25°C
TYPICAL PERFORmAnCE CHARACTERISTICS
Common-Mode Rejection and CMRR Match vs Frequency
Small Signal Transient Response
SUPPLY SUPPLY
I'\.
FREQUENCY (MHz)
Small Signal Transient Response
AV= +1, CLOAO=1000pF, 5"sec/DIV 100
Channel Separation vs Frequency
Large Signal Transient Response
Av= +1, 20"sec/DIV -55'C
APPLICATions InFoRmATion
The LT1024 may be inserted directly into OP-10, OP-207 or OP227 sockets with or without removal of external null-ing components.
The L T1 024 is specified over a wide range of power supply voltages from ± 2V to ± 18V. Operation with lower sup-plies is possible down to ± 1.2V (two NiCad batteries).
Advantages of Matched Dual Op Amps
In many applications, the performance of a system de-pends on the matching between two operational amplifi-ers rather than the individual characteristics of the two op amps. Two or three op amp instrumentation amplifiers, tracking voltage references, and low drift active filters are some of the circuits requiring matching between two op amps.
The well-known triple op amp configuration illustrates these concepts. Output offset is a function of the dif-ference between the offsets of the two halves of the LT1 024. This error cancellation principle holds for a con-siderable number of input-referred parameters in addition to offset voltage and its drift with temperature. Input bias current will be the average of the two non-inverting input currents (Is +). The difference between these two
cur-rents (los + ) is the offset current of the instrumentation amplifier. Common-mode and power supply rejections will be dependent only on the match between the two amplifiers (assuming perfect resistor matching).
The concepts of common-mode and power supply rejec-tion ratio match (~CMRR and ~PSRR) are best demonstrated with a numerical example:
Assume CMRRA = + 1.0f.1,V IV or 120dB and CMRRs = +0.5f.1,V/Vor 126dB, then ~CMRR=O.5J-tV/Vor 126dB
if CMRRs = -0.5J-tV/V, which is still 126dB, then ~CMRR = 1.5J-tV/V or 116.5dB.
Typical performance of the instrumentation amplifier:
Input offset voltage = 25J-tV.
Input bias current = 30pA.
Input resistance=1012~1 Input offset current=30pA.
Input noise = 0.7 J-tVp-p.
Power bandwidth (Vo = ± 1 OV) = 80kHz.
Clearly, the LT1 024, by specifying and guaranteeing all of these matching parameters, can significantly improve the performance of matching dependent circuits.
Three Op Amp Instrumentation Amplifier
+15V INPUT
-13 R1 10k 1%
R3 2.1k 1%
R8 2001)
R4 1001)
1%
C1 100pF
r1
R5 1001)
1%
1~~~~~~~--~~~R7
INPUT +--t<:':'.,«< 9.76k
-15V TRIM R8 FOR GAIN.
TRIM R9 FOR DC COMMON-MODE REJECTION.
1%
R9 5001)
R6 10k 1%
+15V
OUTPUT
-15V GAIN = 1000
APPLICATions InFoRmATion
Achieving Picoa mpere I Microvolt Performa nce
In order to realize the picoampere/microvolt level ac-curacy of the LT1 024, proper care must be exercised. For example, leakage currents in circuitry external to the op amp can significantly degrade performance. High quality insulation should be used (e.g., Teflon, Kel-F); cleaning of all insulating surfaces to remove fluxes and other resi-dues will probably be required. Surface coating may be necessary to provide a moisture barrier in high humidity environments.
Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs: in inverting configurations, the guard ring should be tied to ground, in non-inverting connec-tions, to the inverting input. Guarding both sides of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width. Nanoampere level leak-age into the offset trim terminals can affect offset voltleak-age and drift with temperature.
Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects caused by tem-perature gradients across dissimilar metals at the con-tacts to the input terminals can exceed the inherent drift of the amplifier. Air currents over device leads should be minimized, package leads should be short, and the two input leads should be as close together as possible and maintained at the same temperature.
Test Circuit for Offset Voltage and its Drift with Temperature
R1 THERMOELECTRIC POTENTIAL
-15V ""THIS CIRCUIT IS ALSO USED AS THE BURN·IN CONFIGURATION FOR THE LT1024. WITH SUPPLY VOLTAGES INCREASED TO ±20V. R1 ~R3~20k.
R2~200n. Av~100 Va~ 1000Vas
Direct Pressure Transducer to Digital Output Signal Conditioner
330n