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F in it e S ta te M a c h in e s
Nicolas GorseF S M D e fi n it io n
•Set of states –The states imply a notion of memory •Set of transitions between states •Set of transition labels –Simple input transition –Input/Output transition •Ex. Mod-2 counter:01clk clk
C lo c k e d D F lip -f lo p
•Log2(# of states) = # of D flip-flopsM o d -2 C o u n te r
01clk clk
Qt 0 1
Qt+1 1 0
Qt+1= Qt__
•FSM, Truth table, and Sum of products Q
_
QD Clk
•Digital logic Mod-2 counter
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C la s s ic a l F S M M o d e l E x a m p le
•Design a circuit that produces a 1 at the output Z when the input X changes from 0 to 1 or from 1 to 0 and produces 0 all other times. –For the initial state, assume that 0 was the last input seen –Ex. For the input sequence 00110, the circuit will produce the output sequence 00101E x a m p le
•FSM AB1 / 1 0 / 1
0 / 01 / 0
Previous input is 0Previous input is 1 B/0A/1B
B/1A/0A
10X PS 1/00/1B:1
1/10/0A:0
10X PS •Truth table
E x a m p le
____ •Z = X St+ X St __ •St+1= X St+ XSt Q_
QD Clk
XZ
1/00/1B:1
1/10/0A:0
10X PS
3
E x a m p le – S ta b le i n s ta te 0
____ •Z = X St+ X St __ •St+1= X St+ XSt Q_
QD Clk
XZ
E x a m p le – S ig n a l C h a n g e
____ •Z = X St+ X St __ •St+1= X St+ XSt Q_
QD Clk
XZ
E x a m p le – S ig n a l C h a n g e
____ •Z = X St+ X St __ •St+1= X St+ XSt Q_
QD Clk
XZ
E x a m p le – S ig n a l C h a n g e
____ •Z = X St+ X St __ •St+1= X St+ XSt Q_
QD Clk
XZ
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E x a m p le – S ta te C h a n g e
____ •Z = X St+ X St __ •St+1= X St+ XSt Q_
QD Clk
XZ
E x a m p le – S ta te C h a n g e
____ •Z = X St+ X St __ •St+1= X St+ XSt Q_
QD Clk
XZ
E x a m p le – S ta te C h a n g e
____ •Z = X St+ X St __ •St+1= X St+ XSt Q_
QD Clk
XZ
E x a m p le – S ta b le i n s ta te B
____ •Z = X St+ X St __ •St+1= X St+ XSt Q_
QD Clk
XZ
