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Design, Fabrication, and Characterization of a Compact Magnetron Sputtering System for Micro/Nano Fabrication

by

Mitchell David Hsingz

B.S. Electrical Engineering, University of California Irvine, 2012 B.S. Physics, University of California Irvine, 2012

S.M. Electrical Engineering, Massachusetts Institute of Technology, 2014

Submitted to the Department of Electrical Engineering and Computer Science in Partial Fulfillment of the Requirements for the Degree of

DOCTOR OF PHILOSOPHY IN ELECTRICAL ENGINEERING AT THE

MASSACHUSETTS INSTITUTE OF TECHNOLOGY February 2019

Massachusetts Institute of Technology 2019. All rights reserved.

Signature of Authors...

Signature

redacted-Department of Electrical Engineering and C Science

January 15, 2019

Signature redacted

C ertified b y ... . . ...

Martin A. Schmidt Institute Provost and Professor of Electrical Engineering and Computer Science Thesis Supervisor A ccepted by...

Signature redacted

U

- U

Leslie A. Kolodziejski Professor of Electrical Engineering and Computer Science Chair, Committee for Graduate Students

MASSACHUSETTS INSTITUTE OF TECHNOLOGY

FEB

21 2019

LIBRARIES

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Design, Fabrication, and Characterization of a Compact Magnetron Sputtering System for Micro/Nano Fabrication

by

Mitchell D. Hsing

Submitted to the Department of Electrical Engineering and Computer Science on January 15, 2019, in partial fulfillment of the requirement for the degree of Doctorate of

Philosophy in Electrical Engineering and Computer Science

ABSTRACT

A general rule of thumb for new semiconductor fabrication facilities (fabs) is that revenues

from the first year of production must match the capital cost of building the fab itself. With modem fabs routinely exceeding $1 billion to build, this rule serves as a significant barrier to entry for groups seeking to commercialize new semiconductor devices aimed at smaller market segments which require a dedicated process. To address this gap in the industry, we are developing a I" Fab line of dedicated tools which processes small 1-2" wafers and feature the same functionality as large-scale commercial micro/nano fabrication tools, but with a significant reduction in cost and footprint. To enable the envisioned 1" Fab a reality, this thesis describes the design, development and testing of a sputtering physical vapor deposition tool, a critical tool in the 1" Fab line of tools. The tool is designed to be compatible with the 1" Fab's four-module, modular tool infrastructure, and also to allow for sharing of its peripheral equipment with other components of the 1" Fab. The modularity feature allows for multiple tools be created using an interchangeable

tool platform while the shared backend equipment feature allows for a sizable cost-saving benefit, as the cost of peripheral equipment for any given tool is up to 70% of the tool's total cost. Our developed sputtering tool features the successful implementation of these two design components

with a final build cost of around $25k - roughly one-seventh of the cost of a commercial tool. The sputtering tool's performance was fully characterized for both reactive and non-reactive sputtering processes. The tool's non-non-reactive metal depositions were examined in detail using a design of experiment response surface model. Deposition rates of up to 5.5 A/s were observed while maintaining a uniformity of -3% across the wafer. Utilizing a direct sputter technique, this represents a deposition rate that is 4x faster than state of the practice tools while also attaining the same level of uniformity. Alongside the development of metal depositions processes, the reactive sputtering capabilities of the tool were also demonstrated through successful process development for the deposition of Aluminum Nitride (AlN). Three unique operation regions, for AlN reactive sputtering were discovered with the highest quality AlN depositions observed in transition region. Stable and repeatable depositions were achieved via the development of two control methods - voltage control and flow control. Using this optimized process, highly c-axis aligned films with columnar growth structures were observed indicating the production of high quality AlN films. This successfully developed tool alongside its optimized processes is well suited for integration into the 1" Fab, further enabling the realization of our envisioned low-cost micro/nano fabrication platform.

Thesis Supervisor: Martin A. Schmidt

Title: Institute Provost and Professor of Electrical Engineering and Computer Science 3

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Acknowledgements

Thank you to all whom have made this work possible. The list of people and organizations that have helped me throughout my journey at MIT are well beyond what can be mentioned here. To start, I would like to thank Professor Schmidt and the institution for accepting me. As I tell most of the people who tell me that I must be smart because I go to MIT, I am really a C student who likes to make things. Thereby, I can assure you that it definitely was not my academic prowess that "got me in" but the "manus " part of "mens et. manus ". Thank you Marty for recognizing my ability and giving me the opportunity to work within one of the best institutions in the world and with some of the best minds in the world. Regarding the best minds in the world, thank you to my committee members, Tayo and Karl, for your input through this process. The project space in which professors and students work together has redefined, in my mind, what is possible.

Thank you to all the MTL staff for putting up with myself and Parker for six years. When we were tasked by Marty to make fab tools, we had no idea what we were doing, so thanks for sharing your many years of knowledge in the field with us. Since you all know the secrets of the

1" Fab tools, when MIT acquires one someday, you will all be experts on the tools.

Thank you Edgerton shop for providing the platform to which most of this work was carried out in. Due to the novelty of the work that was done, most of the parts that are mentioned in this thesis have made its way through the shop. Though just a shop, Mark Belanger, the shop manager is really the reason the shop is a special place. Thank you for sharing your knowledge in machining and fabricating. I tell many people that I've learned more in the shop than any class I've taken and that my PhD was earned in the shop.

Thank you to my lab mates Parker and Carson who have gone through the struggle to work on a hands-on project. More specifically Parker. I haven't worked with someone this closely on a project for this long. So the fact that we haven't killed each other probably means something. We definitely push each other's buttons, but I would say it's definitely for the best. Let's stick it out and make this work!

Lastly thank you to my family, the Kelley family, and my best friend Elizabeth Kelley. Thank you all for reminding me to not take things too seriously and to always keep the big picture in mind. Thank you for your support and the many other intangible things you all do.

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Table of Contents

Table of Figures ... 9

Table of Tables ... .. ... 14

List of Abbreviations ... 15

Chapter 1: Introduction to the 1" Fab... 17

1.1 T h e P ro b lem ... 18

1.2 The Proposed Solution... 20

1.3 Literature Precedence ... 22

1.4 The Vision for a 1" Fab Platform ... 24

1.5 Scope of this thesis... 26

Chapter 2: Physical Vapor Deposition and Sputtering Background... 31

2.1 Vacuum and plasma background ... 32

2.2 Film deposition background... 37

2.3 Sputtering technologies ... 42

Chapter 3: Design of the 1" Fab and 1" Fab Sputtering Tool... 49

3.1 Tool Design Overview of the 1" Fab ... 49

3.2 1" Fab Sputtering Tool Design... 58

3.3 Peripheral Component Selection... 95

Chapter 4: M etal Deposition Characterization and Optim ization ... 113

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4.2 Preliminary M etal Deposition W ork ... 124

4.3 System Recipe Optimization... 127

Chanter 5: Reactive Sputtering Optim ization and Characterization... 151

5.1 Alum inum Nitride Background... 152

5.2 Aluminum Nitride Film Properties and Characterization Methods ... 156

5.3 Alum inum Nitride Recipe Optimization and Results ... 166

5.4 Process Control M ethods ... 187

5.5 Film composition, morphology, stress, and optical properties ... 198

5.6 Discussion and Summary of Results... 201

Chapter 6: 1" Fab Sputtering Tool Sum m ary ... 209

References: ... 215

Appendix A: Bill of M aterials... 219

Appendix B: AIN Literature Review ... 220

Appendix C: M olecular Flow Equations ... 224

M olecular conductance formulas ... 225

Viscous (lam inar) conductance formulas... 227

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Table of Figures

Figure 1.1: The basic components of the 1" Fab platform, arranged on a 4 foot wide x 10 foot

lo n g tab le ... 2 5

Figure 2.1: Paschen's Law plotted for air in a DC glow discharge plasma... 36

Figure 2.2: General six-step PVD film growth process... 37

Figure 2.3: Structural Zone Model (SZM) for sputtered materials... 39

Figure 2.4: Conventional diode sputtering process and diode sputtering configurations and m agnetron sputtering configuration... 43

Figure 2.5: Effusion cell m odel of sputtering ... 45

Figure 2.6: Magnetron targets before and after use. Due to the magnetic confinement of the plasma, higher target removal rates appear in the magnetically confined region leading to the form ation of a racew ay. ... 45

Figure 2.7: Direct vs. confocal sputtering geometries ... 47

Figure 3.1: Cost per square mm of silicon for different wafer sizes ... 50

Figure 3.2: Modular tool design of the 1" Fab. The four modules (UCA, LCA, LLA, SCA) in the m odular design are highlighted in red boxes ... 52

Figure 3.3: Block diagram and actual image of the current 1" Fab platform... 54

Figure 3.4: Block diagram of the sub systems comprising the 1" Fab sputtering tool... 59

Figure 3.5: Fully adjustable mechanical design allowing for maximal design flexibility... 62

Figure 3.6: Deconstructed model of the gun and UCA interface ... 64

Figure 3.7: Detailed description of the UCA gun section... 65

Figure 3.8: LCA and support platform ... 67

Figure 3.9: Exploded model of the wafer carrier illustrating its different components... 68

Figure 3.10: Sam ple loading process... 69

Figure 3.11: Exploded model of the chuck illustrating different components of the chuck... 70

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Figure 3.13: Heated chuck simulation ... 75

Figure 3.14: Thermal images of the heated chuck... 77

Figure 3.15: QCM chuck and its components ... 79

Figure 3.16: Continuous reactive gas ring with the gas entry and exit points denoted ... 81

Figure 3.17: Lumped element model for continuous reactive gas ring as compared to the model for split ring reactive gas ring ... 82

Figure 3.18: Knudsen number vs characteristic dimension at fixed pressure and Knudsen number vs pressure at a fixed pipe diameter... 84

Figure 3.19: Mathematica GUI developed for reactive gas ring optimization. ... 87

Figure 3.20: Reactive gas ring uniformity... 88

Figure 3.21: Pumping configuration for the current iteration of 1" Fab setup with three different tools (Test System, DRIE, Sputtering) ... 90

Figure 3.22: Pum p port design plots... 92

Figure 3.23: Vacuum system testing results. ... 93

Figure 3.24: Equipment rack for 1" Fab... 99

Figure 3.25: The pump technologies considered for the 1" Fab sputtering tool... 103

Figure 3.26: Pumping speeds vs pressure for a Leybold D30A rotary vane pump and a Varian V 6 0 tu rb o p u m p ... 10 5 Figure 3.27: Comparison of throttle valves (THV) ... 109

Figure 4.1: U niform ity testing protocol... 116

Figure 4.2: Profilometer scans used for uniformity testing ... 118

Figure 4.3: Profilometer-fitting algorithms developed to determine the actual deposition height o f each p illar. ... 1 19 Figure 4.4: SEM images of sputtered Al ... 122

Figure 4.5: Sample EDS spectrum of an Al thin film sample deposited in the 1" Fab sputtering to o l . ... 1 2 3 Figure 4.6: Version 1.0 system developed to test 1" Fab sputtering tool concept... 125

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Figure 4.8: Simple block diagram of system illustrating the different setpoints that can be varied

to optim ize the deposition process... 127

Figure 4.9: Design of Exermient Central Composit Circumscribed experimental design ... 128

Figure 4.10: The output of the ccd pick function with three input factors ... 131

Figure 4.11: Limits of RSM chuck spacing parameter ... 133

Figure 4.12: Results from the RSM tests showing the generated model... 137

Figure 4.13: Theoretical effects of argon flow and pressure on deposition rate. ... 139

Figure 4.14: Deposition rate dependence on calculated residence time found from the input argon flow and m easured pressure... 140

Figure 4.15: Uniformity data taken at the three different test points listed in Table 4.4... 145

Figure 4.16: SEM images of the surface morphology of samples taken at five different power le v e ls ... 14 8 F igu re 5.1: A lN film properties ... 154

Figure 5.2: XRD spectra of sputtered ALN films sputtered at different deposition temperatures ... 1 5 8 Figure 5.3: Comparison of XRD scanning methods used for AlN film characterization... 160

Figure 5.4: Surface morphology information obtained via WYCO optical profilometry and SEM m icro g rap h s... 16 2 Figure 5.5: General Cauchy model shown with the fitted experimental data and the resulting index of reaction at each of the scanned wavelengths ... 164

Figure 5.6: Results from initial experiments perfomred to determine the optimal N2 / Ar ratio setp o in t ... 16 9 Figure 5.7: AlN material verification via the comparison of GIXD scan to 20-o coupled XRD sc a n s ... 1 7 0 Figure 5.8: Copmarison of two samples run under the same process conditions at 20% N2 se tp o in t ... 17 2 Figure 5.9: GIXD data of samples run at 150'C at increasing N2 / Ar ratio setpoints and the associated im ages of each sam ple... 174

Figure 5.10: Repeatability test as performed at 150 'C process temperature... 176

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Figure 5.12: Target current and voltage data taken at two, 3m Torr and 7.28 mTorr ... 181 Figure 5.13: Target current and voltage data taken at two reactive gas ring positions, 2.5 inches

away from the target and 0 inches away from the target ... 182

Figure 5.14: Target current and voltage data taken at three different power levels, 50W, 100W, an d 15 0 W ... 184 Figure 5.15: Target voltage and current measured by two different N2 concentration protocols to

test for h y steresis... 186

Figure 5.16: Initial voltage controlled deposition experiments. ... 189

Figure 5.17: Seven samples run under the same process conditions at 20% N2 setpoint using the voltage controlled m ethod... 19 1

Figure 5.18: Target current and voltage data taken at two different time points in the target's lifetim e ... 19 3

Figure 5.19: Flow control methodology ... 194 Figure 5.20: Samples run under the same process conditions at 20% N2 setpoint using the flow

controlled m eth od ... 19 5

Figure 5.21: Comparison between a new target and old target ... 196

Figure 5.22: Results from experiments to test the gettering effect... 204 Figure 6.1: Future design of 1" Fab sputtering tool showing a direct sputter target carousel

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Table of Tables

Table 1.1: Comparison of different projects that have been proposed to alleviate the high cost of

m icro/nano fabrication... 23

Table 2.1: Common pressure units and the associated conversion factors for vacuum ap p licatio n s ... 3 3 Table 2.2: PV D technology com parison ... 40

Table 3.1: Chuck materials and the associated properties ... 73

Table 3.2: 0-Ring materials and associated properties... 74

Table 3.3: Analogs between the gas flow and electrical regimes. ... 82

Table 3.4: Delineation of flow regimes based on the Knudsen number ... 83

Table 3.5: Conductance formulas for long tubes in each of the three flow regimes ... 85

T able 3.6: Sputter gun m anufacturers ... 96

Table 3.7: Comparison of rotary vane and turbo vacuum pumps... 101

Table 3.8: Comparison of thermal and laminar flow element (LFE) mass flow controllers... 111

Table 4.1: Effect of different process parameters on deposition rate and uniformity. ... 114

Table 4.2: Coded and actual parameters values for the selected 29 test CCC RSM sequence. 134 Table 4.3: Selection of results from the RSM sequence... 136

Table 4.4: Experimental setpoints used for the uniformity tests... 143

Table 5.1: Starting recipe shown with associated process setpoints... 168

Table 5.2: Results from EDS com position scans... 199

Table 5.3: Process conditions used to obtain the most consistent AlN depositions via our developed flow control m ethod. ... 202

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List of Abbreviations

AFM Atomic Force Microscopy

Al Aluminum

A1203 Aluminum Oxide

AlN Aluminum Nitride

APDM Average Percent Deviation From the Mean

Ar Argon

ASH Average Step Height

CCC Central Composite Circumscribed

CMOS Complementary Metal Oxide Semiconductor

Cu Copper

CVD Chemical Vapor Deposition

DOE Design of Experiment

DR Deposition Rate

DRIE Deep Reactive Ion Etching

EDS Electron Dispersive Spectroscopy

FBAR Frequency Bulk Acoustic Resonator

GIXD Grazing Incidence X-Ray Diffraction

IA Insulation Alignment Block

LCA Lower Chamber Assembly

LFE Laminar Flow Element

MEMS Micro Electro Mechanical System

PECVD Plasma Enhanced Chemical Vapor Deposition

PLD Pulsed Laser Deposition

RIE Reactive Ion Etching

RSM Response Surface Method

SAW Surface Acoustic Wave

SCA Substrate Chuck Assembly

SEM Scanning Electron Micrograph/Microscope

Si02 Silicon Dioxide

THV Throttle Valve

UCA Upper Chamber Assembly

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Chapter 1: Introduction to the 1" Fab

Yearly market growth has been the norm in the semiconductor industry for the past several decades. In recent years however, the fastest growing markets have not come from the traditional "Moore's Law"-driven complementary-metal-oxide-semiconductor (CMOS) segments. Rather they have grown out of MEMS-based sensors and optoelectronics due to the rising demand for

increasingly sensor-rich consumer and mobile electronic devices [1], [2]. Research and

development efforts in these areas are also thriving. However, the equipment used to fabricate these new classes of devices still remains largely inaccessible, both financially and technically, for many small businesses and academic institutions. To address this problem, we have proposed the development of a novel, inexpensive fabrication platform for processing these innovative new semiconductor devices, the 1" Fab. In this thesis, the feasibility of building a complete tool suite is explored with a specific focus on the development and characterization of a magnetron sputtering tool capable of successful integration with the 1" Fab platform.

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1.1 The Problem

The primary obstacle currently facing groups wishing to commercialize a new product based on the novel use of integrated circuit (IC) manufacturing methods is access to fabrication.

A general rule of thumb for a semiconductor fabrication facility (fab) is that the revenue from the

first year of production must match the capital cost of building the fab itself. With the cost of building and equipping a modern fab typically exceeding 1 billion USD [3], this rule serves as a substantial barrier to entry. This barrier is especially high for those whose devices target smaller market segments and require a unique process incompatible with the standardized CMOS flows used by large foundries.

In response to this problem, several specialty foundries have emerged, offering more flexible and low-volume processing arrangements. To maintain profitability however, these foundries can only offer a small number of standardized process flows, which places cumbersome constraints on the processes available to the customer. The nominal diversity afforded by these specialty foundries makes the production of certain devices with smaller market sizes economically viable, but many more devices (particularly in the MEMS sector) require dedicated, fully customizable process flows. Additionally, these foundries can only offer customers a few device turns per year and are usually located only in few locations around the world. This fact limits their usefulness in the prototyping phase and discourages high-risk, high-reward designs.

When production of a device is not possible using a commercial fab, only a few fabrication alternatives exist. One option is a partnership or contract with an academic institution or government laboratory. Such an agreement offers access to generally well-maintained and semi-modern tools, but the shared and non-profit nature of the facilities often presents issues in process

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scheduling and prevents the commercialization of any products. It also creates the potential for cross-contamination and process variations due to the changing loads put on the equipment by multiple, different end-users.

If neither foundries nor academic partnerships are viable options, assembling an in-house

fabrication setup with used equipment is the only remaining solution. With the vast majority of large scale fabs outfitted with semiconductor equipment for processing the latest CMOS substrate sizes of 300 mm, the used equipment market consists primarily of depreciated 100, 150, and 200 mm tools. The most modern processing capabilities are offered by the 200 mm equipment. However, these tools are also the most expensive, which makes it difficult to recoup the capital costs of using such equipment. Devices with small market sizes may only require the processing of very few 200 mm wafers in order to satisfy a year's worth of demand. This low equipment utilization results in a very high effective cost of processing, which presents a major risk for the volatile world of small and early-stage businesses. Increased affordability can be found by looking to purchase more antiquated 100 and 150 mm equipment, but this equipment of this advanced age is often no longer supported by the original equipment manufacturer. For these end-of-life tools, the sourcing of parts and routine maintenance service can become increasingly difficult and costly. Given the process limitations inherent to foundries and multi-user facilities, and the uncertainties and potentially high costs associated with the used-equipment market, there simply does not exist a reliable, cost-effective solution for the production of many novel semiconductor devices.

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1.2 The Proposed Solution

To address this gap in the semiconductor fabrication market, our proposed solution centers on a fundamental 'disruption' of the current status quo development and production of products requiring IC manufacturing. As previously mentioned, the existing infrastructure of semiconductor fabrication facilities and equipment markets succeed for certain mature market segments due to the demand for high volume production of primarily silicon CMOS devices. Diverging from this model and its reliance on standardized processes and high throughput, we are aiming to develop an equipment platform for manufacturing semiconductor products which require smaller, more specialized and rapidly modifiable prototyping. This represents a segment of the market whose manufacturing needs are currently unmet. In addition to its ability for customization, our system is also envisioned to be significantly less expensive. We are aiming to cut the capital costs from

$1 B to $1 M, meaning our system will be three orders of magnitude less expensive than a current

state-of-the-art fabrication facility. A consideration of the whole of these facts suggests that our proposed platform fits classically with the theory of disruptive innovations developed by Clayton Christensen [4].

According to Christensen, disruptive innovations take the form of new solutions (e.g. products, techniques, processes, business models) that radically alter the time, characteristics, or cost of production within a market, even if initially they result in a slightly lower performance levels. The novelty in our proposal resides in eschewing the traditional convention of processing increasingly larger wafers and instead driving the development of fabrication tools and standards on small substrates, beginning with 1" (25.4 mm) wafers. This 1" substrate platform, known

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colloquially as the 1" Fab,' bridges the gap outlined above for those looking to fabricate non-traditional semiconductor devices. The simple reduction of substrate size has a profound impact on the cost of the manufacturing tools, and enables new fabrication methods that are simply not feasible at larger scales. The 1" Fab will allow for rapid access to inexpensive fabrication equipment and infrastructure. This will help expedite the development process for new micro/nano devices by reducing or eliminating the waiting period associated with foundries, while also allowing for a higher levels of control over the processing sequence. In a production context, the availability of low-cost fabrication tools will help bridge the gap between development and full-scale production by providing a low-volume manufacturing. In addition, the increased availability of these inexpensive fabrication resources will make experimentation, prototyping, and production at the micro/nano scale possible for many more people. This increased accessibility will serve as a conduit to innovation in much the same way that breakthrough products like economical 3D printers have done for macro-scale fabrication in recent years.

An inexpensive set of tools for processing small substrates can also provide significant advantages to the non-silicon device community, where substrate sizes are inherently smaller. These non-silicon materials typically encounter many restrictions in primarily-silicon fabs due to cross-contamination and fouling concerns.

' Wafer sizes are currently colloquially referenced to using millimeters as opposed to inches. The use of 1" Fab is simply a name that refers to the approximate size of the wafer as wafers up to 2 inches (50.8mm) can be handled by the 1" Fab suite of tools.

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1.3 Literature Precedence

Several attempts have been made by various organizations to address these challenges associated with micro/nano fabrication. The projects most closely comparable to the 1" Fab initiative are the Minimal Fab [5], the Microelectronic Manufacturing Science Technology (MMST) program [6]-[8], and the recent development of 3D printable MEMS [9] (Table 1.1).

All these projects share the same goal of increasing access to micro/nano fabrication however all

of them attempt to do so in a different manner. The primary difference between these initiatives is the markets they serve, MEMS or IC/CMOS. The Minimal Fab aims to create small tools which process one-inch size wafers for processing of integrated circuit (IC) devices through the use of the standard CMOS process. Although MEMS fabrication is possible via the Minimal Fab, it is not ideal because the Fab tools are highly specialized for CMOS. In a similar vein, the MMST program also served exclusively the IC industry, and their objective was to investigate methods to decrease the time of fabrication of IC device by developing single-wafer processing tools. The MMST program terminated in the early 90's. Although this program did not radically alter the state-of-the-practice production of IC devices, it did demonstrate the feasibility of single wafer processing tools. More recently, 3D printing of MEMS has become an emerging technology used to produce MEMS-specific devices. Although this novel technology holds promise, it is still in the nascent stages of development and it is likely that significant time remains before its successful integration with a commercial process.

The 1" Fab is poised to capitalize on these previous precedents and provide a solution for current market segments that still remain unaddressed. The success of the Minimal Fab provides support for the benefits of utilizing small wafers. By applying this strategy to MEMS devices, and combining it with the approach of single-wafer processing used in the MMST program, the 1" Fab

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can uniquely address the current gap in the MEMS market. Similar to the 1"Fab, each of these predecessors attempted to alter the status quo of micro/nano fabrication, however none specifically addressed the current gap in the market we are aiming to serve. The 1 "Fab will provide a solution to those desiring to achieve highly-customizable, low-cost fabrication of specialized MEMS

devices that can be readily and easily adaptable to commercial applications.

Cost Specificity Purpose Development Stage

1" Fab $1M MEMS R&D, High-Mix, Low- Prototype Stage

Volume

Minimal Fab $5-10M CMOS High-Mix, Low-Volume Commercialized

MMST NA CMOs High speed single wafer Discontinued

production

3D Printing MEMS NA MEMS Rapid Innovation for R&D R&D

Table 1.1: Comparison of different projects that have been proposed to alleviate

the high cost of micro/nano fabrication. The 1" Fab project proposed in this thesis is the only project that is specifically targeted for the MEMS market, has the lowest cost, and is beyond proof of concept stage.

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1.4 The Vision for a 1" Fab Platform

Our envisioned 1" Fab will be a localized, stand-alone set of tools capable of producing most devices requiring micro/nano fabrication. The key components of this system are: a sputtering tool, a deep reactive ion etcher (DRIE), a plasma-enhanced chemical vapor deposition tool (PECVD), a high temperature processing tool for oxidation, annealing, and a low-pressure chemical vapor deposition tool (LPCVD) for low stress oxide depositions. Also contained within this platform will be a wet etch/wet process station, a maskless lithography system,2 3 a wafer

bonder, and a metrology station. This complete suite of tools includes nearly everything needed4 to make many common MEMS devices. The full set of tools will be contained on a single platform, with an estimated size of 40 ft2 (4 feet wide

x 10 wide). These dimensions allow for housing of

the entire system within a large laminar flow hood to provide a cleanroom-like environment for processing. This miniaturization and colocalization of tools drastically reduces the cost of maintaining a clean processing environment. Additionally, this setup allows many tools to share common peripherals, such as roughing pumps, which further reduces costs. A scaled rendering of the proposed ensemble of tools is shown in Figure 1.1. The small footprint, ease of use, low

environmental impact, and ultimately low cost are all advantages offered by the I" Fab. It is

2 The recent advent of maskless lithography systems is one of the major enabling technologies that makes the 1" Fab platform viable. Eliminating the need for photomasks greatly reduces the time between development cycles. The small area of the substrates used in a 1" Fab makes the speed of maskless systems much less significant of a factor. This is an important difference from a traditional production setting, where the decreased speed of these systems is a noteworthy limitation.

' Current maskless lithography systems perfectly suit the initial MEMS market that the 1" Fab is targeting, as the minimal feature size of these tools matches the requirements of most MEMS devices. For more advanced CMOS capabilities, newer maskless lithography systems are coming on the market which should meet the demands for smaller

CMOS devices.

' An ion implantation tool would be needed for most devices. However, for most processes (excluding large scale

production) ion implantation has become a highly efficient third-party service that would be unnecessary to replicate on a 1" Fab scale.

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precisely these advantages which lead us to believe that the 1" Fab will drastically and fundamentally impact the future of micro/nano fabrication.

M1ray

.1 ,. "le" (11 P a RIE Sputtering

'I

DRIE PEVCD --Oxidation / LPCVD N Back-End Equipment b

Figure 1.1: The basic components of the 1" Fab platform, arranged on a 4 foot wide x 10 foot long table (a) The individual tools under the laminar flow hood that

comprise the entire tool suite are shown in (b).

0-1 F0 Inn

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1.5 Scope of this thesis

The successful development of a fully-functioning miniaturized suite of fabrication tools capable of production quality comparable to industry standards, is no small challenge. The first step in accomplishing the goal of designing and manufacturing a fully operational 1" Fab is the successful development of each tool. The first tool successfully developed, was the deep reactive ion etcher (DRIE). The DRIE system was developed in collaboration with my colleague, Parker Gould, and exhibited performance that rivals current state of the art tools. Additionally, this performance was achieved with a -50x price reduction ($35k vs $1.5-2M) [10]. This is a significant achievement, as DRIE tools are arguably the most iconic tools for MEMS processing. DRIE tools use a multiplexed etch and deposition process to achieve highly anisotropic etch profile. The high anisotropy of these etches allow for 3D structures to be created allowing for many micro mechanical structures to be manufactured, which are critical to MEMS. Having built arguably the most instrumental and challenging to build tool for a fraction of the price, we were encouraged and eager to development the remainder of the tools to complete the 1" Fab platform. The focus of this thesis will be the development of a novel sputtering tool capable of integration with the 1" Fab platform. Sputtering tools are used to deposit a variety of thin film materials from metals to insulators. The process of sputtering has been well studied and has been around since the early days of semiconductor manufacturing. However, given that Moore's law is coming to an end, the internet of things (JOT) space that is driven by sensors is now becoming increasingly prominent. Within the field of MEMS manufacturing, the ability to enable IOT sensor manufacturing is becoming vitally important. To expand the sensor space, new materials are needed and these materials are accessible via sputtering techniques/technology. For example, new materials, like piezoelectric materials, which produce a charge when the materials shape is

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deformed, are commonly being used in sensing applications. And in optical communication fields, materials like Aluminum Oxide (A1203) are also being deposited for on-chip optical wave guides. Sputtering technologies not only enable the deposition of these new materials, but do so extremely efficiently, as new processes often have low thermal budget manufacturing requirements. For example, many new MEMS devices are being produced on polymer substrates that require temperatures no greater than 150 C.5 Sputtering on the other hand can deposit the same materials at room temperature, offering a much more efficient alternative. Due the emerging nature of the micro/nano fabrication field and new micro/nano fabrication limitations which sputtering can overcome, sputtering has become an essential tool in every micro/nano tool suite.

Although the scientific principles behind sputtering are well documented, there is limited literature precedents detailing the development of a sputtering tool beginning from raw materials and ending with a fully-functioning sputtering machine. The primary focus of this work is the development of a dedicated 1" Fab sputtering tool. Alongside the documentation regarding the development of the tool, the unique scaling advantage afforded by moving to a smaller substrate size will be discussed and analyzed. Additionally, new deposition techniques using the novel and enabling materials previously mentioned, such as Aluminum Nitride (AlN) will be discussed.

The underlying mechanics of sputtering and the different methodologies which rely on sputtering technology will be presented in Chapter 2. The development of the sputtering tool will be detailed in Chapter 3. Chapter 4 will present an analysis of the initial characterization tests of the system's deposition performance through simple metal etching processes. Chapter 5 will present process development for reactive sputtering process for aluminum nitride depositions.

5 Using old conventional methods such as growing thermal oxides would not be feasible in this case as process

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Chapter 6 summarizes the work and outlines areas for future testing, and proposes several design revisions to increase the performance and reliability of the system. Although the central focus of this thesis is to develop a sputtering tool capable of successful integration with the 1" Fab, it is worth noting that this research could be extended towards the development of a larger scale sputtering tool. The underlying scientific principles examined and methodologies developed hold promise towards the enablement of novel technologies in the field of micro/nano fabrication.

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Chapter 2: Physical Vapor Deposition and

Sputtering Background

A crucial process in all micro/nano fabrication is the ability to uniformly coat substrates

with different types of thin films [11]. These surface-engineered thin films, typically composed of metals and insulators, are commonly deposited by either chemical vapor deposition (CVD) or physical vapor deposition (PVD). In CVD the films are deposited via chemical reactions that occur on the surface of the substrate. In PVD, films are formed when atoms from a source (target) are transported and subsequently deposited onto the substrate. Although both these technologies are used to deposit thin films, the films produced in each case differ. CVD is traditionally used to deposit insulators where PVD is typically used to deposit metals [11]. Sputtering is a type of PVD which uses ions of inert gasses to ablate a target material to then coat a substrate. Reactive sputtering is a more recent advance in the sputtering field that enables the depositions of insulators in addition to more technically advanced films6. Reactive sputtering uses a gas which undergoes a chemical reaction prior to deposition, differentiating it from conventional sputtering. The use of this reactive gas in the plasma allows for the production of films with unique properties.

6 The term reactive sputtering was first coined in the mid-20th century by Gabor Veszi from Magatron Ltd for the

deposition of cadmium oxide [74]. Although developed in the mid-20 century, reactive sputtering processes used in

commercial processes did not take rise until the late 2 0" century for the use of wear resistance coatings (titanium

oxide). Furthermore for the use in microelectronic devices, the use of reactive sputtering in commercial processes did not take off until the late 80's / early 90's for the use of low temperature oxide and nitride depositions. Lastly, for the specific reactive sputter material discussed in this thesis, AIN, MEMS specific processes are just becoming standardized in industry [74].

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2.1 Vacuum and plasma background

A common requirement of many of the PVD processes, including sputtering, is that they

must occur under vacuum. In vacuum environments, the low pressure results in an increased spacing between the gas molecules within the chamber, which subsequently affects the characteristics of the deposited films. In addition to vacuum, most sputtering tools require a plasma to generate the ions necessary for the sputtering process. The characteristics inherent to the generated plasma can play an important role in sputtered films. For example, a plasma generated using reactive versus non-reactive gas can result in films with very different physiochemical and therefore electrical properties. An understanding of the vacuum and plasma in the system is thereby essential to the success and customization of the desired deposition process.

2.1.1 Vacuum background

A process that is said to occur under vacuum requires the pressure within the process

chamber to be less than one atmosphere. In other words, the number of air molecules within the chamber is less than if the chamber were at atmospheric pressure. Vacuum is simply a descriptor of pressure, and thus both are quantified using units of pressure. For vacuum-specific applications, several units are commonly used in industry. In most European countries, pressure is measured by the SI unit of Pascal (iN/m2) whereas in England and the US, the units of Bar and Torr are used, respectively. These units can be easily interconverted (Table 2.1). For our l'" Fab sputtering system, all the pressure gauges and vacuum pumps are rated in units of Torr, and thus Torr is the pressure unit used for all the development work currently presented.

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I Torr 1 133.322 0.0013

1 Pa 0.0075 1 1E-5

1 Bar 750.062 100,000 1

Table 2.1: Common pressure units and the associated conversion factors for

vacuum applications

Under vacuum conditions, there are less gas atoms for the same unit volume, and thus the spacing between the atoms increases. The metric used to define this spacing is the mean free path (MFP), which is represented mathematically by lambda (k). To quantify MFP, statistical mechanics can be used (eq. 2.1-2.3). If a Maxwellian distribution of velocities of the gas molecules is assumed (eq. 2.1), the average velocity of a particle within the vacuum chamber can be determined (eq. 2.2). Using this average velocity, the MFP can be subsequently determined (eq.

2.3). Analysis of the equations below reveals the direct relationship of MFP to temperature and its

inverse relationship to the pressure and molecular diameter. For our purposes, it is important to note that MFP is dependent on the gas type, through its Molecular Diameter, and that MFP it increases with decreasing pressure.

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/m 3 m~vI2 f(v) d'v = 2mkbT e 2k d Tv <V > = ov f (v) dv < V > t 7r d 2 < v > t nv - kb * T S= * p* 1[2 * 7- * p * dm

f(v): Maxewl velocity dist.

m: mass kb: Boltzmann Constant T: Temperature d3v: 3D Velocity Space (dv = dvxdvydv-z) < v > : Avg. Velocity v: Velocity f(v): eq. 4.1

A: Mean Free Path

< v >: Average Velocity (eq. 2.2) t: Time

nv: Number of molecules/ unit vol.

d,,: Molecular Diameter

1: Mean Free Path

kb: Boltzmann Constant T: Temperature

p: Pressure dn: Molecular Diameter

2.1.2 Plasma background

Most deposition processes that require a plasma use a combination of chemical reactions and physical sputtering to remove material from a target and deposit it on a substrate. To create the conditions necessary for these processes, high-density plasma discharges and low pressures are required. High-density plasmas create ions and radicals by ionizing the process gas species that is injected into the chamber. Vacuum conditions increase the MFP of the process molecules, thereby transporting the ions and radicals to the substrate more efficiently. The simplest plasmas are formed by applying a large DC voltage across two electrodes. To ignite the plasma, the bias must provide the electrons with an energy that exceeds the ionization energy of the process gas molecules. At this point, the electrons gain sufficient energy to ionize the process gas molecules

(eq. 2.1)

(eq. 2.2)

(eq. 2.3)

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and ignite the plasma. Depending on the gas used to generate the plasma, an optimal pressure for ignition exists, which can be determined using Paschen's Law (eq. 2.4) [12]. Paschen's Law indicates that the voltage required to ignite a plasma (breakdown voltage) is proportional to the pressure times the distance (p xd) and properties intrinsic to the process gas used (constants a and

b) [13]. As the (pxd) value decreases below a certain value, represented by the minimum of the

curve, the magnitude of the voltage needed to ionize the molecules increases substantially (Figure

2.1). This is because of the lower pressures in this environment, causing the MFP to increase to a point where collisions between electrons and molecules become rare. Points above this curve minimum also require higher voltages. In this area of the graph, the pressures are higher, and the resulting reduction in MFP increases the collision frequency for electrons. As the electrons collide with one another, they lose energy, thus making it difficult for them to accumulate enough energy to ionize a process gas molecule. For most plasma-based deposition systems, the pressure range of 10-100 mTorr is ideal for striking and sustaining a plasma discharge. Although Paschen's Law was formulated during the study of glow discharge and parallel plate plasma systems, the underlying fundamentals apply to magnetically confined plasmas as are used in magnetron sputtering tools.

V: dissociation voltage

apd a & b: gas specific (2.4)

sn(pd) + b constants

p: pressure

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Low pressure, high MFP

High pressure, low MFP

C 0 Vu0 0 1200 1000 800 600 400 200 1 0 2 4 6 8 10

Pressure-Distance Product [Pa.m]

Figure 2.1: Paschen's Law plotted for air in a DC glow discharge plasma. The minimum voltage required to strike the plasma is -325V at a pd product of 0.75 Pa-m.

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2.2 Film deposition back2round

The production of thin films using PVD technologies primarily occurs in six steps (Figure 2.2) [14]. Firstly, the material of which the film will be composed, is removed from a source and transported to the substrate. Secondly, the transported material is adsorbed to the surface and begins to diffuse across it. Thirdly, the diffused atoms begin to coalesce and form chemical bonds, which is followed by the nucleation of bonded material. The nucleated atoms then begin to form seed crystals. At this point, defects are possible if impurities are present or if the substrate temperature is not optimal. The sixth and final step involves the growth of individual grains once the film is thick enough. As the individual grains diffuse into the substrate, the film begins to exhibit bulk effects. These growth steps are common to all thin films grown via PVD processes. Specific conditions used to grow sputtered films with predefined characters have been developed and are known as film-growth zones.

Microstructure formation

Adsorption (Crystal structure &

on surface Defects) Bulk Changes

(Diffusion & Grain

( ) Chemical Nucleation Growth)

Surface bond Diffusion formation

Figure 2.2: General six-step PVD film growth process. The red colored dots

represent the deposition atoms and the gray colored dots represent the substrate material.

2.2.1 Thin film growth kinetics

The growth kinetics of sputtered thin films can be described by a structural zone model (SZM) [15]. Several SZM models have been proposed with the earliest of these models advanced

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Zone 1, Zone 2, and Zone 3. These zones are classified based on pressure in addition to the ratio of substrate temperature to melting temperature of the sputtered material. In zone 1, the ratio of substrate temperature to melting temperature of the sputtered material is <0.3 and the structures associated with this zone are tapered columns. In zone 2, the ratio of temperatures is between 0.3 and 0.5 (0.3<T/Tm<0.5) and the resulting film structure are columns without tapered ends. It is hypothesized that in this zone, the higher temperatures cause the grain migration to close up the pockets resulting from the tapered structures in zone 1. In zone 3, the ratio of the two temperatures is > 0.5 and the resulting films show equiaxed grains.7 A fourth zone was later added by Thornton

in 1972 for sputtering-specific applications [15]. This Zone T, is named such because it is a transition zone between zone 1 and zone 2. The delineation of this zone was important as Thornton recognized that not only temperature, but pressure, had a significant influence on the resulting depositions. The films produced in Zone T are defined by a dense array of columnar structures. The currently-accepted model for sputtering applications includes all four of the previously mentioned zones (Figure 2.3).

7 Equitaxed grains are grains/crystals that have axes of approximately the same length. Equitaxed grains are usually

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rRANSITIOQ M s CT1 COLUMN1ARGRAINS

CONSISTING OF DENSFUX PA CKED FIBROUS GRAINS

POROUS STRICTURE KREUMI1ALILED ('ONSISIMI% OF 1APERED CRAIN SF'R11I' RE

CRV1ALITMS SEPERATED

BY~ VOIDS avvo W, .. Vs

(se TORI) 10 0.2 1F tPI RAI RI 1Isu)

log

Figure 2.3: Structural Zone Model (SZM) for sputtered materials *See Ref[15]

2.2.2 Thin film PVD technologies

Sputtering is only one of the many PVD technologies used in MEMS fabrication. Two additional, commonly-encountered PVD techniques include resistive (or thermal) evaporation and e-beam evaporation. All of these technologies employ a physical process, usually in the form of heat or accelerated elections, to produce a condensable vapor of material that can be deposited onto a surface. All of these technologies can be used to deposit similar materials, however each has its own set of advantages and disadvantages (Table 2.2).

Technology Advantages Disadvantages

Resistive * High vacuum required

Evaporation * Simple system design * High temperature

* Low cost targets

B-Beam * Wide material capability * Expensive

Evaporation * Reasonable Uniformity * Poor step coverage (without

planetary stage motion)

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* Cheap * Plasma damage to substrate

* Uniformity

* Better step coverage

Table 2.2: PVD technology comparison

In both resistive and e-beam evaporation, the material to be deposited is heated to its vapor temperature, at which point it transitions into the gas phase. Each of these evaporative techniques uses a different method to heat the material to its vaporization temperature. In most resistive evaporation systems, electrical current is passed through a thin filament of the deposition material, while in e-beam evaporation, material is heated using electron beams that are focused onto a crucible containing the material. In both cases, following vaporization, the material then condenses onto the wafer. High vacuum conditions are required in both cases; as more facile vaporization is achieved under vacuum conditions. For example, Al is a common metal contact material used in MEMS devices which has a vaporization temperature of 1375'C at 1 mTorr as compared to 2750'C at atmospheric pressure. In addition to lowering the required vaporization temperature, low pressure also significantly increases the MFP of the created vapor. This allows the vapor to travel further and coat a larger substrate area.

Sputtering differs from resistive and e-beam evaporation in a few key areas. Although also performed in vacuum, sputtering uses physical bombardment with energetic particles, typically Argon (Ar) ions, to remove atoms from a "target" material instead of heat or an electron beam. The sputtered particles then travel to and are deposited on to the substrate. To generate these energetic particles, sputtering systems ignite a plasma near the target material via an applied DC or RF voltage. Molecular collisions within the plasma generate gas ions, which are then accelerated towards a negatively-charged target. The process of using ions formed within the plasma to sputter away atoms from the target material allows for more directional control of the

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sputtered particles and therefore is much more efficient than using heat, which is used in evaporative techniques. This higher efficiency subsequently enables sputtering to be performed at higher pressures than evaporative techniques. For comparison, sputtering typically occurs at pressures around 1 E-3 Torr, whereas evaporative methodologies require pressures as low as 1 E-6 Torr range8. Because sputtering can proceed at higher pressures, the gas molecules in the system have lower MFPs, which is known to result in improved step coverage of three-dimensional features [17]. These features of sputtering provide greater process flexibility for devices with low thermal budgets, which is crucial in the MEMS space where high temperature processes are often not tolerated [11].

8 IE-3 Torr is necessary for plasma to be generated.

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2.3 Sputtering technologies

There are a multitude of sputtering technologies. These range from applications which require sputter coating of large scale glass panels to the coating a silicon wafers for use in micro/nano fabrication. For the application pertaining to this work, micro/nano fabrication sputtering technologies will be discussed. This section serves to provide an overview of these different technologies.

2.3.1 Types of sputtering

There are two primary sputtering technologies used by many sputtering tools, diode sputtering and magnetron sputtering. In diode sputtering, a powered electrode is connected to the target and a grounded cathode is connected to the chamber wall and substrate (Figure 2.4a). When the electrode is powered, the target becomes negatively charged and electrons are repelled away from the target (step 1). Some of the repelled electrons will collide with the neutral gas injected into the chamber. This displaces a valence shell electron of the gas molecule and creates a positively charged gas ion (steps 2 and 3). These newly-generated cations will then accelerate towards the negatively-charged target. Upon collision with the target, the gas ions sputter away material which will then travel line-of-sight to the substrate (step 4). Magnetron sputtering is based on similar principles to diode sputtering, but adds specifically placed magnets to help confine the plasma discharge to a region just above the target (Figure 2.4b). By confining the path of the free electrons with an electro-magnetic field, the probability of a collision between an electron and a neutral gas molecule greatly increases. This results in a concomitant increase in ion density and ultimately in deposition rates. In both diode and magnetron sputtering, despite the stochastic nature of these ion/target collisions, the sputtered atoms are emitted in an approximate cosine distribution profile which affects the surface uniformity of the deposited films (Figure 2.5) [18], [19].

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2 3

-

0

b

Figure 2.4: Conventional diode sputtering process and diode sputtering configuration (a) and magnetron sputtering configuration (b)

2.3.2 Sputtering power sources (DC vs RF) and processes

In traditional sputtering processes, the target material is the same as the material sputtered onto the thin film. In the case of metallic thin-film depositions, metal targets are used to produce metal thin films. To generate adequate bias to light the plasma which is necessary to sputter atoms from the target, either DC or RF power can be used. In the case of pure metal sputtering, the use of RF is not as efficient as DC. This is because in the case of a RF power source, the electric field at the target is generated in a more indirect fashion. However, the use of RF power is critical for the deposition of insulators. If a DC bias is applied to an insulating target, a plasma cannot be generated as an open circuit is effectively generated by the presence of the insulating material on the target. If RF power is applied, however, the oscillating electric field within the chamber creates enough charge to ionize the gas surrounding the target. The RF-powered sputtering of insulating targets is immensely enabling as it allows for the deposition of materials not accessible using DC-powered sputtering. However, the use of RF power is somewhat limiting, as the deposition rate of sputtering in these cases a can be very low. Alternative techniques such as reactive sputtering can be used to alleviate this problem.

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In reactive sputtering, a metallic target is sputtered via the same process as previously outlined for traditional sputtering. However, in addition to the Ar gas used in standard sputtering gas, reactive sputtering also uses a reactive gas, typically nitrogen or oxygen. In this setup, the sputtered particle as well as the target itself can react chemically with the reactive gas to form an oxide or nitride of the target material. This newly generated material is then deposited on the substrate. In the case of silicon dioxide (SiO2) depositions for example, sputtered silicon particles

react with oxygen, creating SiO2 which is then deposited onto the substrate. Films of differing

properties can also be produced by controlling the flow of gas. In the SiO2 example, increasing the

flow of oxygen will yield more oxygen-rich SiO2 films, which can change the dielectric properties of the film [20]. Similar processes can be used for sputter deposition of other oxides and nitrides

[21]. This process, can be run under either DC or RF power. In most cases however, for the same

input power, higher deposition rates can be achieved with DC power.

2.3.3 Sputtering uniformity and sputtering geometries (Confocal vs Direct)

The emission profile of the particles sputtered from the target greatly affects the overall deposition profile (Figure 2.5c). The distribution of these emitted particles can be modeled as an effusion cell with the target acting as the source (Figure 2.5a). When integrating over the surface of the target, a cosine distribution of particles results (Figure 2.5b) [19]. Using this model, four different profiles were calculated based on four hypothetical target-to-substrate spacings. The results indicate that as the spacing between the target and substrate increases, the thickness uniformity of the deposition across the substrate also increases (Figure 2.5b). This effusion model is adequate for a sputter profile whose target is uniformly eroding. In reality, however, because of the increased plasma density near the magnets in a magnetron gun, a raceway erosion profile forms on the target (Figure 2.6). Depending on the spacing between the target and substrate, this raceway

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__j

profile can replicate itself on the substrate. At small spacings this effect is particularly magnified, however, at larger spacings, the raceway profile can in fact help increase the uniformity of the sputtered atoms across the film (see section 3.2.1 for further analysis).

Uniformity Plot 1.0 C 0.8 0 F 0.6 0.4 9 0.2' 0.0 -2 -1 0 1 2 Distance - Target-Sample Spacing 1 - Target-Sample Spacing 3 across sample - Target-Sample Spacing 2

b

$

Thickness U

E- Distance across sample

-C

Figure 2.5: Effusion cell model of sputtering is shown in (a) with the resulting

profile (b). Physical representation of how the deposition profile presents itself on a substrate (c)

Raceway

New Used

Figure 2.6: Magnetron targets before and after use. Due to the magnetic

confinement of the plasma, higher target removal rates appear in the magnetically confined region leading to the formation of a raceway.

Effusion Cell

Substrate

I 4Pump

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