Open Archive Toulouse Archive Ouverte (OATAO)

To cite this version: Goiffon, Vincent and Magnan, Pierre and Saint-Pé, Olivier and Bernard, Frédéric and Rolland, Guy Total Dose Evaluation of Deep Submicron

CMOS Imaging Technology Through Elementary Device and Pixel Array Behavior Analysis. (2008) In: Nuclear and Space Radiation Effects Conference (NSREC), 14

July 2008 - 18 July 2008 (Tucson, United States). (Unpublished)

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Open Archive Toulouse Archive Ouverte (OATAO)

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This is an author-deposited version published in: http://oatao.univ-toulouse.fr/

Total Dose Evaluation of Deep Submicron CMOS

Imaging Technology Through Elementary Device

and Pixel Array Behavior Analysis*

V. Goiffon

_{, P. Magnan}

_{, O. Saint-Pé}

_{, F. Bernard}

_{, G. Rolland}

1

_{Toulouse Univ. , ISAE, Toulouse, France}

2

_{CNES, Toulouse, France}

3

_{EADS Astrium, Toulouse, France}

Nuclear and Space and Radiation Effects Conference

Tucson, Arizona

Motivations

Why studying TID effects on CMOS image sensor again?

Technologies have changed much since last CMOS image sensor

ionizing dose effect studies

D

eep

S

ubmicron

T

echnologies (

DSM

) (below 0.25 µm)

Use of

S

hallow

T

rench

I

solation (

STI

) instead of LOCOS

Thinner gate oxides…

Previous work conclusions can not be applied directly to CMOS

image sensor manufactured using DSM CIS technology

Process dedicated to

C

MOS

I

mage

S

ensors (

CIS

)

New dedicated

“in-pixel” Pwell

New optimized

photodiode N implant

…

Talk outline

Experimental details

Technology characterization

Oxide characterizations

Device characterizations

Effects on Image Sensor

Experimental details

CMOS technology used

UMC CIS 0.18 µm

Dedicated to imaging (CIS)

3.3 V devices

(instead of 1.8 V)

Measurements

Low current (<10 fA) I-V test bench

Controlled temperature :

23 C

γ

γ

γ

γ-ray irradiations

ONERA

DESP

60

_Co

_facility

Up to

1 kGy(Si) / 100 krad(Si)

Dose rate :

3 Gy/h

Several bias

configurations

Accelerated annealing

Talk outline

Experimental details

Technology characterization

Oxide characterizations

Device characterizations

Effects on Image Sensor

Oxide characterizations

ILD-FET

FOX-FET

-20

0

20

40

60

10

-14

10

-12

10

-10

10

-8

10

-6

10

-4

10

-2

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irrad.

Shallow trench isolation (

STI

) : Field Oxide FET

-20

0

20

40

60

10

-14

10

-12

10

-10

10

-8

10

-6

10

-4

10

-2

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irrad.

1kGy grounded

-20

0

20

40

60

10

-14

10

-12

10

-10

10

-8

10

-6

10

-4

10

-2

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irrad.

1kGy grounded

Ground. anneal.

-20

0

20

40

60

10

-14

10

-12

10

-10

10

-8

10

-6

10

-4

10

-2

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irrad.

1kGy grounded

Ground. anneal.

Shallow trench isolation (

STI

) : Field Oxide FET

Trapped charge and interface states generation

Limited

trapped charge annealing

Interface state annealing

(as observed by Faccio et al. 2008)

Trapped

Charge

Interface state

buildup

and

annealing

-20

0

20

40

60

10

-14

10

-12

10

-10

10

-8

10

-6

10

-4

10

-2

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irrad.

1kGy grounded

Ground. anneal.

1kGy biased

Bias. anneal.

Shallow trench isolation (

STI

) : Field Oxide FET

Trapped charge and interface states generation

Limited

trapped charge annealing

Interface state annealing

(as observed by Faccio et al. 2008)

Enhanced

degradation under

Inter layer dielectric (

ILD

) : ILDFET

0

10

20

30

40

50

60

10

-16

10

-14

10

-12

10

-10

10

-8

10

-6

10

-4

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irrad.

0

10

20

30

40

50

60

10

-16

10

-14

10

-12

10

-10

10

-8

10

-6

10

-4

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irrad.

1 kGy unbiased

0

10

20

30

40

50

60

10

-16

10

-14

10

-12

10

-10

10

-8

10

-6

10

-4

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irrad.

1 kGy unbiased

Grounded anneal.

0

10

20

30

40

50

60

10

-16

10

-14

10

-12

10

-10

10

-8

10

-6

10

-4

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

B before irrad.

B 1kGy unbiased

B 1kGy biased

B grounded anneal.

B biased anneal.

Inter layer dielectric (

ILD

) : ILDFET

ILD

less sensitive

than STI

No

trapped charge

annealing

Significant

interface state annealing

Enhanced

degradation under

VGS = 3.3 V

Photodiode

dark current increase

(1)

CIS standard

photodiode

0

0.2

0.4

0.6

0.8

1

10

-14

10

-13

10

-12

10

-11

Total ionizing dose (kGy)

D

a

rk

c

u

rr

e

n

t

a

t

2

.4

V

(

A

)

Post anneal.

0

0.2

0.4

0.6

0.8

1

10

-14

10

-13

10

-12

10

-11

Total ionizing dose (kGy)

D

a

rk

c

u

rr

e

n

t

a

t

2

.4

V

(

A

)

Post anneal.

Photodiode

dark current increase

(1)

CIS standard

photodiode

Photodiode

dark current increase

(2)

This radiation induced dark current

Is a

generation current

(Eact ~ 0.63 eV)

Is

proportional

to the diode

perimeter

Increases when P doping decreases

Anneals partially

after one week at 100 C

Interface states

This dark current increase is mainly due

to a radiation induced

interface state

number increase

in the depleted region

extension in the P doped region.

-2

-1

0

1

2

3

10

10

10

10

10

10

10

Gate to source voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irradiation

After 140 Gy

After 290 Gy

After 500 Gy

After 720 Gy

After 1000 Gy

After 168h at 100°C

N-MOSFET

leakage current

Parasitic

leakage paths

No threshold voltage shift

Off-state

leakage current

increase only

1

1.5

2

2.5

3

0

0.5

1

1.5

2

2.5

x 10

Source to gate voltage (V)

D

ra

in

c

u

rr

e

n

t

(A

)

Before irradiation

After 1 kGy

After 168h at 100°C

P-MOSFET

RINCE

Large Vt shift on

minimum size PMOST

0

0.2

0.4

0.6

0.8

1

-1

-0.5

0

Ionizing dose (kGy)

∆

V

(

V

)

Expected

effects on image sensors

No minimum size

PMOST => No RINCE

NMOST leakage current negligible

in voltage signal path

Sensitive

part

Expected

effects on pixel

Junction reverse generation

current should dominate

Estimation

vs

measurement

Image sensors dark current increase is only due to the

photodiode generation current increase

0

0.2

0.4

0.6

0.8

1

0

10

20

30

40

50

Total ionizing dose (kGy)

D

a

rk

c

u

rr

e

n

t

in

c

re

a

s

e

(

fA

)

Post anneal.

Image sensor dark current

Diode generation current

Image sensor

features

3T pixel

128 x 128 pixels

10 µm pitch

UMC CIS 0.18 µm

0

200

400

600

800

1000

10

-3

10

-2

10

-1

10

0

Total ionizing dose (Gy)

D

a

rk

c

u

rr

e

n

t

(f

A

/

µ

m

)

This study 0.18

_µ

m CIS 3T

Measured effects

on image sensors

0

200

400

600

800

1000

10

-3

10

-2

10

-1

10

0

Total ionizing dose (Gy)

D

a

rk

c

u

rr

e

n

t

(f

A

/

µ

m

)

This study 0.18

_µ

m CIS 3T

Rao et al. 0.18

_µ

m CIS 4T

Pain et al. 0.25

µ

m 3T

Pain et al. 0.25

_µ

m 3T hardened

Eid et al. 0.35

_µ

m 3T hardened

Bogaerts et al. 0.50

_µ

m 3T hardened

Talk outline

Experimental details

Technology characterization

Oxide characterizations

Device characterizations

Effects on Image Sensor

Conclusion and perspectives

Conclusion

Ionizing radiation induced

large dark current increases

due to

STI interface states

located on the

photodiode perimeter

enhances by

STI ∆

∆

∆

∆N

_ot

& ∆

∆

∆

∆N

_it

DSM CIS

technology are

more sensitive

than older ones

Thick oxides

(STI and ILD) exhibited

unusual annealing

behaviors

Future work and Perspectives

Further study

of irradiated

thick oxides

Photodiode

dark current modeling

from thick oxide ∆N

_ot

& ∆N

_it

Photodiode

total dose

hardening-by-design