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HAL Id: jpa-00227991

https://hal.archives-ouvertes.fr/jpa-00227991

Submitted on 1 Jan 1988

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NON-ALLOYED Ge/Pd OHMIC CONTACT FOR GaAs MESFET’S

A. Paccagnella, C. Canali, G. Donzelli, E. Zanoni, R. Zanetti, S. Lau

To cite this version:

A. Paccagnella, C. Canali, G. Donzelli, E. Zanoni, R. Zanetti, et al.. NON-ALLOYED Ge/Pd OHMIC CONTACT FOR GaAs MESFET’S. Journal de Physique Colloques, 1988, 49 (C4), pp.C4-441-C4-444.

�10.1051/jphyscol:1988493�. �jpa-00227991�

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NON-ALLOYED Ge/Pd OHMIC CONTACT FOR GaAs MESFET'S

A. PACCAGNELLA, C. C A N A L I * , G. D O N Z E L L I * " , E. Z A N O N I * * * , R. ZANETTI*

and S.S. LAU*

Dipartimento d i Ingegneria, Universitd d i Trento, I-38050 Mesiano d i Povo (TN), Italy

'Dipartimento d i Elettronica e Inforrnatica delllUniversitd, I-35131 Padova, Italy

" ~ e l e t t r a SPA, Via Trento 30, I-20059 Vimercate (MI), Italy

""'Departimento d i Elettronica ed Elettrotecnica dell'Universitd.

I-70125 Bari, Italy

'Dept. EECS, University of California at San Diego, La Jolla, CA 92093, U . S . A .

Abstract - GaAs MESFET's with non-alloyed ohmic contacts have been achieved through a solid phase reaction of the Ge/Pd/GaAs(xtl) structure upon annealing at 325'C for 30 min. Different Au-based overlayers over Ge/Pd have been tested for device applications and compared with a conventional AuGeNi contact. The thermal stability of the contact resistivity has been evaluated through long-term storages at 300'C.

1

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INTRODUCTION

New ohmic contacts to n-GaAs have been developed with the aim of improving the contact proper- ties as well as the technological features in comparison with the usual AuGeWi metallization.

The fabrication process of AuGeNi, based on the formation of a liquid phase during a short time annealing, can still give repeatibility problems among successive runs and poor uniformi- ty through the single wafer, in absence of an accurate Gats surface preparation / I / . The search for a more controllable realization process pushed toward investigation of ohmic con- tacts achieved through solid state interactions, such as Ge epitaxy on GaAs /2/ or solid phase reactions between GaAs and metal overlayers /3/, which showed both excellent electrical and morphological properties.

Application of ohmic contacts based on the solid state reaction of the Ge/Pd/GaAs structure to GaAs MESFET's has been investigated in this work, with a particular attention to the techno- logical realization process. The Ge/Pd ohmic contact resistivity and thermal stability, and the dc and rf MESFET performances have been compared with the results obtained in the case of conventional AuGeNi contacts, for 0.25 W devices.

2

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PdGe CONTACT REALIZATION

Ge(113 nm)/Pd(44 nm) bilayers have been e-beam deposited on conventionally chemically cleaned

<100>n-GaAs substrates 1.5x1017 ~ m S doped, patterned for measurements conform to the Trans- - ~ mission Line Method (TIM) /4/. After the contact definition by lift-off, ohmic contacts have been achieved through annealing at 325'C for 30 min in a forming gas flux. Such a treatment gives the lowest contact resistivity as shown in /5/.

The reaction kinetics has been monitored at different times during the annealing by AES, and results are schematically summarized in Fig. 1. After the shortest annealing period (5 min) the whole Pd is involved in the polycrystalline PdGe phase, through a solid state reaction with Ge. PQGe, which appears before PdGe in the "ideal" phase formation sequence, is already no more detectable. An inhomogeneous unreacted Ge layer is left at the surface, and a small Ge accumulation is detected at the PdGe/GaAs interface, attributed to the epitaxial growth of Ge over GaAs as shown in /6/. The thickness of the Ge epilayer increases with the annealing time, until all the excess surface Ge has been consumed, i.e. after 30 min. A non-flat PdGe/Ge(xtl)

interface still remains at the end of the Ge epigrowth, due to the inhomogeneous columnar

Article published online by EDP Sciences and available at http://dx.doi.org/10.1051/jphyscol:1988493

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JOURNAL DE PHYSIQUE

growth of the PdGe grains /7/.

As deposited Ge (xtt)

Fig. 1

-

Schematic representation of the solid phase epitaxy of Ge over GaAs during the 325'C annealing of the Ge/Pd/GaAs system;

The formation of a cryfatalline Ge film is favoured due to the lower free energy than amorphous Ge. The Ga and As amount in the PdGe layer is below the AES detection limits, indicating that only a minor substrate dissolution might occur, and consequently no contact sinking into G a b . Ohmicity is assessed through the Ge/GaAs interface by an electron tunneling conduction mechanism, due to the expected formation of a n+-GaAs layer Ge doped during the annealing period /3/.

The contact resistivity of the Ge/Pd metallization has been evaluated in a test pattern con- form to T W , the spacing among the pads varying from 5 to 25 pm. From the specific contact re- sistivity g ~ derived through TLM, the linear contact resistivity gt can be deduced, more suitable for technological applications, as g t = qc/Lt. The transfer length Lt defines the width of the GaAs/meta:L interfacial stripe through which most of the current is injected from/

in GaAs. Lt is typicinlly 1 pm long for Ge/Pd contacts. In Tab. 1 the average value qt and the standard deviation d g t are reported for the Ge/Pd contact, and compared with the values obtained for a convent:ional Au(150 nm)/Ni(3O nm)/Au(GO nm)/Ge(30 nm) contact annealed at 450'C for 30 s. g t is much llarger for AuGeNi than for Ge/Pd, while A g t is almost the same for both metallization, just after the ohmic contact formation.

3

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OVERLAYER METALLIZATIONS

In a double recessed channel structure, widely used for power MESBBT's, source and drain ohmic contacts act as a mask for the channel first etching. Ge/Pd is not suitable for such applica- tion, due to its etchability by the GaAs chemical attacks. A Au-based overlayer represents a proper solution, useful moreover for bonding purposes, thermal dissipation improvement and decreasing of the contrtct sheet resistance. The overlayer is deposited in the same edaporation run of Ge/Pd and passes the same fabrication steps.

Tab. 1

-

Average value g t and standard deviation d g t of the linear ohmic contact resistivity for different metallizations on n-GaAs.

The use of a bare Au layer is detrimental to the contact properties, as shown in Tab. 1, due to the metallurgical interactions with the underlying Ge/Pd layers during th6 325'C annealing.

The insertion of a proper diffusion barrier between Au and Ge, such as Pt/Ti or Pd/Ti, hampers the Au indiffusion, leading to excellent g t and A g t values (see Tab. 1). The g t values

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parassitic sheet resistance contributes to the total measured resistance and rises up the gt values. Such an experimental artifact is minimized by decreasing the contact sheet resistance, as shown in Tab. 1 for samples with the metal overlayer.

4

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THERMAL STABILITY

The thermal stability of the Ge/Pd contact is a fundamental requirement for applications in power devices where high temperatures, well over 100eC,are steadily reached during the operat- ing life in the channel region. Accelerated aging tests at 300'C have been performed and r e sults concerning the gt variations are shown in Fig. 2 for Ge/Pd with/without overlayers and for AuGeNi contacts. The Ge/Pd bare metallization shows a relatively fast increase of @t du- ring the first tens of hours (Fig. 2a) followed by an almost linear slow growth, without any further increase of data spreading. The contact resitivity is almost twice after 200 hours, but is still acceptable for device applications. The physical mechanism determining the con- tact degradation has been tentatively attributed to the microstructural modifications affect- ing the PdGe/Ge(xtl) interface /7/. However, even impurity indiffusion from the annealing atmosphere could contribute to the observed contact resistivity degradation. On the contrary, the average gt remains roughly constant in the case of AuGeNi (Fig. 2a). but with a substan- tial increase of the data dispersion, up to A gt=0.06 Q mm.

Annealing time (hours)

Fig. 2

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Variation of the linear contact resistivity Qt versus annealing time at 300'C for different ohmic contacts. Lines are drawn for the eye guide.

The active role of Au in determining the contact resistivity is responsible for the peculiar behaviour of the Au/Ge/Pd metallization upon storages at 300°C, much different from Ge/Pd. The contact resistivity noticeably decreases, as well as the data spread, within the first hours at 300'C (Fig. Zb), indicating that even lower gt values could be achieved by optimizing the fabrication process. For longer annealing times,= average value larger than 0.5 Q mm is main-

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JOURNAL DE PHYSIQUE

tained, without any noticeable further degradation,but not suitable for MESFET ohmic contacts.

In the case of the Au/Pd/Ti overlayer (Fig. Za), a dramatic and steep increase of Qt is ob- served, suggesting the onset of detrimental metallurgical reactions between Ge/Pd and the overlayer. In this case the @t values quickly become not suitable for MESFET applications.

The contact resistivity values for the Au/Pt/Ti overlayer (Fig. 2a) are always smaller than that of bare Ge/Pd, and very close to that of AuGeNi, but with a much narrower data spread.

Thus, Au/Pt/Ti appears as a suitable overlayer for device applications.

5 - MESFET REALIZATION

Ge/Pd metallization with both Au/Pd/Ti or Au/Pt/Ti overlayers has been used for source and drain pads in 0.25 W, 4 double recessed gate fingers MESFET's fabricated by a lift-off photo- lithographic method. The substrate was a Crdoped S.I. <loo> GaAs wafer, over which a buffer undoped layer 2 pm thick and an active layer 0.4 pm thick and S doped at 1.5~1017 cm-3 were grown by VPE. lpm long Au/Pd/Ti gate contact was deposited after the ohmic contact realizat- ion. A 200 nm SiN passirating layer was PECVD deposited prior chip scribing and mounting. For comparison, MESFET's have been realized with a similar procedure by using the AuGeNi ohmic contact previously described. Typical values of Ge/Pd MESFET parameters are Idss=150 mA, gm=60 mS, Gain=8 dB and Poutput=23 dBm at 8 Ghz at 1 dB compression, and are similar also for the AuGeNi devices. An evaluation of the parasitic source and drain resistances has been accom- plished by using the Fukui method /8/ coupled with the measurements of the forward I-V diode characteristics at the gate-source and gate-drain terminal pads, on the AuGeNi and Au/Pd/Ti/

Ge/Pd devices. As expected, the average source and drain resistances for Ge/Pd contacts, 1.59 and 1.95 B respectively, are lower than for the AuGeNi devices, 1.73 and 2.61 B respecti- vely, owing to the lower Q t value.

6 - CONCLUSIONS

The Ge/Pd ohmic contact offers a suitable option, alternative to the usual AuGeNi, for MESFET applications due to the excellent morphological and electrical characteristics. The solid pha- se reaction ruling the ohmic contact formation allows for a better process control resulting in good repeatibility with a small contact resistivity value dispersion. The use of a Au/Pt/Ti overlayer allows for a straightforward application of such ohmic contact in a conventional MESFET fabrication process, and moreover improves the contact thermal stability.

Work partially supported by CNR-P.F. Materiali e Dispositivi per l7Elettronica a Stato Solido.

REFERENCES

/1/ Shih, Y.-C., Murakami, M., Wilkie, E.L. and Callegari A., J. Appl. Phys.

62

(1987) 582.

/2/ Stall, R.A., Wood, C.E.C., Board, K., Daudekar, N., Eastman, L.F. and Devlin, J., J. Appl.

Phys. 52 (1981) 4062.

/3/ Marshall, E.D., Zhemg, B., Wang, L.C., Jiao, P.F., Chen, W.X., Sawada, T., Lau, S.S., Ka- vanagh, K.L. and Kuech, T.F., J. Appl. Phys.

62

(1987) 942.

/4/ Berger, H.H., Solid-St. Electron.

15

(1972) 145.

/5/ Sawada, T., Chen, W.X., Marshall, E.D., Kavanagh, K.L., Kuech, T.F., Pain, C.S. and Lau, S.S., Mat. Res. Soc. Symp. Proc. 54 (1986) 409.

/6/ Marshall, E.D., Chen, W.X., Wu, C.S., Lau S.S. and Kuech, T.F., Appl. Phys. Lett. 47(1985) 298.

/7/ Paccagnella, A., Migliori, A., Vanzi, M., Zhang, B. and Lau, S.S., Proc. 17th ESSDERC (1987) 605.

/8/ Fukui, H., Bell Syst. Techn. J. (1979) 711.

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