8/16·BIT PERIPHERAL

#U70·A

8/16·BIT PERIPHERAL LSI DATA BOOK

• HITACHI

Hitachi America Ltd. • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435·8300

ii

Hitachi's products are not authorized for use in MEDICAL APPLICA- TIONS, including, but not limited to, use in life support devices without the written consent of the appropriate officer of Hitachi's sales company. Buyers of Hitachi's products are requested to notify Hitachi's sales offices when planning to use the products in MEDICAL APPLICATIONS.

When using this manual, the reader should keep the following in mind:

1. This manual may, wholly or partially, be subject to change without notice.

2. All rights reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this manual without Hitachi's permission.

3. Hitachi will not be responsible for any damage to the user that may result from accidents or any other reasons during operation of his unit accord- ing to this manual.

4. This manual neither ensures the enforcement of any industrial proper- ties or other rights, nor sanctions the enforcement right thereof.

5. Circuitry and other examples described herein are meant merely to indicate characteristics and performance of Hitachi semiconductor- applied products. Hitachi assumes no responsibility for any patent in- fringements or other problems resulting from applications based on the examples described herein.

6. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd.

August 1987 © Copyright 1987, Hitachi America Ltd. Printed in U.S.A.

~HITACHI

Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

CONTENTS

• GENERAL INFORMATION

• Quick Reference Guide . . . vii

• Introduction of Packages . . . 1

• Reliability and Quality Assurance . . . 12

• Reliability Test Data of Microcomputer. . . 18

• DATA SHEETS HD6321 HD6821 HD6340 HD6840 HD6844 HD6345 HD6445 HD6845R HD6845S HD6350 HD6850 HD6852 HD46508 HD46508A HD63084 HD63085Y HD68230 HD63310 HD63450 HD68450 HD63463 HD63484 HD63485 HD63486 HD68562 HD63645 HD64941 HDl46818 Peripheral Interface Adapter (CMOS) ... . Peripheral Interface Adapter (NMOS) ... . Programmable Timer Module (CMOS) ... . Programmable Timer Module (NMOS) ... . Direct Memory Access Controller (NMOS) ... . CRT Controller (CMOS) ... . CRT Controller (CMOS) ... . CRT Controller (NMOS) ... . CRT Controller (NMOS) ... . Asynchronous Communications Interface Adapter (CMOS) ... . Asynchronous Communications Interface Adapter (NMOS) ... . Synchronous Serial Data Adapter (NMOS) ... . Analog Data Acquisition Unit (NMOS) ... . Analog Data Acquisition Unit (NMOS) ... . Document Image Pre-Processor (CMOS) ... . Document Image Compression and Expansion Processor (CMOS) ... . Parallel Interface Timer (NMOS) ... . Smart Dual Port RAM (CMOS) ... . Direct Memory Access Controller (CMOS) ... . Direct Memory Access Controller (NMOS) ... . Hard Disk Controller (CMOS) ... . Advanced CRT Controller (CMOS) ... . Graphic Memory Interface Controller (Hi-Bi CMOS) ... . Graphic Video Attribute Controller (Hi-Bi CMOS) ... . Dual Universal Serial Communications Controller (NMOS) ... . LCD Timing Controller (CMOS) ... . 27 27 49 49 66 99 99 139 139 181 181 193 207 207 227 259 273 305 307 356 404 472 531 567 600 603 Asynchronous Communications Interface (NMOS) . . . 641

Real Time Clock Plus RAM (CMOS) . . . 644

Hitachi Sales Offices. . . .. . . 663

iii

GENERAL

INFORMATION

• Qu ick Reference Gu ide

• I ntroduction of Packages

• Reliability and Quality Assurance

• Reliability Test Data of Microcomputer

~HITACHI

Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300 v

QUICK REFERENCE GUIDE

• 8-BIT MICROCOMPUTER PERIPHERAL

LSI Characteristics

DIvIsion Type Nol Clock ~~PPIV qp.rating···

Packaget Function Process Frequency oltege Tem~rature

Old Type Name (MHz! (V! ('C)

HD6321' 1

Peripheral I ntariaee DP-40

HD63A21' CMOS 15 50 -20-+75

FP-54 Adapter

HD63B21' 2

PIA HD6821 HD46821 1

HD68A21 HD468A21 NMOS 15 5.0 -20-+75 DP-40 Peripheral Interface

HD68B21 HD468B21 2 Adapter

HD6340' 1

HD63A40' CMOS 1.5 5.0 -20-+75 DP-28 Programmable Timer

Module

HD63B40' 2

PTM HD6840 1

HD68A40 NMOS 1.5 5.0 -20-+75 DP-28 Programmable Timer

Module

HD68840 2

HD6844 HD46504 1

DMAC HD68A44 HD46504-1 NMOS 1.5 50 -20-+75 DP-4Q Direct Memory

Access Controller

HD68B44 HD46504-2 2

H06345* 1 CRT Controller

HD63A45' CMOS 15 5.0 -20-+75 DP-4Q (4.5 MHz HIgh

Speed Dlsplav!

HD63B45' 2 6800 type bus tim Ing

HD6845 HD46505R 1 CRT Controller

HD68A45 HD46506R-l NMOS 1.5 5.0 -20-+76 DP-4Q (3.0 MHz HlIIh

CRTC HD68B45 HD46505R-2 2 Speed D,splav)

HD6B45S HD46505S-1 1 CRT Controller

HD68A45S HD46505S-1 NMOS 1.5 5.0 -20-+75 DP-4Q (3_7 MHz HIgh

HD68B45S HD46505S-2 2 Speed Dlsplav!

CRT Controller

HD6445-4' CMOS 4 5.0 -20-+75 DP-40 (4.5 MHz High

Speed Dlsplav) 80 type bus timing

HD6350 1 Asynchronous

HD63A50 'CMOS 1.5 5.0 -20-+75 DP-24 Communications

HD63B50 2 I nterface Adapter

ACIA

HD6850 HD46850 1 Asynchronous

NMOS 5.0 -20-+75 DP·24 Communications

HD68A50 HD468A50 1.5 Interface Adapter

HD6852 HD46852 1

SSDA NMOS

HD68A52 HD468A52 1.5 50 -20-+75 DP-24 Synchronous Senal

Data Adapter

HD46608 1

HD46508-1 1.5 Analog Dati

ADU NMOS 5.0 -20-+75 DP-24 AqulSltlon Unit

HD46508A 1

HD46608A-l 1.5

RTC HDI46818 CMOS 1 5.0 0-+70 DP-24 Reel Tune Clock

FP-24 plu.RAM

DIPP HD63084' CMOS 10lmaxl 5.0 0-+70 DP-B4S Documem Image

Pre-Processor

DICEP HD63085' CMOS 32lmax) Document Image Com-

5.0 0-+70 PC-72 prelSlon and Expan- sion Proceuor

g-PRAM HD63310" CMOS 5.0 0-+70 DP-48 Smart Dual Port

RAM

LCTC HD63646" CMOS 2 5.0 -20-+75 FP-80 LCD Timing Controller

ACI HD64941·· NMOS 50 0-+70 DP-24N Asynchronous Com-

munlCltionslnterfece

• Preliminary·· Under development ••• Wide temperature range (-40_+85°C) version II available.

top: PlastiC DIP, FP: Flat Plastic Package, DC: Ceramic DIP PGA: Pin Gnd Array. PC: Ceramic Pin Grid Arrav.

CP: PlastiC Leaded Chip Carrier

~HITACHI

Compatibility

MC6821 MC68A21 MC68B21

MC6840 MC68A40 MC68840 MC6844 MC68A44 MC68844

MC6845 MC68A46 MC68B45

MC6850 MC68A50 MC6852 MC68A52

MCI46818

SCN2B41

Hitachi America Ltd. • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

R,ference Page

27

27

49

49

66

99

139

139

99

181

181

193

207

644 227 259 305 603 641

vii

• 16-BIT MICROCOMPUTER PERIPHERAL

LSI Characteristics

Division Type No. Clock Supply Operating _Function

Compatibility Reference

Process Frequency Voltage Temperature Package Page

(MHz) (V) (DC)

PItT HD68230P8*

NMOS 8 5.0 0-+70 DP-48 Parallel Interface MC68230L8 273

HD68230Pl0* 10 ^Timer MC68230L10

HD63450-6* 6 DC-64

HD63450-8* CMOS 8 5.0 0-+70 DP.e4S DP.e4 Direct Memory 307

HD63450-10' 10 PGA-68 Access Controller

DMAC HD63450-12* 12.5 CP-68

HD66450-4 4 MC68450L4

HD66450-6 6 DP-64 Direct Memory MC68450L6

356

NMOS 5.0 0-+70

HD66450-8 8 PGA-68 Access Controller MC68450L8

HD68450-10 10

HD63463-4 4 DC-48

HOC HD63463-6 CMOS 6 5.0 0-+70 DP-48 Hard Disk

Controller 404

HD63463-8 8 CP-52

HD63484-4 4 DC-64

ACRTC HD63484-6 CMOS DP-64 Advanced CRT

472

6 5.0 0-+70 Controller

HD63484-8 8 CP-68

GMIC HD63485** Hi-Bi

5.0 0-+70 DP-64S Graphic Memory 531

CMOS CP-68 Interface Controller

GVAC HD6348S'* Hi-Bi

5.0 0-+70 DP.e4S Graphic vidao ₅₆₇

CMOS CP-68 Attribute Controller

Dual Universal ^MC68562

DUSCC HD68562*' NMOS 4 (max) 5.0 0-+70 DC-48 Serial Communica- SCN68562 600

tions Controller

* Preliminary *. Under development

~HITACHI

viii Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

- - - Q U I C K REFERENCE GUIDE

• 8/16 BIT MICROCOMPUTER PERIPHERAL

LSI Characteristics

Division Type No. Clock Supply Operati~g* _t

Function Compatibility Reference

Process Frequency Voltage Temperature Package Page

(MHz) (V) ('C)

HD6845 1 CRT Controller MC6845

HD68A45 NMOS 1.5 5.0 -20-+75' DP40 (3.0 MHz High MC68A45 139

HD68B45 2 Speed Display)

MC68B45

HD6845S 1

CRT Controller

HD68A45S NMOS 1.5 5.0 -20-+75 DP40 (3.7 MHz HIgh 139

HD68B45S 2 Speed Display)

CRTC HD6345' 1 CAT Controller

HD63A45* CMOS 1.5 5.0 -20-+75 DP40 (4.5 MHz High 99

Speed Display)

e

E CRT Controller

8

> Speed Display) 99

ro

]. ^{80 type} bus timing

15 LCTC HD63645** CMOS 2 5.0 -20-+75 FP-80 LCD Timing Controller 603

HD63484-4 4 DC-64

ACRTC HD63484-6 CMOS 6 5.0 0-+70 DP-64 Advanced ₄₇₂

CRT Controller

HD63484-8 8 CP-68

GMIC HD63485** ^Hi-BI DP-64S Graphic Memory

5.0 0-+70 531

CMOS CP-68 Interface Controller

GVAC HD63486** ^Hi-8i 5.0 0-+70 DP-64S Graphic Video 567

CMOS r.P-flR Attribute Controller

~

NMOS 5.0 -20-+75 DP-24 Communications 181

HD68A50 1.5 _I nterface Adapter MC68A50

l!! ACIA HD6350 1

.: Asynchronous

"

'N

"

~

E ^{SSDA NMOS 5.0 -20-+75 DP-24 193}

E ^{HD68A52 1.5} Data Adapter MC68A52

0 Dual Universal Serial SCN68562

U DUSCC HD68562** NMOS 4 (max) 5.0 0-+70 DC-48 Communications Control 600

MC68562

ACI HD64941** NMOS 5.0 0-+70 DP-24N Asynchronous Com-

SCN2641 641

mUnications Control

HD6840 1 MC6840

HD68A40 NMOS 1.5 5.0 -20-+75 DP-28 Programmable Timer

MC68A40 49

Module

HD68B40 2 MC68B40

e

E ₀ Programmable Timer

HD63A40* CMOS 1.5 5.0 -20-+75 DP-28 49

u Module

i; HD63B40* 2

E _DP-24

,:: _{RTC HD146818 CMOS 1 5.0 0-+70} Real Time Clock

MC146818 644

FP-24 Plus RAM

HD68230P8* 8 Parallel Interface MC68230L8

PitT NMOS 5.0 0-+70 DP-48 _Timer 273

HD68230P10* 10 MC6R230L10

0 HD63463-4 4 DC-48

~~ HOC HD63463-6 CMOS 6 5.0 0-+70 DP48 Hard Disk Controller 404

.- c

" - 0

HD63463-8 8

U CP-52

* Preliminary ** Under development *** Wide temperature range (-40'"" +8SoC) version IS available) tOP: Plastic DIP, DC: CeramiC DIP, FP: Flat Plastic Package, PGA: Pm Grid Array,

PC: Ceramic Pin Grid Array, CP: Plastic Leaded Chip Carrier

~HITACHI

Hitachi America Ltd • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300 ix

• 8/16 BIT MICROCOMPUTER PERIPHERAL

LSI Characteristics

Division Tvpe No. Clock Supply Operating··· t Function Compatibility Referance

Process Frequency Voltage Temperature Package Page

(MHz) (V) (OC)

HD6844 1 a·Bit Direct MC6844

HD68A44 NMOS 1.5 5.0 -20-+75 DP-40 MemorvAcc ... MC68A44 66

~

HD68450-4 4 MC68450L4

8

E NMOS 5.0 0-+70 Memory Access 356

i

CIl HD68450-10 10 MC68450L10

HD63450-6" 6 DC-64

HD63460.s" a DP-64 16-Bit Direct

CMOS 5.0 0-+70 DP-64S Memory Access 307

HD63450-10" 10 PGA-68 Controller

HD63450-12" 12.5 CP-68

S- HD63310"" CMOS 5.0 0_+70 DP-48 Smart Dual Port 305

DPRAM RAM

HD6821 1 MC6821

HD68A21 NMOS 1.5 5.0 -20-+75 DP-40 Peripheral I nterfeea

MC68A21 27

HD68B21 2 Adapter

MC68B21

..

~

DP-40 Peripheral Interface

~

HD63B21" 2 FP-54

~

..

.J:: ADU HD46508-1 1.5 Analog pata

0. NMOS 5.0 -20-+75 DP-40 207

l

HD46508A-l 1.5

HD68230PS" 8 Parallel Interface MC68230L8

Plrr NMOS 5.0 0-+70 DP-48 273

HD68230Pl0" 10 Timer MC68230L10

HD63084" CMOS 10 (max) 5.0 0-+70 DP-64S Document Image

E ~ DIPP 227

.... 8

E if!! Document Image

g£e

C 0-

Expansion Processor ... Preliminary ** Under development ••• Wide temperature range (-40 ,.,. +85°C) version is available.

t DP: Plastic DIP, DC: Ceramic DIP, FP: Flat Plastic Package PGA: Pin Grid Array, PC: Ceramic Pin Grid Array, CP: Plast'c leaded chip carrier

• HITACHI

x

INTRODUCTION OF PACKAGES

Hitachi microcomputer devices include various types of package which meet a lot of requirements such as ever smaller, thinner and more versatile electric appliances. When selecting a package suitable for the customers' use, please refer to the following for Hitachi microcomputer packages.

multi-function types, applicable to each kind of mounting method. Also, plastic and ceramic materials are offered ac- cording to use.

1. Package Classification

Figure 1 shows the package classification according to the mounting types on the Printed Circuit Board (PCB) and the materials.

There are pin insertion types, sUFface mounting types and

Package Classification

Pin Insertion Type

Surface Mounting Type

Multi-function Type

Standard Oud ine

Shrink Outtine

Flat Package

Ch ip Carrier

EPROM on the Package Type DIP; DUAL IN LINE PACKAGE S-DIP;SHRINK DUAL IN LINE PACKAGE PGA: PIN GRID ARRAY

FLAT-DIP; FLAT DUAL IN LINE PACKAGE FLAT-QUIP; FLAT QUAD IN LINE PACKAGE CC: CHIP CARRIER

SOP;SMALL OUTLINE PACKAGE FPP; FLAT PLASTIC PACKAGE PLCC; PLASTIC LEADED CHIP CARRIER LCC; LEADLESS CHIP CARRIER

Plastic DIP Ceramic DIP Shrink Type Ple.ti~ DIP Shrink Type Ceramic DIP

SOP (Plastic) FPP (Plastic) PLCC (Plastic) (Gla .. Sealed Ceramic)

Figure 1 Package Classification according to the Mounting Type on the Printed Circuit Board and the Materials .

• HITACHI

Hitachi America Ltd. • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

2. Type No. and Package Code Indication

Type No. of Hitachi 8/16 bit microcomputer peripheral device is followed by package material and outline specifica·

tions, as shown below. The package type used for each device Type No. Indication

is identified by code as follows, illustrated in the data sheet of each device.

When ordering, please write the package code beside the type number.

HDxxXXP

(Note) The HD63450 with shrink type plastic DIP (DP-64S) has a dif·

ferent type No. from other deVices.

Type No.;

H D63450PS8

Package Code Indication

DP-64S

Qsu!inJ. ^Materials D ; DIP P ; Plastic C ; CC G ; Glass Sealed F ; FLAT ceramic P ; PGA C ; Ceramic

(Note) PGA packages of 16~bit microcomputer devices have a different indication.

Package Code Indication;

PGA-68

Packaae Classification No Indication Ceramic DIP

P Plastic DIP F (FP) SOp. FPP

CP PLC~

V PGA (16·bit microcomputer device)

• HITACHI

2 Hitachi America Ltd. • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

---INTRODUCTION OF PACKAGES

3. Package Dimensional Outline

Hitachi multi.chip microcomputer device employs the pack.

ages shown in Table I according to the mounting method on the PCB.

Table 1 Package List

Method of Mounting Package Classification Package Material Package Code

DP·24 DP·24N

Plastic DP·28 DP-40

Standard Outline (DIPI DP·64

Pin I nsertion Type Ceramic DC-48

DC-64

SoDIP Plastic DP-64S

Shrink Outline

PGA Glass Sealed Ceramic PGA-BII PC-72

FLAT-DIP (SOPI FP-24

Surfece Mounting Type Flat Package Plastic FP-54

FLAT-QUIP (FPPI FP-80

Plastic DIP

• DP-24

31 6( 1244) /24 32 5ma •. ( I 280ma •. ) 13 1

[:::::::::~H

--I~7) 1524

r--;;;;:;;;;:;:;::;::;::;:;::;::;::;:;::~~-l ~ j~0600) ^!

tTrrt a n O , . . . N ,r"""nr"\n.n/'I"IT"l,,..,,r\l 0 S. ~ ~

~ ~ ~~\\

254±025 -l1048±0I:l8 ~2 'II\'!

(OIOO±OOIO) (0019±0004) N;; ^{0'-15' \OOIO!l.}

(Unit: mml

.DP-24N

316(1244) / ~4 ^{325m .... (1} 280m ... ) 131

[ : : : : : : : : : : : 11

-'-JI (;~" ^{" - -}

J "" ,

~~I~~

.

c:i S. 11')8

. ~i!l,\\

254±025 048±01 ~S ~25 !l,'II\'!

~.~, ".4,. .."

(Unit: mml

• HITACHI

Hitachi America Ltd. • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300 3

• DP-28 Scale: 1/1

35.6(1.402)

128

(Unit: mml

• DP-40

52.8(2.079)

40 54.0max.(2.I26mlx.) 21

20

Unit (mml

• DP-48

6212(2446) 63.50mlx.(2.579mlx.)

48 25

~ ~~"~""""n

0

I ;;

'j' w --=..ri-h3(0.051l

w w w w

24

(Unit: mml

• HITACHI

4 Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

---INTRODUCTION OF PACKAGES

• DP-64 Scale: 1/1

;:::

ii:l

.

.8 ^{0 0}

~

N .8

(Unit: mm)

• HITACHI

Hitachi America Ltd .•. 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300 5

INTRODUCTION OF PACKAGES---

I

I

eDC-48 Scale: 1/1

60 42(2 379)

48 2S

F=:> I\!!

:!d 0

I

--=..rl-

127(0.050)

24

0.48±0.1 2.SHO.25

(0.019±0.004) (O.IOO±O.OIO) (Unit; mm)

eDC·84 Scale: 1/1

8128 (3.200)

64 33

ill

!:i

0 ~

32

H 0.25~

(0.010!i:1i8I) (Unit; mm)

$ ^HITACHI

6 Hitachi America Ltd. • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

---INTRODUCTION

• DP·64S

57.6(2.268) 64 58.6mIK.(2.307mIK.)

o

Pin Grid Array

• PGA·68

2642 (1040)

~ D

~

@

• PC·72 274 (1.079 )

~

D

~

t'CJ

S.OBmlx. 2.54min (0.200m.,) (O.IOOmin.)

S.08max.

(0.200m",.,"!) -Ft,-"-

1.27typ.

(0.050typ.)

33

32

22.86±045 (0900±0.0187)

~HITACHI

Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

Scale: 1/1

(Unit: mm)

Scale: 1/1

(Unit: mm)

Scale: 1/1

(Unit: mm)

7

INTRODUCTION OF PACKAGES---

Plastic Leaded Chip Carrier

<PLCC>

• CP-52

• CP-68

8

' D ' ~'''''I~ -

~! ^! i~~

H ~! l~;

"

21 33

1912

25 15 ~ 0 12 (0990+0005)

o

.§ ~~

:r&\WWiiiiiJwa~!

~~~I

o ^HITACHI

Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

Scale: 1/1

(Unit: mm)

Scale: 1/1

(Unit: mm)

---INTRODUCTION OF PACKAGES

Flat Package

<SOP>

eFP-24

<FPP>

eFP-54

e FP-80

15 10(0 6U)

256±04 (1.008±0.016)

~

:e

§ :!

"'

.,

s' ~

29max (0 114ma,)

0.15±0.05 (0.006 ± 0.002)

(0.014±0.004)

..J\u.uUUUIlllUUqUUqIUlIUlIllUU~0.-15.

\.~0.0\2)

~HITACHI

Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

Scale: 1/1

(Unit: mm)

Scale: 3/2

(Unit: mm)

Scale: 3/2

(Unit: mm)

9

INTRODUCTION OF PACKAGES---

4. Mounting Method on Board

Lead pms of the package have surface treatment, such as solder coating or solder plating, to make them easy to mount on the PCB. The lead pins are connected to the package by eutectic solder. The following explains the common connecting method ofleads and precautions.

4.1 Mounting Method of Pin Insertion Type Package

Insert lead. pins of the package into through.holes (usually about q,0.8mm) on the PCB. Soak the lead part of the package in a wave solder tub.

Lead pins of the package are held by the through-holes.

Therefore, it is easy to handle the package through the process up to soldering, and easy to automate the soldering process.

When soldering the lead part of the package In the wave solder tub , be careful not to get the solder on the package, because the wave solder will damage it.

4.2 Mounting Method of Surface Mounting Type Package Apply the specified quantity of solder paste to the pattern on any printed board by the screen printing method, and put a package on it. The package is now ~emporarily fixed to the pnnted board by the surface tension of the paste. The solder paste melts when heated in a reflowing furnace, and the leads of the package and the pattern of the printed board are fixed together by the surface tension of the melted' solder and the self ahgnment.

The size of the pattern where the leads are attached, partly depending on paste material or furnace adjustment, should be

l.l to 1.3 times the leads' width.

The temperature of the reflowing furnace depends on pack- age material and also package types. Fig. 2 lists the adjustment of the reflowing furnace for FPP. Pre-heat the furnace to 150°C.

The surface temperature of the resin should be kept at 23SoC max. for 10 minutes or less.

(1) The temperature of the leads should be kept at 260°C for 10m inutes or less.

(2) The temperature of the resin should be kept at 235°C for 10m inutes or less.

(3) Below is shown the temperature profile when soldering a package by the reflowing method.

Tlme---+

Figure 2 Reflowing Furnace Adjustment for FPP

Ensure good heater or temperature controls because the material of a plastic package is black epoxy-resin which damages easily. When an infrared heater is used, if the temperature is higher than the glass transition point of epoxy-resin (about IS0°C), for a long time, the package may be damaged and the reliability lowered. Equalize the temperature inside and outside the packages by l~ssening the heat of the upper surface of the packages.

Leads of FPP may be easily bent under shipment or during handling and cannot be soldered onto the printed board. If they are, heat the bent leads again with a soldering iron to re- shape them.

Use a rosin flux when soldering. Don't use a chloric flux because the chlorine in the flux tends to remain on the leads and lower the reliability of the product.

Even if you use a rosin flux, remaining flux can cause the leads to deteriorate. Wash away flux from packages with alcohol, chlorothene or freon. But don't leave these solvents on the packages for a long time because the marking may disappear.

5. Marking

Hitachi trademark, product type No., etc. are printed on packages. Case I and Case II give examples of marks and Nos.

Case I applies to products which have only a standard type No.

Case II applies to products which have an old type No. and a standard type No.

• HITACHI

10 Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

---INTRODUCTION OF PACKAGES

Case I; I neludes a standard type No.

(d)

D~B~rsJ

Case II; Includes an old type No. and a standard type No.

(a) (b)

'. mDB

(e)

B 0 ^~ B BOB S B

(d)D~B~rsJ

(c)

BDB8~BSB

@HITACHI

Meaning of Each Mark

(01 Hitachi Trademark (bl Lot Code (el Standard Type No.

(dl Japan Mark (el Old Type No.

Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435·8300 11

RELIABILITY AND QUALITY ASSURANCE

1. VIEWS ON QUALITY AND REI-lABILITY

Basic views on qUality in Hitachi are to meet individual user's purchase purpose and quality required, and to be at the satisfied quality level considering general marketability. Quality required by users is specifically clear if the contract specifica·

tion is provided. If not, quality required is not always defmite.

In both cases, efforts are made to assure the reliability so that semiconductor devices delivered can perform their ability in actual operating circumstances. To realize such quality in manufacturing process, the key points should be to establish quality control system in the process and to enhance morale for quality.

In addition, quality required by users on semiconductor devices is going toward higher level as performance of elec- tronic system in the market is going toward higher one and is expanding size and application fields. To cover the situation, actual bases Hitachi is performing is as follows;

(1) Build the reliability in design at the stage of new product development.

(2) Build the quality at the sources of manufacturing process.

(3) Execute the harder inspection and reliability confirmation of fmal products.

(4) Make quality level higher with field data feed back.

(5) Cooperate with research laboratories for higher quality and reliability.

With the views and methods mentioned above, utmost efforts are made for users' requirements.

2. RELIABILITY DESIGN OF SEMICONDUCTOR DEVICES

2.1 Reliability Targets

Reliability target is the important factor in manufacture and sales as well as performance and price. It is not practical to rate reliability target with failure rate at the certain common test condition. The reliability target is determined correspond·

ing to character of equipments taking design, manufacture, inner process quality control, screening and test method, etc.

into conSideration, and conSidering operating circumstances of equipments the semiconductor device used in, reliability target of system, derating applied in design, operating condition, maintenance, etc.

2.2 Reliability Design

To achieve the reliability required based on reliability targets, timely sude and execution of design standardization, device design (including process design, structure design), design review, reliability test are essential.

(I) Design Standardization

Establishment of design rule, and standardization of parts, material and process are necessary. As for design rule, critical items on quality and reliability are always studied at circuit deSign, device design, layout design, etc. Therefore, as long as standardized process, material, etc. are used, reliability risk is extremely small even in new development devices, only except for in the case special requirements in function needed.

(2) Device DeSign

It is important for device design to consider total balance of process design, structure design, circuit and layout design.

Especially in the case new process and new material are em- ployed, technical study is deeply executed prior to device

development.

(3) Reliability Evaluation by Test Site

Test site is sometimes called Test Pattern. It is useful method for design and process reliability evaluation of IC and LSI which have complicated functions.

1. Purposes of Test Site are as follows;

• Making clear about fundamental failure mode

• Analysis of relation between failure m04e and manufac- turing process condition

• Search for failure mechanism analysis

• Establishment of QC point in manufacturing 2. Effectiveness of evaluation by Test Site are as follows;

• Common fundamental failure mode and failure mecha- nism in devices can be evaluated.

• Factors dominating failure mode can be picked up, and comparison can be made with process having been experi- enced in field.

• Able to analyze relation between failure causes and manu- factUring factors.

• Easy to run tests.

etc.

2.3 Design Review

Design review is organized method to confirm that design satisfies the performance required including users' and design work follows the specified ways, and whether or not technical improved items accumulated in test data of individual major fields and field data are effectively built in. In addition, from the standpoint of enhancement of competitive power of prod- ucts, the major purpose of design review is to ensure quality and reliability of the products. In Hitachi, design review is performed from the planning stage for new products and even for design changed products. Items discussed and determined at design review are as follows;

(1) Description of the products based on specified design documents.

(2) From the standpoint of specialty of individual participants, design documents are studied, and if unclear matter is found, sub·program of calculation, experiments, investiga- tion, etc. will be carried out.

(3) Determine contents of reliability and methods, etc. based on design document and drawing.

(4) Check process ability of manufacturing line to achieve design goal.

(5) Discussion about preparation for production.

(6) Planning and execution of sub-programs for design change proposed by indiVidual specialist, and for tests, experiments and calculation to confirm the design change.

(7) Reference of past failure experiences with similar devices, confmnation of method to prevent them, and planning and execution of test program for confmnation of them.

These studies and decisions are made using check lists made individually depending on the objects.

3. QUALITY ASSURANCE SYSTEM OF SEMICONDUCTOR DEVICES

3.1 Activity of Quality Assurance

General views of overall quality assurance in Hitachi are as follows;

(l) Problems in individual process should be solved in the

~HITACHI

12 Hitachi Amenca Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

- - - R E L I A B I L I T Y AND QUALITY ASSURANCE process. Therefore, at fmal product stage, the. potential

failure factors have been already removed.

(2) Feedback of infonnation should be made to ensure satisfied level of process ability.

(3) To assure reliability required as an result of the things mentioned above is the purpose of quality assurance.

The followings are regarding device design, quality approval at mass production, inner process quality control, product inspection and reliability tests.

3.2 Quality Approval

To ensure quality and reliability required, quality approval is carried out at trial production stage of device design and mass production stage based on reliability design descnbed at section 2.

The views on quality approval are as follows;

(I) The third party perfonns approval objectively from the standpoint of customers.

(2) Fully consider past failure experiences and infonnation from field.

(3) Approval is needed for design change and work change.

(4) Intensive approval is executed on parts material and pro·

cess.

(5) Study process ability and fluctuation factor, and set up control points at mass production stage.

Considering the views mentioned above, quality approval shown in Figure 1 is performed.

3.3 Quality and Reliability Control at Mass Production For quality assurance of products in mass production, quality control is executed with organic division of functions

in manufacturing department, quality assurance department, which are major, and other departments related. The total function flow is shown in Figure 2. The main points are described below.

3.3.1 Quality Control of Parts and Material

As the perfonnance and the reliability of semiconductor devices are getting higher, importance is increasing in quality control of material and parts, which are crystal, lead frame, fme wire for wire bonding, package, to build products, and materials needed in manufacturing process, which are mask pattern and chemicals. Besides quality approval on parts and materials stated in section 3.2, the incoming inspection is, also, key in quality control of parts and materials. The in·

coming inspection is perfonned based on incoming inspection specification following purchase specification and drawing, and sampling inspection is executed based on MIL·STD·105D mainly.

The other activities of quality assurance are as follows:

(1) Outside Vendor Technicallnfonnation Meeting

(2) Approval on outside vendors, and guidance of outside vendors

(3) Physical chemical analysis and test

The typical check points of parts and materials are shown in Table 1.

3.3.2 Inner Process Quality Control

Inner process quality control is performing very important function in quality assurance of semiconductor devices. The following is description about control of semi·fmal products, fmal products, manufacturing facilities, measuring equipments,

Step Contents Purpose

/:Target

I

Specification

~ l;esi9n

Characteristics of Material and Confirmation of

Trial Materials, Parts II Parts Characteristics and

Production Approval II Appearance Reliability of Materials

Dimension and Parts

Heat Resistance Mechanical Electrical Others

ILCharacteristics Approval Electrica' Confirmation of Target

Characteristics Spec. Mainly about

Function Electrical Characteristics

Voltage Current Temperature Others

Appearance, Dim.ns,ion

Qual itv Approval (1 Reliability Test Confirmation of Quality

Life Test and Reliability in Design

Thermal Stress Moisture Resistance Mechanical Stre ..

Others

Qualit'j< Approval (2) Reliability Test Confirmation of Quality

~ Process Check same as and Reliebility in Ma ..

Quality Approval (1) Production

I~ass Production

J

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Hitachi America Ltd. • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435·8300 13

circumstances and sub-materials. The quality control in the manufacturing process is shown in Figure 3 corresponding to the manufacturing process.

measures

• Transmission of information about quality

(2) Quality Control of Manufacturing Facilities and Measuring Equipment

(1) Quality Control of Semi-fmal Products and Final Products Potential failure factors of semiconductor devices should be removed preventively in manufacturing process. To achieve it, check points are set-up in each process, and products which have potential failure factor are not transfer to the next process.

Especially, for high reliability semiconductor devices, manu- facturing line is rigidly selected, and the quality control in the manufacturing process is tightly executed - rigid check in each process and each lot, 100% inspection in appropriate ways to remove failure factor caused by manufacturing fluctuation, and execution of screening needed, such as high temperature aging and temperature cycling. Contents of inner process quality control are as follows;

Equipments for manufacturing semiconductor devices have

~een developing extraordinarily with necessary high perform- ance devices and improvement of production, and are important factors to determine quality and reliability. In Hitachi, auto- matization of manufacturing equipments are promoted to im- prove manufacturing fluctuation, and controls are made to maintain proper operation of high performance equipments and perform the proper function. As for maintenance inspection for quality control, there are daily inspection which is perform- ed daily based on specification related, and periodical inspection which is performed periodically. At the inspection, inspection points listed in the specification are checked one by one not to make any omission. As for adjustment and maintenance of measuring equipments, maintenance number, speCification are checked one by one to maintain and improve qUality.

• Condition control on individual equipments and workers, and sampling check of semifmal products.

• Proposal and carrying-out improvement of work

• Education of workers

• Maintenance and improvement of yield

(3) Quality Control of Manufacturing Circumstances and Sub- materials

• Picking-up of quality problems, and execution of counter- Quality and reliability of semiconductor device is highly

14

I I I I I I

Material, Parts

Products

~----

Process Quality Control

Inspection on Material and Parts for Semiconductor Devices

Manufacturing Equipment, Environment. Sub-material.

Worker Control

Inner Process Quality Control

100% I nspection on Appearance and Electrical Characteristics

Sampling Inspection on Appearance and Electrical Characteristics

Reliability Test

r - - - ,

I

" Claim :

I Field Experience I General Quality

I nformation I

L _________________ ...

Method

Lot Sampl ing, Confirmation of Qual ity Level

Confirmation of Qual ity Level

Lot Sampl ing, Confirmation of Quality Level

Testing.

Inspection

Lot Sampling

'Confirmation of Quality Level, Lot Sampling

Feedback of Information

Figure 2 Flow Chart of Quality Control in Manufacturing Process

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Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

- - - R E L I A B I L I T Y AND QUALITY ASSURANCE affected by manufacturing process. Therefore, the controls of

manufacturing circumstances - temperature, humidity, dust - and the control of submaterials - gas, pure water - used in manufacturing process are intensively executed. Dust control is described in more detail below.

Dust control is essential to realize higher integration and higher reliability of devices. In Hitachi, maintenance and im- provement of cleanness in manufacturing site are executed with paying intensive attention on buildings, facilities, air- conditioning systems, materials delivered-in, clothes, work, etc., and periodical inspection on floating dust in room, falling dusts and dirtiness of floor.

3.3.3 Final Product Inspection and Reliability Assurance (1) Final Product Inspection

Lot inspection is done by quality assurance department for products which were judged as good products in 100% test, which is fmal process in manufacturing department. Though 100% of good products is expected, sampling inspection is executed to prevent mixture of failed products by mistake of work, etc. The inspection is executed not only to confmn that the products meet users' requirement, but to consider potential factors. Lot inspection is executed based on MIL-STD-105D.

(2) Reliability Assurance Tests

To assure reliability of semiconductor devices, periodical reliability tests and reliability tests on individual manufacturing lot required by user are performed.

Table 1 Quality Control Check Points of Material and Parts (Examplel

Material, Important Point for Check Parts Control Items

Appearance Damage and Contamina- tion on Surface

Wafer Dimension Flatness

Sheet Resistance Resistance Defect Density Defect Numbers Crystal Ax is

Appearance Defect Numbers, Scratch

Mask Dimension Dimension Level

Resistoration

Gradation Uniformity of Gradation Fine Appearance Contamination, Scratch,

Wire for Bend, Twist

Wire Dimension

Bonding Purity Purity Level

Elongation Ratio Mechanical Strength Appearance Contamination, Scratch Dimension Dimension Level Processing

Frame Accuracy

Plating Bondability, Solderability Mounting Heat Resistance

Characteristics

Appearance Contamination, Scratch Dimension Dimension Level Leak Resistance Airtightness

Plating Bondability, Solderability Ceramic Mounting Heat Resistance Package Characteristics

Electrical Characteristics

Mechanical Mechanical Strength Strength

Composition Characteristics of Plastic Material Electrical

Characteristics Plastic Thermal

Characteristics

Molding Molding Performance Performance

Mounting Mounting Characteristics Characteristics

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Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (40B) 435-B300 15

Process Control Point Purpose of Control Purchase of Material

Wafer Wafer Characteristics, Appearance Scratch, Removal of Crystal

Defect Wafer

Surface Oxidation Oxidation Assurance of Resistance

Inspection on Surface Appearance, Thickness of Pinhole, Scratch

Oxidation Oxide Film

Photo Resist Photo

Resist

Inspection on Photo Resist Dimension, Appearance Dimension Level

o POC Level Check Check of Photo Resist

Diffusion Diffusion Diffusion Depth, Sheet Diffusion Status

Resistance

Inspection on Diffusion Gate Width Control of Basic Parameters

o POC Level Check Characteristics of Oxide Film (VTH, etc.) Cleanness of surface, Breakdown Voltage Prior Check of VIH

Breakdown Voltage Check Evaporation Evapora- Thickness of Vapor Film, Assurance of Standard

tion Scratch, Contamination Thickness Inspection on Evaporation

o POC Level Check

Wafer Inspection Wafer Thickness, VTH Characteris- Prevention of Crack,

tics Quality Assurance of Scribe

Inspection on Chip Chip Electrical Characteristics Elec;trical Characteristics

Chip Scribe Appearance of Chip

Inspection on Chip Appearance

o POC Lot Judgement Frame

Assembling Assembling Appearance after Chip Ouality Check of Chip

Bonding Bonding

Appearance after Wire Ouality Check of Wire

Bonding Bonding

o POC Level Check Pull Strength, Compression Prevention of Open and Width, Shear Strength Short

Inspection after Appearance after Assembling

Assembling

o POC Lot Judgement Package

Sealing Sealing Appearance after Sealing Guarantee of Appearance Outline, Dimension and Dimension o POC Level Check Marking Marking Strength

Final Electrical Inspection

o Failure Analysis Analysis of Failures, Failure Feedback of Analysis Infor-

Mode, Mechanism mation

Appearance Inspection Sampling Inspection on Products

Receiving Shipment

Figure 3 Example of Inner Process Quality Control

@HITACHI

16 Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300

- - - R E L I A B I L I T Y AND QUALITY ASSURANCE

r--- - - - 1

I

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Failure Analysis

I I

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I

I I

I

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I I

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Sales Engineering Dept.

Reply

Customer

Figure 4 Process Flow Chart of Field Failure

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Hitachi America Ltd . • 2210 O'Toole Avenue • San Jose, CA 95131 • (408) 435-8300 17