Virtual Screening on FPGA
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(2) Embed β on the FPGA. =. ✖. Target Represen tation. =. Target Predictions. ✖. β Link Matrix. Latent Vector. Feature Vector. Streaming Compound Descriptors. Streaming Target Predictions. Embed on the FPGA. Fig. 1. Virtual Molecule Screening (VMS) Pipeline. FPGA acceleration Using Field-Programmable Gate Arrays (FPGAs) to accelerate large scale predictions has become popular in recent years in many domains, especially in combination with Neural Networks as is evident from the plethora of available software packages and publications on the topic. We have mapped the prediction flow as shown in Figure 1 on FPGA. The FPGA implementation is 10x faster than to the original CPU implementation and has a similar performance as GPUs. However, the FPGA consumes 3x less power than the GPU or CPU. The key properties we needed to exploit to achieve this result are: Parallelism: Compared to CPUs, FPGAs have a clock-speed that is 10x lower than CPUs. They compensate for this by providing many more parallel resources (DSP blocks, memory’s, LUTs, ...). We were able to benefit from these extra resources by exploiting parallelism at many levels: inside the prediction pipeline, but also across proteins and molecules. Code Complexity: Mapping code efficiently on FPGA is a time consuming tasks, even with help of high-level synthesis tools. Thanks to the simplicity of the code and the use of a code generator, we were able to reach good speed up with relatively little effort. Memory Bandwidth: As with all accelerators, getting data in and out efficiently is key to good performance. In this case we achieved this by streaming the fingerprints in and predictions out in a linear fashion, and by storing the model itself in the FPGA on-chip memory beforehand. Bit-Width Reduction: FPGAs deal much better with reduced bit-width fixed point numbers than with double or single floating point numbers. We were able to reduce the bit width of the input and output streams, and of the model itself from 64 bit floating point to 16bit fixed point, without a significant loss in prediction accuracy. The Demo The demo will consist of a ZCU102 Evaluation Board running the VMS pipeline, a set of slides explaining the key concepts as detailed in this abstract and an accompanying video. The video is available at https://vimeo. com/256141454. Acknowledgments The authors would like to acknowledge funding from the European Union’s Horizon 2020 Research and Innovation programme under Grant Agreement no. 754337 (EuroEXA)..
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