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Influence of Surface Defectivity on the Performances of Silicon Heterojunction Solar Cells

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HAL Id: hal-02321708

https://hal.archives-ouvertes.fr/hal-02321708

Submitted on 21 Oct 2019

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Influence of Surface Defectivity on the Performances of Silicon Heterojunction Solar Cells

V Giglia, J. Veirman, R. Varache, E. Fourmond

To cite this version:

V Giglia, J. Veirman, R. Varache, E. Fourmond. Influence of Surface Defectivity on the Performances

of Silicon Heterojunction Solar Cells. European Photovoltaic Solar Energy Conference, Sep 2019,

Marseille, France. �hal-02321708�

(2)

Commissariat à l’énergie atomique et aux énergies alternatives 17 rue des martyrs |38054 Grenoble Cedex

www-liten.cea.fr

UNDERSTANDING OF THE INFLUENCE OF THE SURFACE DEFECTIVITY ON SILICON HETEROJUNCTION CELL PERFORMANCE.

V.Giglia

a,b

, J.Veirman

a

, R. Varache

a

, E.Fourmond

b

Corresponding author: valentin.giglia@cea.fr

a) CEA, LITEN, Department of Solar Technologies, F-73375 Le Bourget du Lac, France b) Univ. Lyon, INSA-Lyon, INL UMR5270, F-69621 Villeurbanne, France

Commercially available bulk lifetimes ↑

Production tools throughputs ↑ Defectivity importance likely to increase

Conclusions:

Predict the influence of cell parameters on the performance losses (r, bulk lifetime).

Study the influence of defectivity properties (spatial distribution, location (BS/FS), size …).

Suggest ways to mitigate losses.

Combined experimental-modellisation approach.

Strong impact of surface defectivity mostly on FF according to [1].

The depassivated region high recombination rate induces a force increasing with the voltage towards itself leading to important FF losses.

Perspectives:

Necessary to quantify and understand the defectivity- induced efficiency (h) losses

Creation of a controlled defectivity protocol

Exp. Quantification of defectivity induced losses

Validation of the modelled structure

Identification of physical mechanisms

Experimental approach Simulation approach

Normalised Isc I(V) measurements Simulation results

0,925 0,950 0,975 1,000

Normalised FF

0 3 6 9

0,925 0,950 0,975 1,000

Normalised Efficiency

number of scratches 0 3 6 9

Normalised Voc number of scratches

 A scratch every 9 pitches (total c-Si surface depassivation).

 Choice of Busbarless metal scheme  easy scratch creation and facilitated simulation.

Protocol for the creation of a well- defined defectivity

 Controlled defectivity on busbarless cells:

 FF losses = 2/3 of efficiency losses.

 Good scratch-to-scratch repeatability.

 0.2% surface scratched = -6%relh !

 Good agreement experiments/simulation

 Quantification of defectivity- induced efficiency (h) losses

 Validation of the modelled 2D structure (ATLAS Silvaco)

 Physical mechanisms:

 Same defectivity distribution as the actual cells.

 Parametrization based on SHJ cells characterization.

 Defect: locally maximized Dit.

0 20 40 60 80 100 120 140 160

-0,7 -0,6 -0,5 -0,4 -0,1 0,0

Depassivated region effect Emitter effect

BS FS

BS

b) with a depassivated region

Increasing voltage

Jsc 0,3V 0,45V 0,49V 0,53V 0,57V 0,61V mpp 0,65V 0,69V 0,73V Voc

Depth (µm)

F,h(eV)

Increasing voltage a) without a depassivated region FS

Emitter effect

20 40 60 80 100 120 140 160 Depth (µm)

0,0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8

0 10 20 30 40

Without defectivity With defectivity

Voltage (V)

Curent density (mA/cm²)

Vt

c) I(V) comparision with or without a depassivated region

0 5 10 15 90 100

Relative J losses

Relative J losses (%)

 Minority charge carrier quasi fermi level𝜀 ,.

 Force applied on holes ≈ 𝛻𝜀,

Force towards the defect increasing with the voltage

On 10 cells : I(V) measurements after each scratch.

𝛻𝜀, profile in the c-Si at the short circuit working point (Jsc):

Vertical profile of 𝜀, from the c-Si front side FS to its back side BS.

The study of 𝜀 , explains the mechanisms behind the hlosses.

I(V) curves with and without a depassivated region

 Carriers photogenerated within the affected region (pink) recombine in the depassivated region.

 1,4% of carriers are lostJsc losses = 1,4%rel.

 The same analysis also holds for the other I(V) parameters losses (presented in the article).

Context of the study

Approaches used to carry out the study

Presentation of the study

c-Si

Allows to trust the code to investigate the mechanisms behind hlosses

Towards the back surface Electron contact layer

Hole contact layer

[5] O.Nos, “Quality control method based on photoluminescence imaging for the performance prediction of c-Si/a-Si:H heterojunction solar cells in industrial production lines”,2016, Solar Energy Materials and Solar Cells

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