GENERAL INSfRUMENT

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GENERAL INSfRUMENT

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M,icroelectronics,'

Data· CcltJtlog·

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PIJri Number Index Functional I ndex '

~ead

Only Memories Keyboard Encoder

Chara~

Generatol1!! .Spaecll ROMs

" ':,3. EleotrlcaJly"

, , , Alterable,'

Nori~Volatlle ' , Meinory/EANVM

: Electrically

A~ble,RElfd

Ooly MemQrles ,

including'lndustrial/MiII~ry

EAAOMs Non..vqlatll,EI Static RAM '

',,',:4~ IIlcrocompt.de",

, PIC'Seriee • PIC Development Series PICAt. .PICES n • ^{PIC Field} ^Demo ^8y'Slems

PIC Series Options _ PIC $eries.order Form

,::S.Audlo

Speech,Synthesls , " " - Sound Generation ,.

GENERAL INSTRUMENT CORPORATION Printed in U.S.A.

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"e.'Telephony:,""

" ' 0i~18rs a MUltl-F.requenqy:Gelterators ,Code'Converslon ,. Programable9iaJers'; , '

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! eo,nmunlc:alto ..

, UARd Devices _ Clocks , Appliances a,Remote,Control

',- 8.,ULAa

High Speed CMOS UncommlJ{ed

L~IC

Arrays (ULAs)',' , "

, e.,Vldeo,

Video DisPlay Video Graphics' , , Video Games

'10. 'Tuning .-

'TelevisiOn

Synthesizer/Counter' EAROM

, 1 t~ 'Qenerallnfonnatlo,l, ,,'

Company Profile Pa<:kage Outljnes '

Sales Offices

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.

The mformation in this publicatIOn, including schematiCs, is suggestive only. General Instrument Corporation does not warrant, nor will it be responsible or Ifable for, (a) the accuracy of such mformation, (b) its use or (c) any mfringement of patents or other rights 01 third parties,

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Index 1

Part Number Index 1-3

Functionallndex 1-4

(5)

1-2

(6)

PART

NUMBER PAGE

AY-3-1015D ... 7-4 AY-3-1270 ... 7-32 AY-3-1350 ... 5-22 AY-3-2012 ... 10-22 AY-3-4592 ... 2-42 AY-3-8211 ... 10-4 AY-3-8470 ... 7-42 AY-3-8475 ... 7-48 A Y -3-8500 ... 9-60 AY-3-8500-1 ... 9-60 AY-3-8603 ... 9-64 AY-3-8605 ... 9-65 AY-3-8606 ... 9-66 AY-3-8607 ... 9-68 AY-3-8610 ... 9-70 AY-3-8765 ... 9-72 AY-3-8900 ... 9-43 AY-3-8900-1 ... 9-43 AY-3-8910 ... 5-14,9-56 AY-3-8912 ... 5-14,9-56 AY-3-8913 ... 5-14,9-56 AY-3-8915 ... 9-57 AY-3-9400 ... 6-18 AY-3-9410 ... 6-18 AY-3-9710 ... 9-28 AY-3-9735 ... 9-33 AY-3-9900 ... 6-22 AY-5-8105 ... 10-44 AY-5-8116 ... 7-13 AY-5-8116T ... 7-13 AY-5-8136 ... 7-13 AY-5-8136T ... 7-13 AY-5-9151AlB ... 6-4 AY-5-9152/B ... 6-4 AY-5-9153A/B ... 6-4 AY-5-9154A ... 6-4 AY-5-9158 ... 6-11 AY-5-9559 ... 6-14 CK3300 ... 7-18 CP1610 ... 9-22 CT2010 ... 10-27 CT2017 ... 10-29 ECONOMEGA III. ... 10-8 ECONOMEGA IV ... 10-19 ER0082 ... 3-5 ER1400 ... 3-11,10-33

PART

NUMBER PAGE

ER1451 ... 3-8 ER2051 ... 3-14,10-48 ER20511R ... 3-14,10-48 ER2051 HR ... 3-14,10-48 ER2055 ... 3-17 ER20551R ... 3-17 ER2055HR ... 3-17 ER2810lR ... 3-28 ER2810HR ... 3-28 ER3400 ... 3-22 ER34001/iR ... 3-22 ER3400HR ... 3-22 ER5304 ... 3-48 ER5716 ... 3-32 ER57161R ... 3-32 ER5716HR ... 3-32 ER5816 ... 3-36 ER58161R ... 3-36 ER5816HR ... 3-36 ER5901 ... 3-20 ER59011R ... 3-20 ER5901HR ... 3-20 ER5916 ... 3-41 ER59161R ... 3-41 ER5916HR ... 3-41 LA03 ... 8-3 LA05 ... 8-3 LA10 ... 8-3 LA15 ... 8-3 LA20 ... 8-3 PFD SySTEMS ... 4-138 PIC16C55 ... .4-62 PIC16C63 ... 4-110 PIC1650-020 ... 10-33 PIC1650-536 ... 9-15 PIC1650A ... 4-4,9-9 PIC1650XT ... 4-16 PIC1654 ... .4-28 PIC1655A ... .4-38 PIC1655XT ... .4-50 PIC1656 ... 4-72 PIC1664 ... .4-96 PIC1665 ... 4-121 PIC1670 ... .4-85 PI CAL ... 4-32 PICES II ... 4-134

PART NUMBER INDEX

PART

NUMBER PAGE

RA-3-9600 ... 9-51

R09128B/C/D ... 2-28

R09160 ... 2-39

R09256 ... 2-31

R09432B/C/D ... 2-12

R09433B/C/D ... 2-14

R09464B/C/D ... 2-22

R09464AB/AC/AD ... 2-22

R09508 ... 2-34

R09580 ... 2-37

R09864B/C/D ... 2-25

R09864AB/AC/AD ... 2-25

RO-3-2513 ... 2-54

RO-3-9316A/B/C ... 2-4

RO-3-9316HR ... 2-4

RO-3-9332A/B/C ... 2-7

RO-3-9332HR ... 2-7

RO-3-9333B/C ... 2-10

RO-3-9333HR ... 2-10

RO-3-9364B/C ... 2-16

RO-3-9364HR ... 2-16

RO-3-9365B/C ... 2-19

RO-3-9502 ... 9-46

RO-3-9503 ... 9-49

RO-3-9504 ... 2-32, 9-54

SFD2000 ... 5-15

SP0232 ... 5-9

SP0250 ... 5-12

SP0256 ... 5-5

SP0256-AL2 ... 5-9

SPROOO ... 5-9

SPR016 ... 2-64

SPR032 ... 2-70

SPR128 ... 2-73

TELEVIEW SySTEM ... 9-4

TZ-2001 ... 6-30

TZ-2002 ... 6-30

TZ-2003 ... 6-30

VSM2032 ... 5-10

(7)

ROM 2

FUNCTION DESCRIPTION PART PAGE

NUMBER NUMBER

Read Only Memories

RO-3-9316A1B/C 2-4 16K ROM 16,384 bits organized 2048 x 8

RO-3-9316HR 2-4 RO-3-9332A/B/C 2-7 RO-3-9332HR 2-7 RO-3-9333B/C 2-10 32K ROM 32,768 bits organized 4096 x 8

RO-3-9333HR 2-10

R09432B/C/D 2-12

R09433B/C/D 2-14

RO-3-9364B/C 2-16 RO-3-9364HR 2-16 RO-3-9365B/C 2-19

64K ROM 65,536 bits organized 8192 x 8 R09464B/C/D 2-22

R09464ABI ACI AD 2-22 R09864B/C/D 2-25 R09864AB/AC/AD 2-25

128K ROM 131,072 bits organized 16,384 x 8 R09128B/C/D 2-28

256K ROM 262,144 bits organized 32,768 x 8 R09256 2-31

20K CARTRIDGE

20,480 bits organized 2048 x 10 RO-3-9504 2-32

ROM 40K CARTRIDGE

40,960 bits organized 4096 x 10 R09508 2-34

ROM 80K CARTRIDGE

81,920 bits organized 8192 x 10 R09580 2-37

ROM 160K CARTRIDGE

163,840 bits organized 16,384 x 10 R09160 2-39

ROM

Keyboard Encoder

CAPACITIVE

4,592 bits organized as 112 keys x 4 modes x 10 bits, plus 112 bits for

KEYBOARD AY-3-4592 2-42

ENCODER Internal programtng of function keys

Character Generators

CHARACTER 2,560 bits organized a 64-5 x 8 characters RO-3-2513 2-54

GENERATOR 16,384 bits organized as 2048-8 bit words RO-3-9316CGII 2-59

Speech ROMs

SERIAL 16,384 bits organized 2048 x 8 SPR016 2-64

SPEECH 32,768 bits organized 4096 x 8 SPR032 2-70

ROM 131,072 bits organized 16K x 8 SPR128 2-73

'-4

(8)

EANVM 3

FUNCTION DESCRIPTION PART PAGE

NUMBER NUMBER

Electrically Alterable Non-Volatile Memory

82 BITEAROM 82 bits organized 82 x t ER0082 3-5

700 BIT

700 bits organized 50 x 14 ER1451 3-8

SERIAL EAROM

1400 BIT 1400 bits organized 100 x 14 ER1400 3-11

SERIAL EAROM

ER2051 3-14

512 BIT EAROM 512 bits organized 32 x 16 ER20511R 3-14

ER2051HR 3-14 ER2055 3-17

512 BIT EAROM 512 bits organized 64 x 8 ER20551R 3-17

ER2055HR 3-17

ER5901 3-20

lK N-CHANNEL 1 K bits organized 128 x 8 ER59011R 3-20

EEPROM

ER5901HR 3-20

ER3400 3-22

4096 BIT EAROM 4096 bits organized 1024 x 4 ER34001liR 3-22

ER3400HR 3-22 ER2810lR 3-28 8192 BIT EAROM 8192 bits organized 2048 x 4

ER2810HR 3-28 ER5716 3-32 16K N-CHANNEL

16K bits organized 2048 x 8 ER57161R 3-32

EEPROM

ER5716HR 3-32

ER5816 3-36

WORD ALTERABLE Electrically word alterable 16K bits organized 2048 x 8, 5V operation," read mode ER58161R 3-36 16K BIT EEPROM

ER5816HR 3-36 ER5916 3-41 WORD ALTERABLE

Electrically word alterable 16K bits organized 2048 x 8, 5V operallon '" all modes ER59161R 3-41 16K BIT EEPROM

ER5916HR 3-41

Non-Volatile Static RAM

4K N-CHANNEL

NON-VOLATILE 4K bits organized 512 x 8 ER5304 3-48

STATIC RAM

(9)

Microcomputer 4

NUMBER NUMBER

PIC Series

PIC1650A 4-4 PIC1650XT 4-16 PIC1654 4-28 BBIT The PICI650 series of microcomputers contain RAM 1/0 and a central processing PIC1655A 4-38 MICROCOMPUTER Unit as well as a customer defmed ROM to specify overall functional characteristics

PIC1655XT 4-50 of the device

PIC16C55 4-62 PIC1656 4-72 PIC1670 4-85

PIC Development Series

8BIT PIC1664 4-96

DEVELOPMENT PIC mIcrocomputer wIthout ROM and wIth addition of a HALT pin. PIC16C63 4-110 MICROCOMPUTER

PIC1665 4-121

PICALIPICES U

PIC ASSEMBLER Converts symbohc source programs for PIC series Into object code PICAL 4-132 PIC DEVELOPMENT

In-ctrcUlt emulalton and debug system-stand alone or peripheral. PICESD 4-134 SYSTEM

PIC Field Demo Systems

PIC FIELD DEMO Contains PIC microcomputer, PROMs and provIsIons for on-board RC oscIllator or PFD 4-138

SYSTEMS external clock Systems

Audio 5

NUMBER NUMBER

Speech Synthesis

SP0256 5-5

NARRATOR~

Nalural speech, stand alone operatIon, wIde operatIng voltage, expandable ROM, SP0256-AL2 5-9 SPEECH

PROCESSOR SImple Interface. SP0232 5-9

SPROOO 5-9

VOICE SYNTHESIS Complete speech system, 16 seconds of speech, custom vocabularies, SImple

VSM2032 5-10 MODULE Interface, 5V operatIon

SPEECH High quahly speech, programmable fIlter, 5V operatIon, SImple Interface, double

SP0250 5-12

SYNTHESIZER buffered Input.

SPEECH FIELD

DEVELOPMENT 5V operatIon, expandable EPROM, multiple speech syntheSIS, on-board oscillalor. SFD2000 5-15 BOARD

Sound Generation

PROGRAMMABLE AY-3-8910 5-18

SOUND Full software control, 5V operation, simple Interface, triple analog output, general AY-3-8912 5-18 purpose I/O ports.

GENERATOR

AY-3-8t13 5-18 TUNES

Produces musical tunes from pre-programmed mIcrocomputer AY-3-1350 5-24 SYNTHESIZER

1-6

(10)

Telephony 6

NUMSER NUMBER

Dialers

AY·S·91S1A1B 6·4

PUSHBUTTON AY·S·91S2/B 6·4

TELEPHONE Converts pushbutton Input to rotary dial pulses.

DIALERS AY·S·9153A1B 6·4

AY·S·91S4A 6·4 LOOP DISCONNECT

Pushbutton·rotary dial converter with re·dial. AY·S·91S8 6·11 DIALER

MULTI·FREQUENCY

Dialer with dual tone. AY·S·9SS9 6·14

DIALER

Multi-Frequency Generators

DUAL TONE AY·3·9400 6·18

MULTI·FREQUENCY Generates DTMF/tone telephone frequencies.

GENERATORS AY·3·9410 6·18

Code Conversion

CODEC Duplex Delta·Sigma/PCM converter. AY·3·9900 6·22

Programmable Dialers

PROGRAMMABLE TZ·2001 6·30

MICRO·COMPUTER

Single chip microcomputer pre·programmed for in·telephone applications. TZ·2002 6·30 TELEPHONE

DIALERS TZ·2003 6·30

Data Communications 7

NUMBER NUMBER

UAR/T Devices

UAR/T Complete 5·8 bit receiver/transmitter interface. AY·3·101SD 7·4

AY·S·8116 7·13

DUAL BAUD AY·S·8116T 7·13

RATE GENERATORS 16 Frequency, UART /USRT compatible.

AY·S·B136 7·13 AY·S·B136T 7·13

Clocks

4 DIGIT

12124 Hour clock, 24 hour alarm, sleep timer, battery standby. CK3300 7·1B CLOCK RADIO

Appliances

DIGITAL

Digital thermometer and temperature controller. AY·3·1270 7·32

THERMOMETER

Remote Control

REMOTE CONTROL

256 Command PCM infrared transmitter. AY·3·8470 7·42

TRANSMITTER REMOTE CONTROL

256 Command PCM infrared receiver. AY·3·847S 7·48

RECEIVER

(11)

ULAs 8

NUMBER NUMBER

Uncommitted Logic Arrays

LA03 8·3

HIGH SPEED CMOS LA05 8·3

UNCOMMITTED Single mask, Sns gate delay, single supply voltage, CMOS technology,

LA10 8·3

on-chip power-on reset.

LOGIC ARRAYS

LA15 8·3

LA20 8·3

Video 9

NUMBER NUMBER

Video Display

TELEVIEW System 9·4

PIC1650A 9·9 TELEVIEW SYSTEM The Teleview system IS a powerful system to display Information on a TV receiver. PIC1650·536 9·15

It can store data from Bither telephone Imes or TV RF signal information.

AY·3·9710 9·28 AY·3·9735 9·33

Video Graphics

G~n~r~I ___ ~ 9·42 Informallon CP1610 9·22 AY·3·8900 9·43 AY·3·8900·1 9-43 RO·3·9502 9-46 PERSONAL The 8900 system IS a programable video display system, capable of detailed graphics RO·3·9503 9-49

TERMINAL definition and manipulation RO·3·9600 9·51

RO·3·9504 9·54 AY·3·8910 9·56 AY·3·8912 9·56 AY·3·8913 9·56 AY·3·8915 9·57

Video Games

-

_AY·3·8500 _9·60

BALL & PADDLE Six selectable gam~s for one or two players, with vertical paddle motion

AY·3·8500·1 9·60 8600 SERIES The 8600 series games consist of a set of single chip TV game integrated circuits. General

9·63 Information ROADRACE One or two player games where racing skill in "traffic" generates the highest score. AY·3·8603 9-64

WARFARE One or two player games featuring subs, destroyers, cargo ships, and spaceships. AY·3·8605 9-65 WIPEOUT One or two player games where players "wipe out" objects by controlling a ball in

AY·3·8606 9·66 the play area.

SHOOTING

Twelve games for one or two players using external photocell rifles for shooting. AY·3·8607 9·68 GALLERY

SUPERSPORT Ten selectable games for one or two players, with vertical and horizontal

AY-3·8610 9·70 paddle motion.

MOTOR CYCLE One player cycle game with variable skill selection. AY·3·8765 9·72

1·8

(12)

Tuning 10

NUMBER NUMBER

Television

ECONOMEGA IIA

DIGITAL TUNING Provides electronic control of a varactor tuned TV from keyboard entry. AY-3-8211 10-4 SYSTEM

FREQUENCY

LOCKED LOOP Provides frequency locked loop tuning in radio, TV applications. ~III 10-8 TUNING SYSTEMS

PHASED LOCKED Economega IV 10-19

LOOP TUNING

Provides PLL frequency synthesis for color TV tuning. AY-3-2012 10-22 SYSTEM

SYNTHESIZER CT2010 10-27

CT2017 10-29

PHASED LOCKED PIC16S0-020 10-33

LOOP TV TUNING Provides control and Interface for PLl television tuning

SYSTEM CONTROL ER1400 10-33

Synthesizer/Counter

FREQUENCY

SYNTHESIZERI Provides a time base for frequency synthesizer counting. AY-S-810S 10-44 COUNTER

EAROM

ER20S1 10-48

512 BIT EAROM 512 bIts organized 32 x 16. ER20S11R 10-48

ER20S1 HR 10-48

(13)

1-10

(14)

FUNCTION

16K ROM

32KROM

64KROM

12SKROM 256KROM 20K CAAmiOGE

ROM 40K CARTRiDGE

ROM 80K CARmlOGE

ROM lOOK CARTRiDGE

, ROM

CAPACITIVE KEYBOARD

ENCODER

:: ' ^,

CHARACTER G!;NEBATOR

SERIAL SPEECH ROM

DESCflIPTfON

16.384 bits organized

204a

x S.

"

32,768 blt& organized 4096)( 8

6S.536 bits,organlzed 8~92" 8

131,012 bitS organIZed 11$,384 x 8 262.144 blt$ organized $2.768 x 8 20,460 bit& organiZed 2048 x 10 40.960 bit& organized 4~,~ 10 81.920 bits organl<:ed 81'92x 10 163.840 bits <»:\l3nized 16.384 x 10

ROM 2

Read Only Memories Keyboard Encoder Character Generators Speech ROMs

2-3 2-41 2-53 2-63

,~,

:PART PAGE

NUM8ER NUM8ER

, R~d Only M.emories.

~16A/81C ^2-4 RO.s..9316HR ,2-4

E

^',~'7

' ,

2-7

,2-10 '2·10 2-12

~3IIICID 2-)4

~

^1*16^2·16

Rd"~·93658IC 2-19 ,R0

94&4al

^ClD ^2-22

,

,Aoeas4A~ACIAD l

^~.2S^2-22^2-25

1I~1+8jClD 2·D

R0906', 2-31

II~~ 2-32

"

1'109508. '

" 2.34

:

1109580 ',~~7

ROO1,~0 '~::f9

Keyboard EnCoder

4.592 bits ~)(gani%ed as 112k$}'S x 4 modes x lObits, plus 112 bits for

internal programing of fun"tioo keys. ' , AY-3-4592 2-42 .

, ^Character ,GeneratorS

I

^2,560^bits'organized a

64-5

x 8 characters

f

110-3:4513

t~

I

16,384 bits organized 8$ 2048-8, bit words

" I

RO-W31&CG1I

:t;:p Speech ROMs

16.384 bits

or9ani~

2048 x

it

SfIR01S 2-84

32,7iia bitS, orgMlZed 4008 x ,8

.

^SPROa2

^2;-70

131,072 bi,tsorQal)iZed 16K x a $PR128 2-73

(15)

2-2

(16)

., ... ' :161< ROM

i . ' " . ' ., "

,'32KRPM

:;,<, / .

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GENERAL INSfRUMENT

Read Only Memories

ODCRIPTION IIIUMIilER ^PART , NUMIIIER ' ^PAGe:

RQ.M316AIlillC ,2-4 . fIO..I.!I316HR 11;4 16,364 bits Ol'!/lIniZed 2048 x 8

RO+9332AlBlC ^!~-1 , Rq.3·9331IHR 2-1 RO+SW8/C' 2·10 '.

, '. ROII8648/CIO

RCmGO' •. ,.'

(17)

R0-3·9316A1B/C RO·3·9316 HR

16,384 Bit Static Read Only Memory

FEATURES

• 2048 x 8 Organization - Ideal for Microprocessor Memory Systems

• Single +5 Volt Supply

• TTL Compatible - All Inputs and Outputs

• Static Operation - No Clocks Required

• 850ns Maximum Access Time: R0-3-9316A

• 450ns Maximum Access Time: RO-3-9316B

• 350ns Maximum Access Time: RO-3-9316C

• Three-State Outputs - Under the Control of Three Mask-Programable Chip Select Inputs to Simplify Memory Expansion

• Totally Automated Custom Programing

• Zener Protected Inputs

• Glass Passivation Protection

• Pin Compatible With 2716 16K EPROM DESCRIPTION

The General Instrument RO-3-9316 is a 16,384 static Read Only Memory organized as 2048 8-bit words and is ideally suited for microprocessor memory applications. Fabricated in the General Instrument N-Channellon Implant process to enable operation from a single +5 Volt power supply, the RO-3-9316 offers the best combination of high performance, large bit storage and simple Interfacing.

BLOCK DIAGRAM

2-4

AD AI A2 A3 A4 A5 A6 A7 AS A9 AID

CS I CS2 CS3

ADDRESS INPUT BUFFERS

CHIP SELECT

INPUT BUFFERS

Vee

ADDRESS DECODE

CHIP SELECT DECODE

PIN CONFIGURATION 24 LEAD DUAL IN LINE

GND

MEMORY MATRIX 2048 X 8

"'7

M AS At 103 M.

Al NJ 01 02 00

GNO " - -_ _ ....J

OUTPUT BUFFERS

Vcc(+5V) M loB CS3 CSl Al0 CS2

os

05 04

0) 02 03 04 05 06 07 08

(18)

ELECTRICAL CHARACTERISTICS Maximum Ratings"

Vcc and input voltages (with respect to GND) . . . . -0.3V to +8.0V Storage Temperature . . . -65°C to +l50°C

Standard Conditions (unless otherwise noted) Vcc=+5 Volts ±5%

Operating Temperature (TA) = O°C to +70°C (HR: TA = -55°C to +125°C) Output Loading: One TTL load, CLTOTAL= 100pl

R0-3-9316A1B/C • R0-3-9316HR

*

Exceeding these ratings could cJluse permanent dam- age to the device. This Is a strass rating only and lunc- tlonal operation 01 this device at these conditions Is not Implied-operating ranges are specilied in Standard Conditions. Exposure to absolute maximum rating conditions lor extended periods may affect device reliability.

Data labeled "typical"ls presented lor design guidance only and is not guaranteed.

R0-3-9316A1B1C • R0-3-9316HR

Characteristic Sym Min Typ" Max Units Conditions

DC CHARACTERISTICS Address, Chip Select Inputs

Logic"l" VIH 2

- -

V

Logic "0" VIL

- -

0.8 V

Leakage III

- -

10 p.A

Data Outputs

Logic "1" VOH 2.4

- ^-

^V IOH=-l00pA

Logic "0" VOL

- -

0.4 V 10L =1.6mA

Leakage ILO

- ^-

¹⁰ ^p.A

Power Supply Current

RO-3-9316A Icc

-

50 85 mA Outputs open

RO-3-9316B Ice

-

⁶⁵ ¹¹⁵ ^mA Outputs open

RO-3-9316C Ice

- -

¹²⁵ ^mA Outputs open

R0-3-9316A • RO-3-9316AHR AC CHARACTERISTICS

Address, Chip Select Inputs

Cycle Time tc 800

- -

^ns

Capacitance C1

-

⁵ ⁸ ^pi ^{F= lMHz}

C1

-

⁸ ¹⁰ ^pi F = 1MHz; R0-3-9316AHR onl

Data Outputl

Access Time tACC

-

⁶⁰⁰ ⁸⁵⁰ ^ns

Chip Select Response Time tR

-

²⁰⁰ ³⁰⁰ ^ns

Capacitance Co

-

⁸ ¹⁰ ^pi ^{F= lMHz}

RO-3-9316B • RO-3-9316BHR AC CHARACTERISTICS

Addres., Chip Select Inputs

Cycle Time tc 400

- -

^ns

Capacitance C1

-

⁵ ⁸ ^pi ^{F= lMHz}

C1

-

⁸ ¹⁰ ^pi F = lMHz; R0-3-9316BHR onl

Data Outputs

Access Time tAce

-

³⁵⁰ ⁴⁵⁰ ^ns

-

¹⁰⁰ ²⁰⁰ ^ns

Capacitance Co

-

⁸ ¹⁰ ^pi ^F=lMHz

R0-3-9316C • R0-3-9316CHR AC CHARACTERISTICS

Address, Chip Select Inputl

Cycle Time tc 300

- -

^ns

Capacitance C1

-

⁵ ⁸ ^pi ^F=lMHz

y

C1

-

⁸ ¹⁰ ^pi F= lMHz; R0-3-9316CHR onl y

Data Output.

Access Time tAce

-

²⁵⁰ ³⁵⁰ ^ns

-

¹⁰⁰ ²⁰⁰ ^ns

Capacitance Co

-

⁸ ¹⁰ ^pi ^F=lMHz

""Typical Values are at +25°C and nominal voltages

(19)

IIN~~I

R0-3-9316A1B/C • RO-3-9316HR TYPICAL SYSTEM APPLICATION

A complete system of 16K words of ROM (8 bits/word) is easily obtamed without any external address decoding by making use of programable chip select features and by wiring the outputs of eight different RO-3-9316 as shown in the figure below.

ADDRESS BUS (AO-AID) CHIP SELECT BUS

(eS 3 -CSt)

* T T 1 1

1 I 1 I f I 1 I

000 001 010 011

RQ-3-9316 RO-3-9316 RO-3-9316 RO-3-9316

16K 161K 162K l63K

I 1 1 1

*

^UTILIZEDAS ADDRESSES All-AI!

TIMING DIAGRAMS

'::~Ol! ~

DATA OUTPUTS

CHIP SELECT TABLE DEVICE CS3 CS2 CS1 SELECTED

0 0 0 16KO

0 0 1 16K1

0 0 16K2

0 16K3

0 0 16K4

0 1 16K5

0 16K6

16K7

I T 1

1 I ^r I f I

100 101 110

RO-3-9316 RO-3-9316 RO-3-9316

164K 16SK l66K

1 1 1

Ie _lace

X

^V1H^V1L

>t

^2.2^.6

ACCESS TIME (ADDRESS TO OUTPUT -CHIP SELECTED)

CHIP

NOT

)<

^SELECTED

)}><

^NOT ^VIH

SELECT SELECTED (AS PROGRAM ED) SELECTED

INPUTS . V1L

--

^tR

^{I -} --

^tR

^r---

DATA OUTPUTS OUTPUTS OUTPUTS 2.2

OUTPUTS HIGH IMPEDANCE VALID _IMPEDANCEHIGH .6 CHIP SELECT RESPONSE TIME (ADDRESS INPUTS STABLE)

2-6

I I

111 RO-3-9316

167K

1

OUTPUT BUS

(0. -Oal

(20)

RO-3-9332A/B/C R0-3-9332HR

32,768 Bit Static Read Only Memory

FEATURES

• 4096 x 8 Organization - Ideal for Microprocessor Memory Systems

• 850ns Maximum Access Time: RO-3-9332A

• Three-State Outputs - Under the Control of Two Mask- Programable Chip Select Inputs to Simplify Memory Expansion

• Glass Passivation Protection

• Pin Compatible With 2532 EPROM

• Extended Temperature Ranges DESCRIPTION

The General Instrument RO-3-9332 is a 32,768 static Read Only Memory organized as 4096 eight bit words and is ideally suited for microprocessor memory applications. Fabricated in the General Instrument N-Channel Ion Implant process to enable operation from a single +5 Volt power supply, the RO-3-9332 offers the best combination of high performance, large bit storage, and simple interfacing of any MOS Read-Only Memory available today.

BLOCK DIAGRAM

AO AI A2 A3 A4 A5 A6 A7 AS A9 AIO All CSI CS2

..-

.?

..-

, ,

"-

CHIP SELECT

INPUT BUFFERS

Vee

f

~ ADDRESS

DECODE

CHIP

~ SELECT

DECODE

Top View

A7[

.'

^{' - /} ²⁴^::JVee (+5VJ A6[ 2 23 J AS

A5[ 3 22 JA9

A4[ 4 21 JCS2 A3 [ 5 20 J CS1 A2[ 6 19 :J Al0 A1 [ 7 18 :JA11 AO[ 8 17 J 08 01 [ 9 16 J07 02 [ 10 15 J 06 Ol[ 11 14 J 05 GND[ 12 13 J 04

GND

f

r- ^- _- ~

~

MEMORY

-

~ MATRIX

----?I

^OUTPUT

-

~

BUFFERS

4096 X 8

-

- ~

-

01 02 03 04 05 06 07 08

(21)

I~

R0-3-9332A1B/C • RO-3-9332HR ELECTRICAL CHARACTERISTICS

Maximum Ratings

*

Vcc and Input voltages (with respect to GND) . . . . -0.3V to +8.0V

Storage Temperature . . . -65·C to +150·C

Standard Conditions (unless otherwise noted) Vee = +5 Volts ±10%

Operating Temperature (T.) = O·C to +70·C (HR:

'r

A = -55· C to +125· C) Output Loading: Two TTL Loads, CL TOTAL = 100pf

*

Exceeding these ratings could cause permanent dam- age to the device. This Is a stress rating only and functional operation of this device at these conditions is not implied-operating ranges are specified In Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Data labeled "typical" is presented for design guidance only and is not guaranteed.

R0-3-9332A1B • RO-3-9332HR

Characteristic Sym Min Typ" Max

DC CHARACTERISTICS Address, Chip Select Inputs

Logic "'1" VIH 2

- -

LogiC "0" VIL

- -

^0.8

Leakage III

- -

10

Data Outputs

LogiC "1" VOH 2.4

- -

LogiC "0" VOL

- -

0.4

Leakage ILO

- -

10

RO-3-9332A Icc

- -

80

RO-3-9332BHR Icc

- -

125

RO-3-9332C Icc

- -

¹⁴⁰

R0-3-9332A AC CHARACTERISTICS

Cycle Time tc 800

- -

Capacitance C,

-

5 8

Data Outputs

Access Time tACC

-

600 850

Chip Select Response Time TR

-

200 300

Capacitance Co

-

8 10

Cycle Time tc

Capacitance C,

C, Data Outputs

Access Time tACC

Capacitance Co

AC CHARACTERISTICS Address, Chip Select Inputs

Cycle Time tc

Capacitance

e,

Data Outputs

Access Time t ACC

Capacitance Co

* See Timing Diagram

·*Typical Values are at +25·C and nominal voltages 2-8

450

- -

-

⁵ ⁸

-

⁸ ¹⁰

-

350 450

-

¹⁰⁰ ²⁰⁰

-

⁸ ¹⁰

R0-3-9332C

300

- ^-

-

⁵ ⁸

-

²⁵⁰ ³⁵⁰

-

¹⁰⁰ ²⁰⁰

-

⁸ 10

Units Conditions

V V p.A

V IOH=-2OOpA

V IOL = 3.2mA p.A

mA Outputs open

ns

pf F= 1MHz

ns VOH = 2.20V*

ns

pf F= 1MHz

ns

pf F=1MHz

pf F = 1 MHz; RO-3-9332BHR onl y

ns VoH =2.20V*

ns

pf F= 1MHz

ns

pf F= 1MHz

ns ns

pf F= 1MHz

(22)

TIMING DIAGRAMS

RO·3·9332A1B/C • RO·3·9332HR

A?Z~0~§ ~r-, ~_.~_-_-_-_~-_~I_e

^__- -_ -_ -_

-_-){---i '--___ <::

~

^loee

---->t----1

⁰ ^' ^{2 .. :}

DATA OUTPUTS

ACCESS TIME (ADDRESS TO OUTPUT-CHIP SELECTED)

CHIP NOT ISJ~Gg SELECTED

DATA OUTPUTS OUTPUTS HIGH IMPEDANCE

" f - - - .

VIL

HIGH l'---JiIMPEDANCE

2.2 .6 CHIP SELECT RESPONSE TIME (ADDRESS INPUTS STABLE)

IIN~l;~~ I

(23)

R09333B/C R09333HR

32,768 Bit Static Read Only Memory

FEATURES

• 4096 x 8 Organization - Ideal for Microprocessor Memory

Systems '

• Pin Compatible With 2732 EPROM

• 350ns Maximum Accent Time: RO-3-9333C

• Extended Temperature Range

• Three State Outputs - Under the Control of Two Mask- Programable Chip Select Inputs to Simplify Memory Expansion

• Glass Passivation Protection DESCRIPTION

The General Instrument RO-3-9333 is a 32,768 bit static Read Only Memory organized as 4096 eight bit words and Is Ideally suited for microprocessor memory applications. Fabricated In the General Instrument N-Channellon Implant process to enable operation from a single +5 Volt power supply, the RO-3-9333 offers the best combination of high performance, large bit storage, and simple interfacing of any MOS Read-Only Memory available today.

2-10

BLOCK DIAGRAM

AO

AI A2 A3 A4 A5 A6 A7 A8 A9

AIO

All

CSI CS2

....

'"

....

, ,

ADDRESS INPUT BUFFERS

CHIP SELECT

INPUT BUFFERS

Vee

i

~ ^ADDRESS ^DECODE

CHIP

~

SELECT

DECODE

~

"7

All AS M

01 02 03

GND

1 MEMORY

MATRIX ~ ^BUFFERS ^OUTPUT

4096 X B

Vee ("'SV) All AS A11 CS1

08

t- ~

t-

t- ~

t-

t- ^r- _- ~

~

-

01 02 03 04 05

06

07

08

(24)

ELECTRICAL CHARACTERISTICS Maximum Ratings

*

RO-3-9333B/C • RO-3-9333HR

IINs&D~MI- I

Vcc and input voltages (with respect to GND) -0.3V to +8.0V

*

Exceeding these ratings could cause permanent dam- age to the device. This is a stress rating only and functional operation of this device at these conditions is not implied-operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Storage Temperature -65° C to +150° C

Standard Conditions (unless otherwise noted) Vee = +5 Volts ±10%

Operating Temperature (T.) = O°C to +70·C (HR: TA = -55°C to +125°C) Output Loading: Two TTL Loads, CL TOTAL = 100pf

R0-3-9333B/C • RO-3-9333HR

Characteristic Sym Min Typ" Max

DC CHARACTERISTICS Addre •• , Chip Select Inputa

LogiC "1" V

,H

²

-

^-

Logic "0" V,L -

-

^0.8

Leakage III

-

^- 10

Data Outputs

LogiC "1" VOH 2.4

-

^-

LogiC "0" VOL

- -

0.4

Leakage ILO - - 10

RO-3-9333B Icc

- -

125

RO-3-9333BHR Icc

- -

120

RO-3-9333C Icc

- -

¹⁴⁰

Cycle Time te 450

- ^-

Capacitance C,

-

5 8

C,

-

⁸ ¹⁰

Data Outputs

Access Time tAye

-

350 450

-

100 200

Capacitance Co

-

⁸ 10

RO-3-9333C AC CHARACTERISTICS

Cycle Time tc 300

- -

Capacitance C,

-

⁵ ⁸

Data Outputs

Access Time tAce

-

250 350

Chip Select Response Time IR

-

100 200

Capacitance Co

-

8 10

* See Timing Diagram

**TYPlcal values are at +25° C and nominal voltages

TIMING DIAGRAMS

A?Z~0f~ ----J:f..~-~---~~--~t-e----:--~x--i ^'--__

DATA OUTPUTS Units

V V IJ.A

V V IJ.A mA mA mA

ns pf pf ns ns pf

ns pf ns ns pI

DATA OUTPUTS

~t--=~---- ^taee ---->t~.-il ^2.:

OUTPUTS HIGH IMPEDANCE

Conditions

IOH=-200pA IOL = 3.2mA

Outputs Open Outputs Open Outputs Open

F=IMHz

F= lMHz; RO-3-9333BHR only VoH=2.20V*

F= lMHz

F

=

lMHz Vo~2.20V*

F

=

^lMHz

VIH

1"---.

VIL 2.2

l'---'TIIMP~b~~CE

.6 ACCESS TIME (ADDRESS TO OUTPUT-CHIP SELECTED) CHIP SELECT RESPONSE TIME (ADDRESS INPUTS STABLE)

(25)

R09432B/C/O

32,768 Bit Static Read Only Memory

FEATURES

• 4096 x 8 Organization

• Fully Static Operation-No Clocks Required

• Single +5V ± 10% Supply

• 450ns Access Time: R09432B 300ns Access Time: R09432C 200ns Access Time: R09432D

• Inputs and Outputs TTL Compatible

• Three State Outputs-Under the Control of Two Mask Programable Chip Select Inputs

• Output Drive Capability of 2 TTL Loads and 100pf Low Power Dissipation

Totally Automated Custom Programing

• All Iflputs Protected Against Static Charge

• Pin Compatible With 2532 EPROM DESCRIPTION

The R09432 is a 32,768 bit fully static Read Only Memory utilizing MOS N-Channel Silicon Gate Ion Implanted technology. It is organized 4096 words by 8 bits and operates from a single +5 Volt

BLOCK DIAGRAM

AO A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A1l

2-12

CHIP SELECT

INPUT BUFFER

ADDRESS DECODE

CHIP SELECT DECODE

PRELIMINARY INFORMATION

A7 Vee (+SV)

AS A9 CS2/CS2

A3 CS1/CS1

A2 A,O

A11

AD 08

0, 07

02 06

03 05

GNO 04

power supply with ±10% supply tolerance. All inputs are TTL compatible, and the three-state outputs can drive 2 standard TTL loads each.

GND

MEMORY MATRIX 4096 x 8

OUTPUT BUFFERS

01 02 03 04 05 06 07 08

(26)

ELECTRICAL CHARACTERISTICS Maximum Ratlngs*

R09432B/C/D

I~

Vcc and Input Voltages (with Respect to GND) ... -0.5V to +7.0V * Exceeding these ratings could cause permanent dam- age to the device. This is a stress rating only and functional operation of this device at these conditions is not implied-operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Storage Temperature ..•..•...•.•...•... -65· C to +150· C Standard Conditions (unless otherwise noted):

Vcc = +5V

±

10%

Operating Temperature TA = O·C to +70·C Output Loading: Two TTL Loads + CL TOTAL = lOOp!

DC CHARACTERISTICS

Characteristics Sym Min Typ Max Units Conditions

Input Low Voltage V,L -0.5

-

0.8 V

Input High Voltage V,H 2

-

Vcc V

Input Load Current I'L

-

10 pA V

,N =

0 toVcc

Output Low Voltage VOL

- -

^0.40 ^V ^10L

⁼

^+3.2mA

Output High Voltage VOH 2.4

-

Vcc V 10H

=

-200pA

Output Leakage Current ILO - - 10 pA VOUT

=

OV to Vcc

Power Supply Current Icc

- -

100 mA All Inputs +5.5V ,Outputs Unloaded

AC CHARACTERISTICS R09432B R09432C R09432D

Characteristics Sym Min Max Min

Address Access Time t ACC

-

450

-

Chip Select to Output Delay Time tco

-

100

-

Chip Deselect to Output Float Time tDF

-

75

-

Previous Data Valid After

Address Change tOH 20

-

20

Capacitance

*

Input Capacitance C

'N -

7 -

Output Capacitance COUT - 10

-

• Not tested 100%

AC TEST CONDITIONS

Input Pulse Levels ... O.BV to 2.2V Input Rise and Fall Times ...•...•... 20 ns Timing Measurement Levels'

Inpur ... 1.5V Output ... O.BV and 2.0V Output Load ... 2 TTL Loads +100pl (See Figure 1)

TIMING DIAGRAM

Max Min Max Units Conditions

300

-

200 ns

100

-

75 ns

75

-

75 ns

-

20

-

ns

7

-

7 pi TA

=

25·C, F

=

lMHz 10

-

10 pi TA

=

^{25·C, F}

=

^lMHz

CONDITIONS OF TEST FOR AC CHARACTERISTICS

VPULL-UP

Rlo,~

OUTPUT PAD

ADDRESS INVALID

¥

INPUTS CHIP

I

__________

~---"'----V-A-L-ID---~~---I-N-V-A-L1-D----

^{____ __}

SELECT DISABLED INPUTS

DATA

I

OUTPUTS HIGH

IMPEDANCE

I.

^{. .}----tACC---I~

DEFINITIONS Access Time, TAcc

Access time IS the maximum time between the application of a valid Address and the corresponding Data Out.

Output Hold Delay, T OH

Output hold delay is the minimum time after an Address change that the previous data remains valid.

Output Enable Time, T co

Output enable time is the maximum delay between Chip Selects becoming true and Output Data becoming valid.

Output Disable Time, T DF

Output disable time IS the delay between Chip Selects becoming false and output stages going to the high impedance state.

(27)

R09433B/C/D

32,768 Bit Static Read Only Memory

FEATURES

• Fully Static Operation-No Clocks Required

• Single +5V

±

10% Supply

• 450ns Access Time: R09433B

• 300ns Access Time: R09433C

• 200ns Access Time: R09433D

• Inputs and Outputs TTL Compatible

• Three State Outputs-Under the Control of Two Mask Programable Chip Select Inputs

• Output Drive Capability of 2 TTL Loads and 100pf

• Low Power Dissipation

• All Inputs Protected Against Static Charge

• Pin Compatible With 2732 EPROM DESCRIPTION

The R09433 is a 32,768 bit fully static Read Only Memory utilizing MOS N-Channel Silicon Gate Ion Implanted technology. It is organized 4096 words by 8 bits and operates from a single +5 Volt

BLOCK DIAGRAM

AD A1 A2 A3 A4 A5 A6 A7 AS A9 A10 A11

2-14

CHIP SELECT

INPUT BUFFER

ADDRESS DECODE

CHIP SELECT DECODE

PRELIMINARY INFORMATION

A7 Vee (+5V)

A6 A8

AS A9

A4 Al1

A3 CS1/CS1

A2 A10

A1 CS2/CS2

AO 08

01 07

02 06

03 05

GND 04

power supply with ± 10% supply tolerance. All inputs are TTL compatible, and the three-state outputs can drive 2 standard TTL loads each.

GND

MEMORY MATRIX 4096 x 8

OUTPUT BUFFERS

01 02 03 04 05 06 07 08

(28)

ELECTRICAL CHARACTERISTICS Maximum Ratings

*

R09433B/C/D

INsr~~

Vcc and Input Voltages (with Respect to GND) ... -0.5V to +7.0V

*

Exceeding these ratings could cause permanent dam- age to the device. This is a stress rating only and functional operation of this device at these conditions is not implied-operating ranges are specified In Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Data labeled "typical" Is presented for design guidance only and is not guaranteed.

Storage Temperature ... -65°C to +150°C Standard Conditions (unless otherwise noted):

Vcc = +5V

±

10%

Operating Temperature TA1 = 0° C to +70°C Output Loading: Two TTL Loads, C l TOTAL = 100pf

DC CHARACTERISTICS

Characteristics Sym

Address, CHIP SELECTS Inputs

Logic "1" VIH

Logic "0" Vil

Leakage III

Data Outputs

Logic "1" VOH

Logic "0" VOL

Leakage Ilo

Power Supply Current Icc

Min

2

-

0

2.4

- - -

AC CHARACTERISTICS R09433B

Characteristics Sym Min Max

Address Access Time tAce

-

450

Chip Select to Output Delay Time teo

-

100 Chip Deselect to Output Float Time tOF

-

⁷⁵

Previous Data Valid After

Address Change tOH 20

-

Capacltance*

Input Capacitance CIN

-

⁷

Output Capacitance COUT

-

10

Typ

- - -

- -

R09433C Min Max

-

300

-

100

-

⁷⁵

20

-

7

-

10

Max Units Conditions

Vcc V

0.8 V

10 p.A VIN = OV to Vcc Vee V 10H = -200p.A 0.4 V 10l = 3.2mA 10 p.A VOUT= OV to Vcc

100 mA All inputs +5.5V. Outputs Unloaded

R09433D

Min Max Units Conditions

-

200 ns

-

⁷⁵ ^ns

-

⁷⁵ ^ns

20

-

ns

-

⁷ ^pf TA = 25°C, F = 1MHz

-

¹⁰ ^pf TA = 25°C, F = lMHz

*

Not tested 100%

AC TEST CONDITONS

CONDITIONS OF TEST FOR AC CHARACTERISTICS VPUll·UP

Input Pulse Levels ... O.BV to 2.2V Input Rise and Fall Times ... 20 ns Timing Measurement Levels:

Input ... 1.5V Output ... O.BV and 2.0V

Output Load ... 2 TTL Loads +100pf (See Figure 1)

',Lov~

TIMING DIAGRAM ADDRESS

INPUTS

OUTPUT PAD

INVALID

X .. ____ ^v.A.L_D

_ _ _ _ _

.,X .. ____ IN_v_A_L_D

_ _ _ _ _ _

CHIP I

V

SELECT • • _INPUTS

D_IS_A_B_L_ED_-!I_~--,A

.""'-, .~ _ _ _ ^ENABLED--::--~_-:-:--.J ^I

~ __

^DISABLED

I

t c o : . f . . - tOH...-.j

14-

tOF

~

DATA OUTPUTS

DEFINITIONS Access Time, TACC

HIGH

L {1Ii_I_NV_A_L_ID_X~=V..;;AL..:I-D'X,.-IN·V.;;;A..:.L-ID~):'--H-IG-H--

IMPEDANCE

I

^IMPEDANCE

tACC----..

·-i

Output Enable Time. Tco Access time isthe maximum time between the application of a

valid Address and the corresponding Data Out.

Output enable time is the maximum delay between Chip Selects becoming true and Output Data becoming valid.

Output Hold Delay, T OH

Output hold delay is the minimum time after an Address change that the previous data remaons valid.

Output Disable Time, T OF

Output disable time is the delay between Chip Selects becoming false and output stages going to the high impedance state.

(29)

R0-3-9364B/C R0-3-9364HR

65,536 Bit Edge-TrIggered Read Only Memory

FEAlURES 8192 x 8 Organization Single +5 Volt

±

10% Supply

TTL Compatible - All Inputs and Outputs Edge Triggered Operation

450ns Maximum Access Time: RO-3-9364B 300ns Maximum Access Time: RO-3-9364C

Three-State Outputs - Under the Control of Chip Enable Input 2 TTL Load/l00pf Output Drive Compatibility

Low Power Dissipation - 250mW active, 150mW Standby Totally Automated Custom Programing

Zener Protected Inputs Glsss Psssivation Protection DESCRIPTION

The General Instrument RO-3-9364 is a 65,536 Bit Edge-Triggered Read Only Memory organized as 8192 8-bit words and Is ideally suited for microprocessor memory applications. Fabricated with General Instrument N-Channel Silicon Gate Technology, the RO-3-9364 provides the designer with a high performance, easy- to-use MOS circuit featuring operation from a single +5 Volt power supply and low power dissipation. The RO-3-9364 offers the best combination of high performance, large bit storage and simple Interfacing of any MOS Read Only Memory available today.

BLOCK DIAGRAM ^Vet;

65,536 BIT MATRIX

2-16

GNO

Top View A7

A6 AS A4 A3 A2 AI AO 01 02 03 GNO

0 U T P U T B U F F E R S

CHIP ENABLE CLOCK GENERATOR

Vcc (-5V) A8 A9 A12 CE Al0 All 08 07 06 05 04

0, 0.

0, O.

0, 0, 0, O.

(30)

ELECTRICAL CHARACTERISTICS Maximum Ratings *

Vcc and Input Voltages (with Respect to GND) .•...••... -0.5V to +7.0V Storage Temperature ..•.•....•..••.••...•.•.•.••.•.. -65· C to +150· C Standard Conditions (unless otherwise noted):

Vcc=+5V± 10%

Operating Temperature TA = O·C to +70·C HR: TA = -55·C to +125·C Output Loading: Two TTL Loads, C L TOTAL = 100pf DC CHARACTERISTICS

RO-3-9364B/C • RO-3-9364HR

* Exceeding these ratings could cause permanent dam- age to the device. This is a stress rating only and functional operation of this device at these conditions is not implied-operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

RO-3-9364B/C RO-3-9364HR Characteristics Sym Min

Tnl'*

^Max Min Typ** Max Address, CHIP ENABLE

Inputs

Logic "1" V'H 2

- -

²

- -

Logic "0" V'L

- -

0.8

- -

0.7

Leakage III

- -

10

- -

10

Data Outputs

Logic "1" VOH 2.4

- -

^2.4

- -

Logic "0" VOL

- -

^0.4

- -

^0.4

Leakage ILO

- -

10

- -

10

Icc (Active) RO-3-9364B

- - -

50

RO-3-9364C

- ^- -

⁵⁰ N/A

Icc (Standby) RO-3-9364B

- - -

30

RO-3-9364C

- - -

30 N/A

RO-3-9364H R N/A

- -

35

AC CHARACTERISTICS

RO-3-9364B RO-3-9364C

Characteristics Sym Min

Cycle Time tc 600

CE

Pulse Width tCE 450

CE Precharge Time tp 150

CE Access Time t AC

-

Output Turn Off Time tOFF

-

Address Set Up Time t AS 0

Address Hold Time tAH 90

Capacitance

Input Capacitance C,

-

Output Capacitance Co

-

Characteristics Sym

CycieTime tc

CE Pulse Width tCE

CE Precharge Time tp

CE Access Time t AC

Address Set Up Time t AS

Address Hold Time tAH

Capacitance

**Typical values are at +25·C and nominal voltages

*

**

Preliminary specification

Typ ** Max Min 1\tP** Max

- -

400

- -

300

- -

- ^-

¹⁰⁰

^- -

-

450

- -

300

-

150

- -

150

- -

0

- -

75

- -

-

7

- -

7

-

¹⁰

^- ^-

¹⁰

RO-3-9364HR ***

Min Typ ** Max

400

- -

300

- -

¹⁵⁰

- -

450

- -

150

0

- -

75

- -

- ^-

⁷

- -

10

Units Conditions

V V

pA V'N= Vcc V IOH = -200pA V ICL = 3.2mA pA VOUT= Vcc

rnA Output Loading 1 Mel and 100pf CE at Minimum Cycle Time rnA CE = Logic "1"

Units Conditions

ns ns

ns } A"

0., ... 0';"09

ns Two TTL Loads ns and 100pf ns

ns

pf F = lMHz, TA = +25·C pf F= lMHz, TA= +25·C

Units Conditions

ns ns

ns

} '" 0'" ," 0"" 0,

ns Two TTL Loads ns and 100pf ns

ns

pf F = lMHz, TA = +25·C pf F = lMHz, TA = +25· C

(31)

I~

R0-3-9364B/C • R0-3-9364HR OPERATION

The RO-3-9364Is controlled by the chip enable. A negative going edge at

eE

Input will activate the device and latch the addresses into the on-chip address registers. Once the address hold time specification has been met, new address data can be applied In anticipation of the next cycle. The circuit can be put into an

TIMING DIAGRAM

I"

CHip

ENABLE

1\ ~.a

-1

^tAS

^f-

^tAH-j

'OO'ESS ~

^VALID

^I ^I _{I ..} X

_{t Ac}

DATA OUTPUT OPEN

2-18

automatic low power standby mode by maintaining the chip enable (CE) input at a TTL high level. In this mode, power dissipation is reduced as compared to unclocked devices which draw full power continuously.

tc

-I

Ir ^.. ^~\

^VOH^VOL

-I

VOH

-I ^~tOFF~

VOL

< ⁾

VOH

VALID OPEN

VOL

(32)

R0-3-936S8/C PRELIMINARY INFORMATION

65,536 Bit Edge-Triggered Read Only Memory

FEATURES

• Single +5 Volt + 10% Supply

• Edge Triggered Operation

• Three-State Outputs - Under the Control of Chip Enable Input

• 2 TTL Load/loopf Output Drive Compatibility

• Low Power Dissipation - 250mW Active, 150mW Standby

• Totally Automated Custom Progra,ming

• Glass Passivation Protection DESCRIPTION

The General I nstrument RO-3-9365 is a 65,536 Bit Edge-Triggered Read Only Memory organized as 8192 8-bit words and is ideally sUited for microprocessor memory applications. Fabricated with General Instrument N-Channel Silicon Gate Technology,the RO-3-9365 provides the designer with a high performance, easy- to-use MOS circuit featuring operation from a single +5 Volt power supply and low power dissipation. The RO-3-9365 offers the best combination of high performance, large bit storage, and simple interfacing of any MOS Read Only Memory available today.

BLOCK DIAGRAM

vee

65.536 BIT MATRIX

NC A12 A7 A6 M>

A4 A3 A2 Al AD 01 02 03 GND

CHIP ENABLE

CLOCK GENERATOR

vee NC NC A8 A9 All OE AID CE 08 07 06 05 04

0, 0.

0, O.

0, 0.

(33)

IN~MIr

RO-3-936SB/C ELECTRICAL CHARACTERISTICS Maximum Ratings

*

Vcc and Input Voltages (with Respect to GND) •...••.•.• -0.5V to +7.0V Storage Temperature .•.•.•...•.•.•.•.• , .••.••....•.• -65° C to +150° C Standard Conditions (unless otherwise noted):

Vcc = +5V

±

10%

Operating Temperature TA = O°C to +70°C Output Loading: Two TTL Loads, CL TOTAL = 100pf

DC CHARACTERISTICS

*

Exceeding these ratings could cause permanent dam- age to the device. This is a stress rating only and functional operation of this device at these conditions is not implied-operating ranges are specified in Standard Conditions. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

RO-3-9365B/C

Characteristics Sym Min Typ Max Units Conditions

Address, CHIP ENABLE Inputs

Logic "1" V'H 2

- -

V

Logic "0" V'L

- -

0.8 V

Leakage IL'

- -

10 JlA

Data Outputs

Logic "1" VOH 2.4

- -

V 10H = 200JlA

Logic "0" IOL

- ^-

^0.4 ^V IOL =3.2mA

Leakage ILO

- ^-

¹⁰ ^JlA

Icc (Active)

- - ^-

⁵⁰ ^mA Output Loading 1 Mel and 100pf

CE

at Minimum Cycle Time

Icc (Standby)

- - ^-

³⁰ ^mA CE = Logic "1"

AC CHARACTERISTICS

RO-3-9365B RO-3-9365C

Characteristics Sym Min Typ Max Min Typ** Max Units Conditions

Cycle Time tc 600

- ^-

⁴⁰⁰

^- ^-

^ns

cr

Pulse Width tCE 450

- -

300

- ^-

^ns

cr

Precharge Time tp 150

- -

100

- -

ns

cr

Access Time t AC

- -

450

- -

300 ns

I ~'O",,,,, ^0';.09

- -

90

- -

75 ns Two TTL Loads

Address Set Up Time t AS 0

- ^-

⁰

- ^-

^ns ^{and 100pf}

Address Hold Time tAH 90

- ^-

⁷⁵

- ^-

^ns

Output Enable Access Time tOEA

- -

⁸⁰

^- ^-

¹⁰⁰ ^ns

Output Enable Data Off Time tOEZ

- -

60

- -

75 ns

Capacitance

- -

7

- -

7 pf F = 1MHz, TA = +25°C

- ^-

¹⁰

^- ^-

¹⁰ ^pf F = 1MHz. TA = +25°C

**Typical Values are at +25°C and Nominal Voltages.

2-3>

(34)

RO-3-93f15B/C OPERATION

The RO-3-9365 Is controlled by the chip enable (~ and output enable (0'1:). A negative going edge at the CElnput will activate the device and latch the addresses Into the on-chip address registers.

The output buffers, under the control of

ClE,

will become active In

rn:

access time (t.el If the output enable access time (toEA>

requirement is met. The on chip address register allows addresses to be changed after the specified hold time (t.h) In preparation for

the next cycle. The outputs will remain valid and active until either

eE

or ~ is returned tothe inactive state. After output turn olltime (toff) the output buffers will go to a high impedance state. The CE Input must remain inactive (high) between subsequent cycles for time (tp) to allow for precharglng the nodes of the internal circuitry.

TIMING DIAGRAM

~I~.---tc---~·I

~---\ (i--

^tP

^~

j-'M .~I.~"':::t-A-H:--1:::--:--:t-CE---:~

" "

r--

ADDRESS

=x

^{+ 0}

^X ^I

_ _ I~ _tRC~?~,,,~_

OUTPUT _ENABLE \ :

tOFA-

DATA )

,

OUTPUT---~~

j

,'---"

VALID

(35)

R09464B/C/D R09464ABI ACI AD

65,536 Bit Static Read Only Memory

FEATURES

• Fully Static Operation

• Single +5V

±

10% Supply

• Inputs and Outputs TTL Compatible

• Three State Outputs

• Output Drive Capability of 2 TTL Loads and 100pf

• 24 Pin JEDEC Approved Pinout DESCRIPTION

The General Instrument R09464 and R09464A are 65,536 Bit Static Read Only Memories organized as 8192 eight-bit words and are ideally suited for microprocessor memory applications. Fabri- cated with General Instrument N-Channel Silicon Gate Technol- ogy, the R09464 and R09464A provide the designer with a high performance, easy to use MOS circuit featuring operation from a single +5 Volt power supply and low power dissipation. The R09464 and R09464A offer the best combination of high performance, large bit storage and simple interfacing of any MOS Read Only Memory avai lable today.

The R09464 offers a programable chip select on pin 20. The R09464A offers an automatic power down feature on pin 20.

Power down is controlled by the Chip Enable (CE) input. When

i5E

I goes high, the device will automaticall~owAr down and remain In a low power standby mode as long as CE remains high.

BLOCK DIAGRAM

AD A1 A2 A3 A4 AS A6 A7 A8 A9 A1D Al1 A12

~ (ROe464A)

CS (R09464)

PRELIMINARY INFORMATION

A7 A6 AS A4 A3 A2 A1 AD 01 02 03 GND

A7 A6 A5 A4 A3 A2 A1 AD 01 02 03 GND

R094S4

R09464A

01 02 03 04 05 06 07 08

Vee AS A9 A12 CS A1D Al1 OS 07 06 05 04

Vee AS A9 A12 CE A1D Al1 08 07 06 05 04

CHIP SELECT ICS) IS PROGRAMABLE ACTIVE LOW. ACTIVE HIGH. OR DON'T CARE

2-22

GENERAL INSfRUMENT