SymbolPackaging Ordering Information 14A, 100V, 0.160 Ohm, N-Channel PowerMOSFETs Features IRF530, RF1S530SM

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File Number 1575.6

14A, 100V, 0.160 Ohm, N-Channel Power MOSFETs

These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits.

Formerly developmental type TA17411.

Features

• 14A, 100V

• r_DS(ON) = 0.160Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature

- TB334 “Guidelines for Soldering Surface Mount Components to PC Boards”

Symbol

Packaging

JEDEC TO-220AB JEDEC TO-263AB

Ordering Information

PART NUMBER PACKAGE BRAND

IRF530 TO-220AB IRF530

RF1S530SM TO-263AB RF1S530

NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in the tape and reel, i.e.,

RF1S540SM9A.

G

D

S

GATE DRAIN (FLANGE)

SOURCE DRAIN

DRAIN (FLANGE) GATE

SOURCE

Data Sheet November 1999

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Absolute Maximum Ratings

T_C = 25^oC, Unless Otherwise Specified

IRF530, RF1S530SM UNITS Drain to Source Breakdown Voltage (Note 1) . . . V_DS 100 V Drain to Gate Voltage (R_GS = 20kΩ)(Note 1) . . . V_DGR 100 V Continuous Drain Current . . . I_D

T_C= 100^oC . . . I_D

14 10

A A Pulsed Drain Current (Note 3) . . . I_DM 56 A Gate to Source Voltage . . . V_GS ±20 V Maximum Power Dissipation . . . .P_D 79 W Dissipation Derating Factor . . . 0.53 W/^oC Single Pulse Avalanche Energy Rating (Note 4). . . .E_AS 69 mJ Operating and Storage Temperature . . . T_J,T_STG -55 to 175 ^oC Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s . . . T_L Package Body for 10s, See Techbrief 334 . . . T_pkg

300 260

oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. T_J= 25^oC to 150^oC.

Electrical Specifications

T_C = 25^oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV_DSS I_D = 250µA, V_GS = 0V (Figure 10) 100 - - V

Gate to Threshold Voltage V_GS(TH) V_GS = V_DS, I_D = 250µA 2 - 4.0 V

Zero Gate Voltage Drain Current I_DSS V_DS = 95V, V_GS = 0V - - 25 µA

V_DS = 0.8 x Rated BV_DSS, V_GS = 0V, T_J = 150^oC - - 250 µA On-State Drain Current (Note 2) I_D(ON) V_DS > I_D(ON) x r_{DS(ON) MAX}, V_GS = 10V 14 - - A

Gate to Source Leakage Current I_GSS V_GS =±20V - - ±500 nA

Drain to Source On Resistance (Note 2) r_DS(ON) I_D = 8.3A, V_GS = 10V (Figures 8, 9) - 0.14 0.16 Ω

Forward Transconductance (Note 2) gfs V_DS≥ 50V, ID = 8.3A (Figure 12) 5.1 7.6 - S

Turn-On Delay Time t_d(ON) V_DD = 50V, I_D≈ 14A, R_G≈ 12Ω, R_L = 3.4Ω MOSFET Switching Times are Essentially Independent of Operating Temperature

- 12 15 ns

Rise Time t_r - 35 65 ns

Turn-Off Delay Time t_d(OFF) - 25 70 ns

Fall Time t_f - 25 59 ns

Total Gate Charge

(Gate to Source + Gate to Drain)

Q_g(TOT) V_GS = 10V, I_D = 14A, V_DS = 0.8 x Rated BV_DSS I_g(REF) = 1.5mA (Figure 14)

Gate Charge is Essentially Independent of Operating Temperature

- 18 30 nC

Gate to Source Charge Q_gs - 4 - nC

Gate to Drain “Miller” Charge Q_gd - 7 - nC

Input Capacitance C_ISS V_DS = 25V, V_GS = 0V, f = 1MHz (Figure 11) - 600 - pF

Output Capacitance C_OSS - 250 - pF

Reverse Transfer Capacitance C_RSS - 50 - pF

Internal Drain Inductance L_D Measured from the

Contact Screw on Tab To Center of Die

Modified MOSFET Symbol Showing the Internal Devices Inductances

- 3.5 - nH

Measured from the Drain Lead, 6mm (0.25in) from Package to Center of Die

- 4.5 - nH

Internal Source Inductance L_S Measured from the Source Lead, 6mm (0.25in) From Header to Source Bonding Pad

- 7.5 - nH

Thermal Resistance Junction to Case R_θJC - - 1.9 ^oC/W

Thermal Resistance Junction to Ambient

R_θJA Free Air Operation - - 62.5 ^oC/W

R_θJA RF1S540SM Mounted on FR-4 Board with Minimum Mounting Pad

- - 62 ^oC/W

L_S L_D G

D

S

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Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I_SD Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode

- - 14 A

Pulse Source to Drain Current (Note 2) I_SDM - - 56 A

Source to Drain Diode Voltage (Note 2) V_SD T_J = 25^oC, I_SD = 14A, V_GS = 0V (Figure 13) - - 2.5 V

Reverse Recovery Time t_rr T_J = 25^oC, I_SD = 14A, dI_SD/dt = 100A/µs 5.5 120 250 ns

Reverse Recovery Charge Q_RR T_J = 25^oC, I_SD = 14A, dI_SD/dt = 100A/µs 0.17 0.6 1.3 µC NOTES:

2. Pulse test: pulse width≤300µs, duty cycle≤2%.

3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. V_DD= 25V, starting T_J= 25^oC, L = 530µH, R_G= 25Ω, peak I_AS = 14A (Figures 15, 16).

Typical Performance Curves

Unless Otherwise Specified

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE G

D

S

T_C, CASE TEMPERATURE (^oC)

25 50 75 100 125 150 175

0

POWER DISSIPATION MULTIPLIER

0 0 0.2 0.4 0.6 0.8 1.0 1.2

6

3

0

25 50 75 100 125 150

12

ID, DRAIN CURRENT (A)

T_C, CASE TEMPERATURE (^oC) 15

175 9

t_P, RECTANGULAR PULSE DURATION (s)

10 ZθJC, TRANSIENT THERMAL IMPEDANCE

10^-3 10^-2 0.1 1

1

10^-5 10^-4

10

0.01 0.1

NOTES:

DUTY FACTOR: D = t₁/t₂ PEAK T_J = P_DM x Z_θJC + T_C

P_DM

t₁ t₂ 0.1

0.02 0.2 0.5

0.01 0.05

SINGLE PULSE

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FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves

Unless Otherwise Specified (Continued)

V_DS, DRAIN TO SOURCE VOLTAGE (V) 0.1 10

10

1 ID, DRAIN CURRENT (A)

10²

10² LIMITED BY r_DS(ON)

AREA MAY BE OPERATION IN THIS

T_J = 175^oC SINGLE PULSE

100µs 10µs

1ms 10ms 10³

1

10³ T_C = 25^oC

V_DS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

0

0 10 20 30 40

5 10 15 20 25

50 V_GS = 7V

V_GS = 6V

V_GS = 5V

V_GS = 4V PULSE DURATION = 80µs V_GS = 10V

V_GS = 8V

DUTY CYCLE = 0.5% MAX

0 5

0 1 2 3 5

10 15

ID, DRAIN CURRENT (A)

V_DS, DRAIN TO SOURCE VOLTAGE (V) V_GS = 6V V_GS = 10V

20

4 V_GS = 4V

V_GS = 7V

V_GS = 5V 25

V_GS = 8V PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

0 2 4 6 8 10

0.1 1 10

IDS(ON), DRAIN TO SOURCE CURRENT (A)

V_GS, GATE TO SOURCE VOLTAGE (V) 100

25^oC 175^oC

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX V_DS≥50V

0 0.6 0.9 1.2

12 24 36 48

rDS(ON), ON-STATE RESISTANCE (Ω)

I_D, DRAIN CURRENT (A)

60 1.5

0 0.3

V_GS= 20V V_GS = 10V

PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

NORMALIZED ON RESISTANCE

3.0

1.8

1.2

0.6

0

-60 -40 -20 0 20 40 60

T_J, JUNCTION TEMPERATURE (^oC)

100 120 140 160 180 2.4

80 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX V_GS = 10V, I_D = 14A

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FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves

Unless Otherwise Specified (Continued)

1.25

1.05

0.95

0.85

0.75

-60 -40 -20 0 20 40 60

T_J, JUNCTION TEMPERATURE (^oC) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE

100 120 140 160 180 1.15

80

I_D = 250µA 1500

300

0

1 10 10²

C, CAPACITANCE (pF)

900

V_DS, DRAIN TO SOURCE VOLTAGE (V) 1200

600

C_ISS = C_GS + C_GD C_RSS = C_GD C_OSS≈^CDS+ C_GD

C_ISS

C_OSS C_RSS V_GS= 0V, f = 1MHz

I_D, DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S)

0

0 5 10 15 20

2 4 6 8 10

25 175^oC

25^oC PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX V_DS≥50V

0 0.4 0.8 1.2 1.6 2.0

0.1 1 10

ISD, SOURCE TO DRAIN CURRENT (A)

V_SD, SOURCE TO DRAIN VOLTAGE (V) 100

175^oC 25^oC PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX

Q_G, GATE CHARGE (nC) VGS, GATE TO SOURCE (V)

0

0 6 12 18 24

4 8 12 16 20

30 I_D = 14A

V_DS = 50V

V_DS = 80V V_DS = 20V

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Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS t_P

V_GS

0.01Ω L

I_AS

+

-

V_DS

V_DD R_G

DUT VARY t_P TO OBTAIN

REQUIRED PEAK I_AS

0V

V_DD V_DS BV_DSS

t_P I_AS

t_AV 0

V_GS

R_L

R_G

DUT +

-

V_DD

t_ON t_d(ON)

t_r 90%

10%

V_DS

90%

10%

t_f t_d(OFF)

t_OFF

90%

50%

10% PULSE WIDTH

V_GS 0

0

0.3µF 12V

BATTERY 50kΩ

V_DS S

DUT D

G

I_g(REF) 0

(ISOLATED V_DS

0.2µF

CURRENT REGULATOR

I_D CURRENT SAMPLING I_G CURRENT

SAMPLING

SUPPLY)

RESISTOR RESISTOR SAME TYPE AS DUT

Q_g(TOT) Q_gd Q_gs

V_DS 0

V_GS V_DD

I_G(REF)

0

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