PINS AND CONNECTIONS
2.1 PACKAGES AND PIN NAMES
The following figures show pin assignments for several members of the M6SHC11 MCU Family. The pin assignments for the MC6SHC24 port replacement unit (PRU) are also presented for reference although the PRU is not discussed in detail in this manual.
Detailed mechanical data for packages may be found in the data sheets or technical sum-maries. Ordering information, which relates part number suffixes to package types and operating temperature range, are also found in the data sheets or technical summaries.
2.1.1. MC68HC11A8
The MC6SHC11AS is available in either a 52-pin plastic leaded chip carrier (PLCC) package or a 4S-pin dual-in-line package (DIP). The silicon die is identical for both packages, but four of the analog-to-digital (AID) converter inputs are not bonded out to pins in the 4S-pin DIP. The MC6SHC11 Aland MC6SHC11 AD devices also use the same die as the MC6SHC11AS, except that the contents of the nonvolatile CONFIG register determine whether or not internal read-only memory (ROM) and/or electrically erasable program-mable ROM (EEPROM) are disabled. These downgraded device versions have identical pin assignments as the MC6SHC11AS.
Figure 2-1 shows the pin assignments for the MC6SHC11AS in the 52-pin PLCC package and the 4S-pin DIP package.
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Figure 2-1. MC68HC11A8 Pin Assignments
2.1.2 MC68HC11D3/711D3
The MC68HC11D3 is available in either a 44-pin PLCC package or a 40-pin DIP package.
The silicon die is identical for both packages, but the PLCC version has two additional output compare pins bonded out and an extra VSS pin named EVSS. The MC68HC711 D3 is functionally equivalent to the MC68HC11 D3 but has 4K bytes of EPROM instead of mask programmed ROM. The MC68HC711D3 is available as a one-time-programmable (OTP) MCU in an opaque plastic package or in a ceramic windowed package for development applications.
Figure 2-2 shows the pin assignments for the MC68HC11 D3/711 D3 in the 44-pin PLCC package and the 40-pin DIP package.
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1<>: ....
( ' ) < ' 1 . . - 0 ::J~
~~~~ Cf)...Jcf ~gJ vss XTAL
~ ~ 2 ~ >~i'~ ~
w~ ~
PCO/ADO EXTALPC1/AD1 E
<0 U') -.;t CO) N O~ ~ ~
:;
~ PC2lAD24 MODAlLIR
PC4lAD4 7 39 PBO/AS PC3/AD3 MODBN STBY
PC5/AD5 8 38 PB1/A9 PC4/AD4 PBO/AS
PC6/AD6 9 37 PB2IA10 PC5/AD5 7 PBlIA9
PC7/AD7 10 36 PB3/A11 PC6lAD6 8 PB2IA10
XIRQNpp 11 35 PB4/A12 PC7/AD7 9 PB3/A11
PD7IRiW 12 34 PB5/A13 XIRQNpp. 10 31 PB4/A12
PD6/AS 13 33 PB6IA14 PD71RiW 11 30 PB5/A13
RESET 14 32 PB7/A15 PD6/AS 12 29 PB6IA14
IRQ 15 31 N.C. RESET 13 28 PB7/A15
PDOlRxD 16 30 PAC/IC3 IRQ 14 27 PAOAC3
PD1ITxD 17 29 PA1AC2 PDOlRxD 15 26 PAMC2
~~~N~!:lC'1iKl~{:;j~ PD1ITxD 16 25 PA2AC1
PD2JMISO 17 24 PA3/IC41OC5IOC1
Sl
l3
~ I~ gg g g g
u u PD3iMOSI 18 23 PAS/0C3/OC1 :E:!!lIQ"'>-i'J-_Q~ PD41SCK 19 22 PA7/PAI/OC1~8~~ ~ggC3So..
a.. 0.. '" _ -. Q PD51SS 20 21 VDD
~~~:I:C3
o..o..o..~
0..
Figure 2-2. MC68HC11D3/711D3 Pin Assignments
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2.1.3 MC68HC11 E9t711 E9
The MC68HC11E9 is available in a 52-pin PLCC package only. The MC68HC11E1 and MC68HC11 EO devices also use the same die as the MC68HC11 E9, except that the contents ofthe nonvolatile CON FIG register determine whether or not internal ROM and/or EEPROM are disabled. These downgraded device versions have identical pin assignments as the MC68HC11 E9.
The MC68HC11 E9 is an upgrade from the MC68HC11 A8 version. The MC68HC11 E9 has 12K bytes of mask ROM, 512 bytes of EEPROM, and 512 bytes of RAM. The timer system allows one output-compare channel to be reconfigured as a fourth input-capture channel.
The MC68HC711 E9 is functionally equivalent to the MC68HC11 E9 but has 12K bytes of EPROM instead of mask programmed ROM. The MC68HC711 E9 is available as a one-time-programmable (OTP) MCU in an opaque plastic package or in a ceramic windowed package for development applications.
Figure 2-3 shows the pin assignments for the MC68HC11 E9 in the 52-pin PLCC packages.
These pin assignments are the same as the MC68HC11A8, except for the pin name for the PA3tOC5/1C4/0C1 pin.
XTAL 8 PCO/ADO 9 PClIAD1 10 PC2IAD2 11 PC3/AD3 12 PC4/AD4 13 PC5/AD5 14 PC6/AD6 15 PC7/AD7 16 RESET 17 XIRQ 18 IRQ [ 19 PDOlRxD [ 20
46 J PE5/AN5 45 ~ PE1/AN1 44 ~ PE4/AN4 43 ~ PEa/ANa 42 ~ PBO/AS 41 ~ PB1/A9 40 ~ PB2IA10 39 ~ PB3/A11 38
P
PB4/A1237 PB5/A13 36 PB6/A14 35 PB7/A15 34 ] PAO/IC3
Figure 2-3. MC68HC11 E9/711 E9 Pin Assignments (52-Pin LCC)
2-1.4 MC68HC811E2
The MC68HC811 E2 is very similar to the MC68HC11 E9 version, except in the on-chip mem-ory. The MC68HC811 E2 includes 2K bytes of EEPROM, which can be remapped to the upper half of any 4K-byte page in tile 64K map. There is no masked ROM memory in the MC68HC811 E2. The MC68HC811 E2 IS available in either a 52-pin PLCC package or a 48-pin DIP. The silicon die used is the same for both packages, but four of the AID converter inputs are not bonded out to pins in the 48-pin package.
The MC68HC811 E2 version replaces an earlier version called the MC68HC811A2. The only significant difference between the MC68HC811 E2 and MC68HC811A2 is that the MC68HC811 E2 has a slightly more flexi ble timer system, which allows one output-compare channel to be reconfigured as a fourth input-capture channel.
The 52-pin PLCC package version of the MC68HC811 E2 has identical pin assignments to the MC68HC11 E9 pin assignments shown in Figure 2-3. Figure 2-4 illustrates the pin assign-ments for the MC68HC811 E2 in the 48-pin DIP.
PA7/PAliOCl vDD
PA6/0C2'OCl PDS/SS
PAS/OC3/0Cl PD41SCK
PA4/0C4iOCl PD3IMOSI
PA3/IC4/0C5,0Cl PD2IMISO
PA2ilCl PD1ITxD
PA1!IC2 PDOJRxD
PAO/IC3 8 IRO
PB7/A15 9 XIRO
PB6/A14 10 RESET
PBS/A13 11 PC7/AD7
PB4/A12 12 PCS/ADS
PB3/Al1 13 PCS/ADS
PB2/Al0 14 PC4/AD4
PB1/A9 15 PC3/AD3
PBO/A8 16 PC2lAD2
PEO/ANO 17 PC1/ADl
PE1/ANl 18 PCO/ADO
PE2IAN2 19 XTAL
PE3/AN3 20 EXTAL
VRL 21 STRBlR,w
VRH 22
Vss 23 STRAIAS
MODB 24 MODAlLIR
Figure 2-4. MC68HC811 E2 Pin Assignments (48-Pin DIP)
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2.1.5 MC68HC11 F1
The MC68HCll Fl is available in a 68-pin PLCC package only. The MC68HC11 Fl is the first multiplexed address/data bus version of the M68HCll family. In addition to the non-multiplexed bus, this MCU includes 1 K bytes of on-chip RAM and intelligent chip selects for simple connecfion to external program memory without the need for any external logic chips. Other on-chip peripherals are similar to the MC68HCll E9. Figure 2-5 shows the pin
PCO