Number Systems, Binary Arithmetic, and Codes
64 CHAPTER 21 NUMBER SYSTEMS, BINARY ARITH METIC. AND COD E S
(2) Represent each operand in BCD fonn.
(3) Carry out steps (I) through (4) of Algorithm 2.14. If the result is negative. the true value is found by negation: [(remlt)loc hoc = (resufl)IICD. If the result is positive. that result is the true value.
2.9.7 Floating-Point Arithmetic
Up (0 this point the arithmetic operations have involved tilted-point representation in which all bits of a binary number were represented. In many practjcal applications the numbers may require many bits for their representation. Tn Section 2.8 the Hoaling-point number (FPN) system was discussed for just that reason. Now it is necessary to deal with the arithmetic associated with the FPN system, namely addition. subtraclion, multiplication, and division.
FPN Addition and Subtraction Before two numbers can be added or subtrncted one from the other, it is necessary that they have the same exponent. This is equivalent to aligning their radix points. From Eq. (2.17) for radix 2. consider the following two FPNs:
x
= Mx ·2E,"nd
Y = My ·2£'.
Now. if for exampJe Ex :! Er.lhen Y is represented as My' 2E~. where
M~=·OO .. ·Of-d-2"·f-,~ and E~=Er +(Ex- Ey)= Ex.
-
£,-1.,so (hat X
+
Y = (Mx+
My)' 2£' or X - r = (Mx - My)' 2£', etc. Here. My =./- 1 f - !" .
f-m originally. but is now adjusted so that the exponents for both operands are the same. The addition or subtraction oflhe fractions Mx and M;. is carried oul according(0 Algorithm 2.8 or Algorithm 2.9, respectively.
Consider the following examples of FPN addition:
EXAMPLE 2.34 - Addition
145.50010 +27.62510
173.12510
~ 10010001.100, ~ X 00011000.1017. = y
Comparing and equalizing !.he exponents Ex and E y gives 145.50010 = .10010001100 X 28
27.62510= .00011011101 X 28.
2.9 BINARY ARITHMETIC 65
In FPN notation the addition operation becomes
s to M
, . - ' - , ,
145.500 ~ 0 10000111 100100011000 ... 00 +27.625 ~ +0 10000111 000110111010· . ·00 ,
173.125 0 10000111 101011010010···00
where the exponents given in excess 127 form are 127 + 8 = 135 as discussed in Section 2.7.
To represent the result in normalized FPN notation, the most significant 1 bit of the mantissa is omitted, yielding the result 0 10000 111 010 110 100 100 ... 00 for the sign, exponent, and mantissa fields, respectively.
EXAMPLE 2.35 - Subtraction in 2's complement
s E M
~ , . - ' - ,
-145.500 ~ 0 10000111 011011101000· .
·od
+27.625 ~ +0 10000111 000110111010· . ·00 -117.875 0 10000111 100010100010···00
The true value is obtained by negation of the mantissa (taking its 2's complement), giv-ing the sign magnitude result 110000111 011101011110·· ·00, which is -117.87510' In normalized FPN notation the MSB I bit of the mantissa would be omitted, giving the 2's complement result 110000111 00010100010···00.
FPN Multiplication and Division In some respects multiplication and division of FPNs is simpler than addition and subtraction from the point of view of the decision-making problem. Multiplication and division operations can be carried out by using the standard methods for such operations without the need to compare and equalize the exponents of the operands. The following generalizations of these processes illustrates the procedure involved.
The product of two operands X and Y in radix r is represented as follows:
P=XxY
= (Mx . rEx) x (My· rEy)
= (Mx x My)· r(l;x+Ey)
where the exponents are added following Algorithm 2.8 while the mantissas are multiplied by using Algorithm 2.10. The addition and multiplication of signed numbers is covered by Algorithms 2.9 and 2.11, respectively.
Similarly, for division in radix r the quotient is given by
Q=X-;-Y
= (Mx . rEx) -;-(My. rEy)
= (Mx -;- My)· r(Ex-E y).
66 CHAPTER 2/ NUMBER SYSTEMS, BINARY ARITHMETIC, AND CODES
Here, the exponents are subtracted (added) in radix 2 (binary) by using the same algo-rithms as for addition, namely Algoalgo-rithms 2.8 and 2.9. The division of the mantissas, on the other hand, is best accomplished by using the quadratic convergence iterative divide method discussed in Subsection 2.9.5, since the mantissas are usually represented in nor-malized FPN form. The following examples illustrate the multiplication and division of FPNs.
EXAMPLE 2.36 - FPN signed-magnitude multiplication
---
s -7. 2510 ~x4. 5OIO ~ +0
-32. 62510 1
E
~
10000010 + 10000010 10000101
M
11101000···06 x 10010000···00 00000000 ... 00 000000000 ... 00 0000000000 ... 00 00000000000···00 111010000000···00 0000000000000···00 00000000000000···00 111010000000000···00 1000001010000000···00
23-bif representation
The result, given in normalized signed-magnitude 32-bit FPN form, is 110000101000001010000000·· ·OFl'N = -32.62511).
where the MSB 1 bit of the mantissa is omitted. Note that the mantissa has a magnitude .10000010100·· ·00 x 26 = 100000.101.
EXAMPLE 2.37 - FPN signed-magnitude division
4.5 0.1001 x 23 X -0.625 :::} - 0.1010 Y In FPN notation the operands are
X = 0 10000010 100100· .. 00 Y = 1 01111111 101000 .. ·00.
Division of the mantissas Mxl My = DDI Ds by Algorithm 2.13:
ex
=
1 - D s=
I - .10 1 000 ... 00=
.011000 ... 00 ko = 1 + ex = 1.011000· .. 00Dsko = .11011100 .. ·00
2.9 BINARY ARITHMETIC
kl = I
+
(Dsko}x' = 1.00100100 .. ·00 Dskokl = .11111010111100 .. ·00k~ = 1 +(Ds~"x = 1.00000101000100 .. ·00 Dskpk1k2 = .I 1 111111111001100101111
kJ = J
+
{Dskoklk!hC = 1.00000000000110011010001.After four iterations the quotient is given by
which is Iruncated to 23 bits. The quotient has a decimal value of
(0.899996755 X 2~)1O = 7.199974045010.
in normalized FPN signed-magnitude 32 bit form the quotient is given by Q = I 10000010 1 100110011001 10001 I()(M)().
67
where the MSB J bit of the mantissa has been omitted as discussed in Section 2.8. Note that the subu-action of exponents Ex - Ey is 130 - 127 = 00310 or 100000102 in excess 127 code. The sign bits are added in binary giving S".
+
Sr = 0+
I = I, where any carry (in this case 0) is discarded.Algorithm 2.16: Signed-Magnitude (X x Y)"-PN or (X ..;-Y)"PN (I) Sct operands X and }' in IEEE normalized FPN form (sec Section 2.7).
(2) Add the exponents Ex and E) according to Algorithms 2.8 or 2.9.
(3) If X x Y. then multiply mantissa fractions according to Algorithm 2.10.
(4) If X ..;-Y. then divide mantissas according to Algorithm 2.13.
(5) Add the sign bits 5x
+
5)' and discllrd the carry.(6) Set result in IEEE nonnali1.ed FPN form.
2.9.8 Perspective on Arithmetic Codes
It should seem clear to the reader that certain arithmelic operations are more easily executed than others, depending on whether or nOI the operands are signed and depending on the number code used to carry out the operation. Table 2.9 is intended 10 show the general degrec of difficulty of certain arithmetic opcmtiollS rdative to the arithmetic code (signed·
magnitude. 2's complement, etc.) used.
Not indicated in Table 2.9 are the subdivisions within a given type of arithmetic operation.
For example, no distinction is made between a direct division (restoring) algorithm and all iterative divide (nonrc.~toring) algorithm. which may differ significantly with regard to dir-ficuhy -the laller being easier (or operands represented in FPN notation. As a general rule!.
68 CHAPTER 2/ NUMBER SYSTEMS, BINARY ARITHMETIC AND CODES
Table 2.9 Arithmetic codes vs the degree of difficulty of arithmetic operations Arithmetic Operation Unsigned Numbers Signed-Magnitude Two's Complement
Unsigned addition Easy Easy Easy
Signed Difficult Easy
addition/subtraction
Unsigned multiplication Fairly difficult Fairly difficult Difficult
Signed multiplication Fairly difficult Difficult
Unsigned division Difficult Difficult Very difficult
addition/subtraction of signed numbers involves relatively simple arithmetic manipulations of the operands compared to multiplication; and division requires more decision-making steps than multiplication. Also not shown in Table 2.9 are the l's complement, BCD, and XS3 number codes, since they are not commonly used in computer numeric operations.
Finally, a direct correspondence is implied between degree of difficulty and the hardware requirements to carry out a given arithmetic operation.
2.10 OTHER CODES
Most binary codes of value in digital design fall into one or more of the following ten categories:
Weighted binary codes Unweighted binary codes Biased codes
Decimal codes
Self-complementing codes
Unit distance codes Reflective codes Number codes Alphanumeric codes Error detecting codes
The previous sections have introduced examples of weighted binary codes, number codes, biased codes, and decimal codes. Number codes are those such as 2's and 1 's complement that are used in addition/subtraction operations. Now, other codes (excluding alphanumeric codes) will be briefly discussed so as to provide a foundation for the developments in later chapters.
2.10.1 The Decimal Codes
Shown in Table 2.10 are seven decimal (10 state) codes that can be classified as either weighted or unweighted codes. All but one of these codes is weighted as indicated in the table. A weighted code can be converted to its decimal equivalent by using positional weights in a polynomial series as was done for the BCD code (1) discussed in Subsection 2.4.1.
Code (2), the XS3 code, is a biased-weighted code considered in Subsection 2.4.1 and in Section 2.7. An unweighted code, such as code (7), cannot be converted to its decimal equivalent by any mathematical weighting procedure.
Not all weighted decimal codes are natural in the sense that their code weights cannot be derived from positive powers of 2 as is done for codes (I) and (2). Codes (3) through (6) in Table 2.10 are of this type. Code weights such as -1, -2,5, and 6 cannot be generated
2.10 OTHER CODES 69
Table 2.10 Weighted and unweighted decimal codes
Weighted codes Unweighted
Dec. (I) (2) (3) (4) (5) (6) (7)
Value (BCD) (XS3) 2421 84-2-1 86421 51111 Creeping Code
0 0000 0011 0000 0000 00000 00000 00000
1 0001 0100 0001 0111 00001 00001 10000
2 0010 0101 0010 0110 00010 00011 11000
3 0011 0110 0011 0101 00011 00111 11100
4 0100 0111 0100 0100 00100 01111 11110
5 0101 1000 1011 1011 00101 10000 11111
6 0110 1001 1100 1010 01000 11000 01111
7 0111 1010 1101 1001 01001 11100 00111
8 1000 1011 1110 1000 10000 11110 00011
9 1001 1100 1111 1111 10001 11111 00001
by any positive integer power of 2, but they can still serve as code weights. As an example, consider how decimalS is represented by code (4):
Decimal equivalent = 5
84-2-1 code representation = (l x 8)
+
(0 x 4)+
[1 x (-2)]+
[1 x (-1)]= 1011.
Note that there may be more than one combination of weighted bits that produce a given state. When this happens, the procedure is usually to use the fewest 1 's. For example, decimal 7 can be represented by 00111 in code (5), 86421 code, but 0l00l is preferred. An exception to this rule is the 2421 code discussed next.
Codes (2), (3), and (4) are examples of codes that have the unusual property of being self-complementing. This means that the 1 's complement of the code number is the code for the 9's complement of the corresponding decimal number. In other words, the I's complement of any state N (in decimal) is the same as the (9 - N) state in the same self-complementing code. As an example, the 1 's complement of state 3 in XS3 (0110) is state 6 (l 00 1) in that same code. The I's and 9's complement number codes were discussed in Subsection 2.6.3 and are presented in Tables 2.7 and 2.8, respectively.
2.10.2 Error Detection Codes
There is another class of weighted or semiweighted codes with the special property that their states contain either an even number or an odd number of logic J's (or O's). Shown in Table 2.11 are four examples of such codes. This unique feature make these codes attractive as error-detecting (parity-checking) codes. Notice that both the 2-out-of-5 code (semi weighted) and the biquinary code (weighted 5043210) must have two l's in each of their 10 states and are, therefore. even-parity codes. In contrast, the one-hot code (weighted 9876543210) is an odd-parity code, since by definition it is allowed to have only a single I for any given state. Code (d) is no more than the BCD code with an attached odd parity-generating bit, P.