3.4 Antilatch Parallel SNSPDs
Parallel SNSPD structures described in section 3.3 exhibit promising performances in terms of efficiency at high detection rates, while conserving acceptable jitter values.
However the structure latches with increased detection rates because of cascade events triggered by consecutive photodetections. I proposed a solution to mitigate this issue and successfully demonstrated a fiber-coupled parallel SNSPD design and tested new devices that overcame the limitations encountered. Cascading effect between the nanowires is mitigated by adding carefully designed superconducting nanowires to the structure. Using the same electronic readout as with conventional SNSPDs and a single coaxial line, we demonstrate detection rates over 200 MHz without any latching, and a fibre-coupled SDE as high as 77%, and more than 50% absolute average SDE at 50 MHz detection rate under continuous wave illumination.
Figure 3.14: SEM image of an antilatch parallel detector with 8 nanowires and 18 addi-tional larger wires, designed to give a similar electronic crosstalk than that obtained with our 40 nanowires parallel design. The inset shows the nanowires exposed to light which can be seen at the center of the design (red). The additional wires are shown in blue and the resistors in yellow.
3.4.1 Working Principle
The solution I propose here ensures that, in any nanowire, the sum ofIb and the redirected current created by detections in parallel nanowires will never exceed the critical current Ic, even when using a bias currentIb large enough to maintain the saturated efficiency of the detector. To achieve this, additional nanowires are added in parallel to the structure
that they are unexposed to light, as seen on fig. 3.14. Part of the redirected current after a detection is therefore split into these unexposed nanowires, which effectively reduces the additional current seen by the exposed nanowires. To prevent switching to the resistive state of the additional structure we designed them with larger widths than the exposed nanowires. It can then be ensured that even if every exposed nanowire detects a photon, this additional structure will carry the excess current without reaching its critical current value. Thanks to the reduced crosstalk seen by the exposed nanowires, our design effectively allows for high Ib that can get close toIc. However this comes at a cost: lowering the crosstalk also lowers the current flowing into the readout, which inevitably decreases the output signal amplitude [61]. Hence, the number of parallel nanowires and their minimum kinetic inductance is limited by the performance of the amplification electronics.
I report in this chapter of a detector with only 6 exposed nanowires and 8 wider unexposed nanowires, which design is similar to the one shown on Fig. 3.14, with valuesLk∼188nH, Rs = 20 Ω, Ls2 ∼ 23.5 nH and Rs2 = 2.5 Ω. Note that inductances values have been estimated based on the dimensions of the nanowires and the calculated inductivity of our MoSi layer, but no measurement was performed to confirm the value. This design is referred to as “antilatch parallel SNSPD” in the text. The 8 unexposed nanowires have a larger width to ensure that they can carry the diverted current and remain superconducting even in the event of simultaneous detections in all of the 6 exposed nanowires.
3.4.2 Latch-Free Operation
Similarly to previous devices presented in this work, we tested this solution to characterize the system detection efficiency, efficiency vs. detection rate, jitter and recovery time.
The system detection efficiency of the new parallel design has been characterized, with the polarization of the incoming light oriented for maximum detection efficiency. Fig. 3.15 shows the SDEvs.bias current of the device at a detection rate of∼100kHz. An efficiency plateau is reached with a maximum efficiency of 77%. High efficiency is obtained with this new design thanks to a relatively higher fill factor. Indeed, this design consists of six nanowires in a meander shape with a fill factor of 60%, separated from each other by a distance of 800 nm. This effectively leads to an average fill factor of 42%. In comparison, the parallel design presented in the previous section is made of 18 exposed wires, the fill factor of this previous design was therefore only 16%, which reduces the maximum efficiency. Values approaching those of single-meander SNSPDs might be reached by optimizing the number of nanowires, the distance between them, and working on the optical cavity of the device.
Fig. 3.16a shows the SDE vs.detection rate of the parallel antilatch SNSPD, along with
3.4. Antilatch Parallel SNSPDs
250 300 350 400 450 500 550 600 650 Total bias current [ µ A]
Figure 3.15: System Detection Efficiency of a parallel antilatch SNSPD. A saturation plateau is observed, at an efficiency of 77%. Dark count rate was not optimized, values below 1 kHz can be obtained by turning off external lights and adding filtering loops on the fiber inside the cryostat, without impacting the SDE of the system.
the results obtained with a single-meander SNSPD for comparison, an improvement of the maximum detection rate of more than one order of magnitude is obtained. An absolute efficiency above 50% is obtained at a detection rate of 50 MHz. As desired, the wide unexposed parallel wires protect the device from latching and the detector can still be operated with rates above 200 MHz, with an average efficiency of 6.6% at 200 MHz.
This value is twice as high as the estimated one for the same detection rate of the multi-pixel SNSPD presented on fig. 3.3b, which requires 4 coaxial readout lines. These results confirm the importance of designing wider unexposed parallel wires to protect the detector from cascading and latching, as well as finding a trade-off concerning the number of exposed nanowires to limit the current crosstalk while minimizing the impact of high detection rates on the SDE. We also measured the recovery time of the device using the hybrid auto-correlation scheme presented in section 2.2.3. We estimate that each nanowire of the antilatch parallel design recovers 90% of its full efficiency in ∼25ns.
This is approximately 4 times lower than values obtained with our single-meander (i.e.
123 ns on the device presented in sec. 2.2.3) even with a much shorter saturated efficiency region. This shows the importance of designing shorter nanowires with lower kinetic inductance.
We measured a jitter of 66.4 ps full width at half maximum (FWHM) with an antilatch parallel SNSPD whose design is similar to the one presented above (Fig.3.17). As for
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(a) Normalized SDE versus detection rate at Ib = 0.97·Ic. The antilatch parallel design never latches and can function at rates above 200 MHz. The detector works at 50% of its nominal efficiency at a detection rate of 86 MHz.
Measurement on the single-meander detector presented in section 2.2.2 is shown for compar-ison.
(b) Recovery time of the antilatch parallel design for different bias currents. The possibility to use bias currents close to Ic
thanks to the crosstalk mitigation enables fast recovery times below 30 ns.
Figure 3.16: Operation of the antilatch parallel design at high detection rates SNSPDs [10] which is mainly due to the lower output signal amplitude. Antilatch parallel detectors based on the design proposed here have been subsequently fabricated at ID Quantique S.A, with jitters down to 30 ps.
These results compare well with the multipixel detector presented previously on figure 3.3b, which exhibited similar characteristics (and a lower SDE) while using four different outputs.
Not only did this new solution reduced the electronic complexity of the readout, but it also could be scaled with a larger number of nanowires by optimizing the different trade-off discussed above. Considering the results obtained with our 40 nanowires parallel design, this could lead to detectors with minimal detection efficiency loss at rates above 100 MHz.