Figure A.5: Measurement with a gate signal (red) of 1 ns, at a repetition rate of 50 MHz.
The gate voltage applies a current of 26μA. An additional current offset of 20μA is added at all time. The channel output is displayed in blue, with no additional amplification.
A recovery time∼10 ns is observed. This could be improved by optimizing the thermal conductivity of the insulating layers to optimize the cool down of the device.
A.3 A zero-crosstalk readout for parallel detectors
The second advantage of the h-tron is the absence of galvanic connection between the channel and the gate [113, 85]. There is no output-input feedback, which creates an opportunity to use the device as a perfect readout for multi-element detectors such as those presented in this these. Indeed, using multiple gates on a single channel, multiple nanowires could be readout with no electronic crosstalk other than possible parasitic capacitance between the layers. The h-tron fabricated were tested around 100 MHz of repetition rate and show a recovery time <10 ns. Considering the results obtained with 18 parallel nanowires presented in section 3.3, such a device without electronic crosstalk and with an optimized optical cavity could open the way to detectors working at full efficiency above 100 MHz of detection rate. Devices with three gates on a single channel have been fabricated (figure A.7) and measurements confirmed that each gate signal can be read out individually via the channel resistive switch.
Figure A.6: SEM image of the multi-layered h-tron structure built and tested in our group. In this case, the gate width was 300 nm and channel width was 5 μm.
Figure A.7: h-tron design with three independent gates on a single channel. Different gate widths (700 nm, 800 nm, and 900 nm) were fabricated for testing purposes. channel width is 5μm.
B Nanofabrication processes
Although the cleanroom nanofabrication work represents an important part of the efforts, the different processes were not described in the main text of this document for the sake of simplicity. The present chapters starts with a global description of the techniques used to transfer a computer designed patter onto a material. We will then present in greater details the different nanofabrication processes used for the fabrication of the devices designed during this thesis. The complete process flow used for the fabrication of our devices is also presented.
The different structures needed are fabricated one after the other, layer by layer, by depositing the appropriate material onto the substrate and patterning it using an Ebeam lithography or photolitoghraphy process. The fabrication process starts on a 4 inches silicon wafer, with a thin 100 nm layer of thermal silicon oxide. Most fabrication steps consist in adding a layer of a specific material on top of the wafer and give this new layer a specific pattern. Two main possibilities exist for patterning the material, which are briefly described in the following paragraphs.
(a) Material deposition and etching. (b) Lift-off of deposited material.
Figure B.1: Deposition and patterning techniques used for the fabrication of the SNSPDs.
Material Etching
Etching the pattern into the material allows for high resolution and is typically used for precise patterns such as the nanowires of our devices. The steps needed to achieve this part of the process are shown on fig B.1a.
The material is first deposited on the substrate, this can be done using different techniques (see appendix B.2). A layer of photoresist is applied on top of the new material and the pattern is then transferred onto the resist using UV photolithography or electron-beam lithography, this modifies the structure of the resist (either by hardening it or weakening it depending on the resist type). The exposed pattern is revealed by developing the resist with a solvent which will attack only the weakest area of the resist.
The photoresist layer now exposes the underlying material with the desired pattern. The exposed material can be etched using different processes. Parameters of the etching steps usually allow to choose the depth of the etching and perform partial or complete etching of the material layer. The ending point of the etching process can be difficult to define, which results in over-etching into the underneath material. Different etching processes and their characteristics are described in appendix B.3.
Lift-off
The lift-off method yields slightly lower resolution than etching. Truly vertical profiles cannot be achieved and thickness of the structure is generally limited to few hundreds of nanometers. In addition, a specific profile of the resist must be achieved to ensure that the lift-off can be performed. However a non-negligible advantage is the low impact on the integrity of previously deposited structures, which is hard to achieve using etching steps. The steps needed to achieve a lift-off are shown on fig B.1b.
The process directly starts by spin-coating the two layers of photoresists. The first layer is a specific lift-off resist (LOR) covered by a layer of conventional photoresist. The top layer is patterned with a photolithography or Ebeam-lithography step. When developing the stack of layers, the LOR will be slightly over-developed, creating the specific profile seen on fig B.1b. The material to be patterned is then deposited on the substrate in the opened areas. The profile created by the bi-layer permits the solvent to reach the resist and strip it, which takes away the unwanted material. It is also possible to replace the bi-layer by a single layer of photoresist and carefully control the exposure to produce a negative profile in the openings.
B.1. Photolithography and Electron beam lithography
substrate
light
mask
(a)
(b)
(c)
(d)
(e)
(f)
photoresist
Figure B.2: Photolithography using a hard mask. Direct writing of the pattern is also possible.
B.1 Photolithography and Electron beam lithography
Lithography, from the greek lithos (stone) andgraphein (to write) is a method originally used in printing to transfer a pattern from a stone or a metal plate onto the desired substrate. This technique has been extensively developed and used in microfabrication by using photons (photolithography) or electrons (E-Beam lithography, EBL) to write a pattern onto a sensitive polymer, referred to as “photoresist”, “ebeam resist”, or more generally “resist”. Figure B.2 shows the basic three steps of the lithographic process. The resist is first coated onto the substrate, as shown on figure B.3. The desired pattern is then exposed using photons or electrons. Finally, the pattern is developed using a selective solvent, which creates holes through the resist allowing to transfer the pattern onto the substrate via subsequent etching/deposition processes.
Figure B.3: spin coating process. a) The photoresist (green) is poured onto the surface while rotating the substrate at a low speed. b) High speed rotation of the substrate yields to an homogeneous thin film of resist, with a reproducible thickness. c) A soft back of the coated resist evaporates the solvent, stabilizing it for the remaining of the process.
Resist choice
The resist choice depends primarily on the exposure technique used, as obviously Ebeam lithography and photolithography require different materials. The wavelength of the photons used by the exposition tool will as well determine which category of photoresists can be used. Moreover parameters like critical dimension, etching chemistry, deposition thickness, etc, need to be taken into account as well. Photolithography for the fabrications of the detectors were done with AZ1512, AZ1512 on LOR for lift-off processes, AZ10-XT (which replaced the deprecated AZ9260 used previously) for DRIE processes. ZEP and PMMA were used for Ebeam lithography patterning of the nanowires (resists list on table B.1).
Photolithography
In this specific lithography technique, UV light is used to write a pattern onto a specific photosensitive polymer. The minimum pattern size is ultimately limited by the wavelength of the light used. Critical dimensions are typically in the order of a few micrometers.
Sub-micrometer resolution is possible but usually hard to achieve and is typically limited to several hundreds of nanometers. A laser can be used to directly write the desired pattern into the resist, which is known as “direct writing”. The total amount of time needed for such a process directly depends on the desired resolution, size, and number of substrates to be exposed and can typically vary from a few minutes to several hours.
For large scale manufacturing, a “hard mask” is usually first produced using direct writing photolithography to etch the desired pattern into a thin layer of metal. This mask is then used for replicating the same pattern for subsequent photolithographies, which reduces the exposure time to only a few seconds. Such a process was used in the beginning of this thesis for all lithographies, as only the nanowires needed individual patterning. Advanced designs presented in this work required specific components such as integrated resistors, or different number of electrodes. This motivated the use of direct writing photolithography as indicated in the SNSPD process flow presented in appendix B.5.
Ebeam lithography
Electron beam lithography (Ebeam Lithography, or EBL) can be used to improve the resolution of the written pattern. This is a direct writing method and hence the exposure time is highly dependent on the design. Critical dimension as low as few nanometers can be obtained, and dimensions in the order of 100 nm are easily achieved with standard processes. Different ebeam resists exist (see table B.1). PMMA was the resist of choice for our process thanks to its low cost and good overall performances. ZEP was used for
B.1. Photolithography and Electron beam lithography Table B.1: Resists available at EPFL’s CMi fabrication facilities.
RESIST TYPE
(depth <5 μm, high resolution) AZ ECI 3027 365 nm
positive 1 μm
2:1 Dry etching
depth <50μm, high pattern transfer accuracy) AZ 10XT-07 365 nm
positive 2 μm
2:1 Ion Beam Etching (IBE) AZ 10XT-20 365 nm
positive 2 μm
2:1 Ion Beam Etching (IBE) Dry etching
(depth <50 μm & vertical sidewalls) AZ 10XT-60 365 nm
positive 3 μm
4:1 Dry etching
(depth <200 μm & vertical sidewalls) High topography surface protection (dicing) Molding
AZ 40XT 365 nm
positive 3 μm
4:1 Dry etching
(depth up to 500+ μm, vias), electroplating, molding
LOR 5A used with AZ1512 Lift-off (metal thickness <300 nm) AZ nLOF 2020 365 nm
negative 1,5μ Lift-off
(higher thermal stability, metal thickness up to 1 μm)
4:1 Dry etching with high etching budget
PMMA Ebeam
positive <10 nm Dry etching vertical sidewalls
negative <10 nm Dry etching
some of the earlier fabrications, but the really high price of the products motivated the switch to other solutions. Diluted ZEP and CSAR are currently being used in our group for other projects. The final nanowire obtained after Ebeam and subsequent etching process is showed, with different imaging techniques, on figures B.4 and B.5
500 nm
Figure B.4: SEM image of the meander after Ebeam
2 !m
100 nm
200
300
400
100 nm 200
300 400
0 13 nm
Figure B.5: AFM picture of the meander after Ebeam
As the writing of the nanowire pattern is at the core of the whole fabrication process, particular care has to be taken to make sure that the Ebeam lithography is reproducible and gives clean results. This involves proper characterization of the Ebeam dose (i.e.
the total charge per square micrometer deposited by the beam), which depends on the Ebeam resist type and preparation as well as the subsequent etching process. Dense and large patterns are also sensitive to back-scattered electrons resulting from the nearby
B.2. Deposition techniques