VMIVME-7807VME-7807RC* GE Fanuc Automation

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GE Fanuc Automation

VMIVME-7807 VME-7807RC*

Intel

^®

Pentium

^®

M-Based VME SBC PRODUCT MANUAL

500-007807-000 REV. F

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The information in this document has been carefully checked and is believed to be entirely reliable. While all reasonable efforts to ensure accuracy have been taken in the preparation of this manual, GE Fanuc Embedded Systems assumes no responsibility resulting from omissions or errors in this manual, or from the use of information contained herein.

GE Fanuc Embedded Systems reserves the right to make any changes, without notice, to this or any of GE Fanuc Embedded Systems’ products to improve reliability, performance, function, or design.

GE Fanuc Embedded Systems does not assume any liability arising out of the application or use of any product or circuit described herein; nor does GE Fanuc Embedded Systems convey any license under its patent rights or the rights of others.

For warranty and repair policies, refer to GE Fanuc Embedded Systems’ Standard Conditions of Sale.

AMXbus, BITMODULE, COSMODULE, DMAbus, IOMax

,

IOWorks Access, IOWorks Foundation, IOWorks Manager, IOWorks Server, MAGICWARE, MEGAMODULE, PLC ACCELERATOR (ACCELERATION), Quick Link, RTnet, Soft Logic Link, SRTbus, TESTCAL, “The Next Generation PLC”, The PLC Connection, TURBOMODULE, UCLIO, UIOD, UPLC, Visual Soft Logic Control(ler), VMEbus Access, VMEmanager, VMEmonitor, VMEnet, VMEnet II, VMEprobe and VMIC Shutdown are trademarks and The I/O Experts, The I/O Systems Experts, The Soft Logic Experts, and The Total Solutions Provider are service marks of GE Fanuc Embedded Systems.

IOWorks, Visual IOWorks and the VMIC logo are registered trademarks of GE Fanuc Embedded Systems.

Other registered trademarks are the property of their respective owners.

This document shall not be duplicated, nor its contents used for any purpose, unless granted express written permission from GE Fanuc Embedded Systems.

RoHS Compliance

The VMIVME-7807 uses the Intel 82546EB Dual Gigabit Ethernet Controller.

The VME-7807RC uses the Intel 82546GB Dual Gigabit Ethernet Controller.

There are no other differences in Form, Fit or Function between the standard product or the RoHS compliant product with the exception of the RoHS product is free of lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls (PBBs) and polybrominated diphenyl ethers (PBDEs). In conjunction with the WEEE (Waste Electrical & Electronic Equipment) Directive 2002/96/EC (January 27, 2003).

COPYRIGHT AND TRADEMARKS

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List of Figures

. . . 9

List of Tables

. . . 11

Overview

. . . 13

Intel 855GME Chipset . . . 15

Organization of the Manual . . . 17

References . . . 18

Safety Summary . . . 19

Ground the System . . . 19

Do Not Operate in an Explosive Atmosphere . . . 19

Keep Away from Live Circuits . . . 19

Do Not Service or Adjust Alone . . . 19

Do Not Substitute Parts or Modify System . . . 19

Dangerous Procedure Warnings . . . 19

Safety Symbols Used in This Manual . . . 20

Chapter 1 - Installation and Setup

. . . 21

Unpacking Procedures . . . 22

Hardware Setup . . . 23

Installation . . . 28

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PCI Device Interrupt Map . . . 37

Integrated Peripherals . . . 38

Ethernet Controller . . . 39

10BaseT . . . 39

100BaseTX . . . 39

1000BaseT . . . 39

Video Graphics Adapter . . . 40

Digital Visual Interface (DVI) . . . 41

DVI Connectors . . . 41

Dual Head Video . . . 42

Dual Head Setup Procedure: . . . 42

Hot Keys . . . 42

Digital Video Display Modes . . . 43

Chapter 3 - Embedded PC/RTOS Features

. . . 45

VME Bridge . . . 46

I2C/SMBus Temperature Sensor . . . 46

Embedded PCI Functions . . . 47

Timers . . . 48

General . . . 48

Timer Control Status Register 1 (TCSR1) . . . 48

Timer Control Status Register 2 (TCSR2) . . . 49

Timer 1 & 2 Load Count Register (TMRLCR12) . . . 50

Timer 3 Load Count Register (TMRLCR3) . . . 50

Timer 4 Load Count Register (TMRLCR4) . . . 51

Timer 1 & 2 Current Count Register (TMRCCR12) . . . 51

Timer 3 Current Count Register (TMRCCR3) . . . 51

Timer 4 Current Count Register (TMRCCR4) . . . 52

Timer 1 IRQ Clear (T1IC) . . . 52

Watchdog Timer . . . 54

General . . . 54

WDT Control Status Register (WCSR) . . . 54

WDT Keepalive Register (WKPA) . . . 55

NVRAM . . . 56

VME Control . . . 57

CompactFlash Disk . . . 58

Configuration . . . 58

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Table of Contents

Maintenance

. . . 61

Maintenance Prints . . . 62

Compliance Information

. . . 63

CE . . . 64

International Compliance . . . 64

European Union . . . 64

United States . . . 64

Australia/New Zealand . . . 64

Japan . . . 64

Canada . . . 64

FCC Part 15 . . . 65

FCC Class A . . . 65

Canadian Regulations . . . 65

Appendix A - Connector Pinouts

. . . 67

VME Connector Pinout . . . 68

VME P1 Connector and Pinout . . . 68

VME P2 Connector and Pinout . . . 69

Serial Connector (J22) and Pinout . . . 70

Mouse/Keyboard Connector and Pinout (J10) . . . 71

Ethernet Connector Pinout (10/100Mbit) J15 . . . 73

PMC Site Connectors and Pinouts . . . 74

PMC (J11) Connector and Pinout . . . 74

USB Connectors (J16 and J17) . . . 77

Gigabit Ethernet Connector and Pinout (J18) . . . 78

Appendix B - AMI BIOS Setup Utility

. . . 79

First Boot . . . 80

Main . . . 81

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Appendix C - Argon BIOS

. . . 89

Boot Menus . . . 90

First Boot Menu . . . 90

Boot Menu . . . 90

BIOS Features Setup . . . 92

RPL . . . 92

TCP/IP . . . 92

Netware . . . 93

PXE . . . 93

Appendix D - System Driver Software

. . . 95

Microsoft Windows 2000 Professional Software Driver Installation . . . 96

Video Driver Installation . . . 96

6300ESB (Hance Rapids) ICH Chipset Software Installation . . . 96

USB 2.0 EHCI Host Controller . . . 97

Ethernet Adapter Drivers Installation . . . 97

Microsoft Windows XP Professional Software Driver Installation . . . 98

Video Driver Installation . . . 98

6300ESB (Hance Rapids) Chipset Software Installation . . . 98

USB 2.0 EHCI Host Controller . . . 99

Ethernet Adapter Drivers Installation . . . 99

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List of Figures

VMIVME-7807/VME-7807RC Block Diagram . . . 16

VMIVME-7807/VME-7807RC PMC Site and Switch Locations . . . 24

Installing a PMC Card on the VMIVME-7807/VME-7807RC . . . 29

Backside Mounting for the PMC Card . . . 30

VMIVME-7807/VME-7807RC Front Panels . . . 32

Front Panels Layout . . . 33

VME P1 Connector Diagram. . . 68

VME P2 Connector Diagram . . . 69

Serial Connectors and Pinouts . . . 70

Mouse Connector and Pinout . . . 71

Mouse/Keyboard Y Splitter Cable . . . 72

Ethernet Connector and Pinout . . . 73

PMC (J11) Connector . . . 74

USB Connectors and Pinouts . . . 77

Dual Gigabit Ethernet Connector (J18) and Pinout . . . 78

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This page is intentionally left blank.

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List of Tables

Table 1-1 CPU Board Connectors and Switches . . . 25

Table 1-2 Battery Enable (User Configurable) - Jumper (E3) . . . 25

Table 1-3 VME System Controller (User Configurable) - Switch (S1) . . . 26

Table 1-4 Password Clear/BIOS Boot Mode (User Configurable) - Switch (S2) . . . 26

Table 1-5 Universe II Mapping/SYSFAIL Generation (User Configurable) - Switch (S6) . . . 27

Table 1-6 VME Strapping (User Configurable) - Switch (S7) . . . 27

Table 2-1 PCI Device Interrupt Mapping by the BIOS . . . 37

Table 2-2 Supported Graphics Video Resolutions for Windows 2000 (Analog) . . . 40

Table 2-3 Supported Graphics Video Resolutions for Windows XP (Analog) . . . 40

Table 2-4 Partial List of Display Modes Supported . . . 43

Table 3-1 PCI Configuration Space Registers . . . 47

Table 3-2 Register Definitions Offset From BAR0 . . . 57

Table A-1 VME P1 Connector Pinout . . . 68

Table A-2 VME P2 Connector Pinout . . . 69

Table A-3 Keyboard/Mouse Y Splitter Cable . . . 72

Table A-4 PMC (J11) Connector Pinout . . . 74

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Overview

Introduction

GE Fanuc Embedded Systems’ VMIVME-7807/VME-7807RC are full featured Pentium^® M-based, single board computers (SBCs) in a single-slot, passively cooled, VME Eurocard form factor. These products utilize the advanced technology of Intel^®’s 855GME chipset.

The VMIVME-7807/VME-7807RC provide features typically found on desktop systems such as:

• 1.0GB DDR SDRAM using one SODIMM and an optional 512MB of solder-in memory for a maximum of 1.5GB

• Built-in SVGA support (front panel connection)

• Digital video controller (rear I/O) DVI-D with dual head display capabilities

• 10/100 Mbit Ethernet controller (front panel connection)

• Dual Gigabit Ethernet supporting (front panel or rear I/O)

• Optional P0 with VITA 31.1 interface

• Serial ATA (SATA) support (rear I/O)

• Serial port COM1 (front panel connection)

• Ultra IDE drive support (rear I/O)

• Real-Time clock/calendar

• Front panel reset switch

• Miniature speaker

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The VMIVME-7807/VME-7807RC provide features useful to embedded applications such as:

• Three serial ports: COM2, COM3 and COM4 (rear I/O)

• Four USB 2.0 ports (two on front panel and two rear I/O)

• 32KB of nonvolatile RAM

• Remote Ethernet booting

• Up to 2GB of CompactFlash on secondary IDE (optional)

• Software-selectable Watchdog Timer with reset

Additionally, the VMIVME-7807/VME-7807RC offer one PMC expansion site (PCI-X, 66MHz) with front panel access. The VMIVME-7807/VME-7807RC are capable of executing many of today’s operating systems such as VxWorks^®, Solaris™ or QNX^®. The embedded features of the VMIVME-7807/VME-7807RC are described in

Chapter 3 of this manual.

The VMIVME-7807/VME-7807RC are suitable for use in applications ranging from telecommunications, simulation, instrumentation, industrial control, process control and monitoring, factory automation, automated test systems, data acquisition systems and anywhere that the highest performance processing power in a single VME slot is desired.

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Intel 855GME Chipset

Intel 855GME Chipset

The VMIVME-7807/VME-7807RC incorporate the latest Intel chipset technology, the 855GME. This chipset utilizes Advanced Hub Architecture (AHA). The AHA allows for increased system performance by separating many high-bandwidth I/O accesses from PCI accesses, relieving bottlenecks on the PCI bus. Furthermore, the 855GME chipset brings new levels of integration to motherboard chipsets and provides additional features such as Integrated LVDS and Serial ATA.

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VME-7807RC

VMIVME-7807/

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Organization of the Manual

Organization of the Manual

This manual is composed of the following chapters and appendices:

Chapter 1 - Installation and Setup describes unpacking, inspection, hardware jumper settings, connector definitions, installation, system setup and operation of the VMIVME-7807/VME-7807RC .

Chapter 2 - Standard Features describes the unit design in terms of the standard PC memory and I/O maps, along with the standard interrupt architecture.

Chapter 3 - Embedded PC/RTOS Features describes the unit features that are beyond standard functions.

Maintenance provides information relative to the care and maintenance of the unit.

Compliance provides applicable information regarding regulatory compliance.

Appendix A - Connector Pinouts illustrates and defines the connectors included in the unit’s I/O ports.

Appendix B - AMI BIOS Setup Utility describes the menus and options associated with the AMI (system) BIOS.

Appendix C - Argon BIOS describes the menus and options associated with the LAN Boot BIOS.

Appendix D - System Driver Software describes the steps required to load system drivers.

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Intel Pentium M Processor Datasheet

June 2003, Order Number 252612-002

Intel 855GME Chipset Graphics and Memory Controller Hub (GMCH)

March 2003, Order Number 252615-001

Intel 6300ESB I/O Controller Hub

February 2004, Order Number 300641-001

PCI Local Bus Specification, Rev. 2.2

PCI Special Interest Group P.O. Box 14070 Portland, OR 97214 (800) 433-5177 (U.S.) (503) 797-4207 (International)

(503) 234-6762 (FAX)

LPC47M107 100-Pin Enhanced Super I/O with LPC Interface for Consumer Applications

Standard Microsystems Corp.

80 Askay Dr.

Hauppauge, NY 11788-8847 www.smsc.com

CMC Specification, P1386/Draft 2.0 from:

IEEE Standards Department Copyrights and Permissions 445 Hoes Lanes, P.O. Box 1331

Piscataway, NJ 08855-1331

PMC Specification, P1386.1/Draft 2.0 from:

IEEE Standards Department Copyrights and Permissions 445 Hoes Lanes, P.O. Box 1331 Piscataway, NJ 08855-1331, USA

The following is useful information related to the operation of the I²C controllers:

The I

²

C Specification version 2.0

Philips Semiconductor 811 East Arques Ave.

Sunnyvale, CA 94088-3409 (800) 234-7381

www.semiconductors.philips.com

I

²

C/SMBus-Compatible Remote/Local Temperature Sensors with Overtemperature Alarms

Maxim Integrated Products, Inc.

120 San Gabriel Drive Sunnyvale, CA 94086 USA

408-737-7600 800-629-4642

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Safety Summary

Safety Summary

The following general safety precautions must be observed during all phases of the operation, service, and repair of this product. Failure to comply with these

precautions or with specific warnings elsewhere in this manual violates safety standards of design, manufacture, and intended use of this product.

GE Fanuc Embedded Systems assumes no liability for the customer's failure to comply with these requirements.

Ground the System

To minimize shock hazard, the chassis and system cabinet must be connected to an electrical ground. A three-conductor AC power cable should be used. The power cable must either be plugged into an approved three-contact electrical outlet or used with a three-contact to two-contact adapter with the grounding wire (green) firmly connected to an electrical ground (safety ground) at the power outlet.

Do Not Operate in an Explosive Atmosphere

Do not operate the system in the presence of flammable gases or fumes. Operation of any electrical system in such an environment constitutes a definite safety hazard.

Keep Away from Live Circuits

Operating personnel must not remove product covers. Component replacement and internal adjustments must be made by qualified maintenance personnel. Do not replace components with power cable connected. Under certain conditions,

dangerous voltages may exist even with the power cable removed. To avoid injuries, always disconnect power and discharge circuits before touching them.

Do Not Service or Adjust Alone

Do not attempt internal service or adjustment unless another person, capable of rendering first aid and resuscitation, is present.

Do Not Substitute Parts or Modify System

Because of the danger of introducing additional hazards, do not install substitute parts or perform any unauthorized modification to the product. Return the product to GE Fanuc Embedded Systems for service and repair to ensure that safety features are maintained.

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Safety Symbols Used in This Manual

STOP: This symbol informs the operator that a practice or procedure should not be performed.Actions could result in injury or death to personnel, or could result in damage to or destruction of part or all of the system.

WARNING: This sign denotes a hazard. It calls attention to a procedure, practice, or condition, which, if not correctly performed or adhered to, could result in injury or death to personnel.

CAUTION: This sign denotes a hazard. It calls attention to an operating procedure, practice, or condition, which, if not correctly performed or adhered to, could result in damage to or destruction of part or all of the system.

NOTE: Calls attention to a procedure, practice, or condition which is essential to highlight.

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CHAPTER

Installation and Setup

Introduction

This chapter describes the hardware jumper settings, connector descriptions, installation, system setup and operation of the VMIVME-7807/VME-7807RC .

1

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Unpacking Procedures

Any precautions found in the shipping container should be observed. All items should be carefully unpacked and thoroughly inspected for damage that might have occurred during shipment. The board(s) should be checked for broken components, damaged printed circuit board(s), heat damage and other visible contamination. All claims arising from shipping damage should be filed with the carrier and a complete report sent to GE Fanuc Embedded Systems Customer Care along with a request for advice concerning the disposition of the damaged item(s).

CAUTION: Some of the components assembled on GE Fanuc Embedded Systems products may be sensitive to electrostatic discharge and damage may occur on boards that are subjected to a high energy electrostatic field. When the board is placed on a bench for configuring, etc., it is suggested that conductive material be inserted under the board to provide a conductive shunt. Unused boards should be stored in the same protective boxes in which they were shipped.

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Hardware Setup

1 Hardware Setup

The VMIVME-7807/VME-7807RC are factory populated with user-specified options as part of the VMIVME-7807/VME-7807RC ordering information. The memory size and CompactFlash sizes are not user-upgradable. To change memory or

CompactFlash size, contact Customer Care to receive a Return Material Authorization (RMA). RMAs are available from rma@gefanuc.com.

GE Fanuc Embedded Systems Customer Care is available at: 1-800-GEFANUC (1-800-433-2682),1-780-401-7700 or

E-mail us at support.embeddedsystems@gefanuc.com

The VMIVME-7807/VME-7807RC are tested for system operation and shipped with factory-configured jumpers and switches. The physical location of the switches, jumpers and connectors for the SBC are illustrated in Figure 1-1 on page 24. The definitions of the SBC switches, jumpers and connectors are included in Table 1-1 through Table 1-4. Please note that the VMIVME-7807/VME-7807RC offer one PMC site designated PMC #1 as shown in Figure 1-1 on page 24.

CAUTION: All jumpers marked User Configurable in the following tables may be changed or modified by the user. All jumpers marked Factory Configured should not be modified by the user.

Care must be taken when making jumper modifications to ensure against improper settings or connections. Improper settings may result in damage to the unit.

Modifying any jumper not marked User Configurable will void the Warranty and may damage the unit.

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P2 P1

Tundra Universe

Pentium-M Processor

CompactFlash (Optional)

(Optional) J12

J13 J11

E3

SODIMM

1 2 ON 1 2S8 1 2 S1 S2 ON 1 2S6

S7

S1 Position 1, Off = Default (Board’s Controller Status - determined by its chassis slot).

S1 Position 1, On = Enables the board to be either the system controller or non-system controller depending on S1, position 2's settings.

S1 Position 2, Off = Default (Forces the board to be system controller regardless of the slot it is installed in).

S1 Position 2, On = Forces the board to non-system controller regardless of the slot it is installed in.

S1 System Controller Jumper installed,

battery enable.

Jumper removed, battery disabled.

E3 Battery Enable

E3

Battery Enable

S8 CompactFlash S8 Position 1, Off = Default (Write Enabled) S8 Position 1, On = Write Protected S8 Position 2 = Not used

S2

S1

ON

1 2

ON

1 2

S7 Position 1, On = Default (Enables VME SYSRESET Driver) S7 Position 1, Off = Disables VME SYSRESET Driver.

S7 Position 2, On = Default (Enables SYSRESET Receiver) S7 Position 2, Off = Disables VME SYSRESET Receiver.

S7 VME SYSRESET

S7

ON 1 2

S6 Position 1, On = Default (Enable SYSFAIL generation) S6 Position 1, Off = Disable SYSFAIL generation S6 Position 2, On = Default (Map UNIV2 to Memory Space) S6 Position 2, Off = Map UNIV2 to I/O Space

S6 Universe II Mapping/ SYSFAIL Generation

S6

ON 1 2

S8

S2 Position 1, Off = Default (Normal Operation) S2 Position 1, On = Clear CMOS

S2 Position 2, Off = Default (Boot Halt with Post Errors) S2 Position 2, On = Boot with Post Errors

S2 CMOS Clear/BIOS Boot Mode

ON

1 2 ON1 2 ON 1 2

ON 1 2

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Hardware Setup

1

Table 1-1 SBC Connectors and Switches

Connector Function

P1 VME interface connector

P2 USB 2.0, Serial ATA, digital video, IDE, COM2, 3 and 4, optional Gigabit Ethernet

P0 VITA 31.1 Interface connector (optional)

P3 CompactFlash socket

J16 and J17 USB ports

J10 Keyboard/Mouse PS/2 Type connector

J9 ITP connector

J15 10/100 Mb RJ45 Ethernet connector J18 Gigabit Ethernet connector (optional) J11, J12 and J13 PMC Site Connector

J22 Serial port connector (COM1)

J19 SVGA connector

J21 GE Fanuc Embedded Systems’ PCI expansion connector (PMC237CM1/V)

B1 Battery

Switches Function

S1 System Controller

S2 CMOS clear switch/BIOS Boot Mode S4 Reset switch (Front Panel)

S6 Map Universe II to I/O Space

S7 VME SYSRESET

Table 1-2 Battery Enable (User Configurable) - Jumper (E3)

Select Jumper Position

Battery Enabled On

Battery Disabled Off

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NOTE: The BIOS has the capability (not currently enabled) of password protecting casual access to the unit’s CMOS set-up screens. The Password Clear switch allows the user to clear the CMOS and password in the case of a system BIOS malfunction or forgotten password.

To clear the CMOS password:

1. Turn off power to the unit.

2. Move switch S2 position 1 to On.

3. Wait approximately 5 seconds.

4. Move switch S2 position 1 to Off.

5. Power up the unit.

When power is reapplied to the unit, the CMOS password will have been cleared and the CMOS will be set to its defaults.

Table 1-3 VME System Controller (User Configurable) - Switch (S1)

Position Function State

1 - 4 Normal Operation (Default) Off

1 - 4 Enables System or non-system controller (any slot) On

2 - 3 Force system controller (any slot) Off

2 - 3 Force system or non-system controller (any slot) On

Table 1-4 Password Clear/BIOS Boot Mode (User Configurable) - Switch (S2)

1 - 4 Normal Off

1 - 4 Clear CMOS/Password On

2 - 3 Boot with Post Errors On

2 - 3 Boot Halt on Post Errors Off

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Hardware Setup

1

Table 1-5 Universe II Mapping/SYSFAIL Generation (User Configurable) - Switch (S6)

1 - 4 Map UNIV2 to I/O Space On

1 - 4 Map UNIV2 to Memory Space Off

2 - 3 Enable SYSFAIL Generation On

2 - 3 Disable SYSFAIL Generation Off

Table 1-6 VME Strapping (User Configurable) - Switch (S7)

1 - 4 Enable VME SYSRESET Driver Off

2 - 3 Enable SYSRESET Receiver Off

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Installation

The VMIVME-7807/VME-7807RC conform to the VME physical specification for a 6U board. The VMIVME-7807/VME-7807RC can be used for system control or as a peripheral board. They can be plugged directly into any standard chassis accepting either type of board.

The following steps describe the GE Fanuc Embedded Systems-recommended method for installation and powerup of the VMIVME-7807/VME-7807RC :

1. If a PMC module is to be used, connect it to the VMIVME-7807/VME-7807RC prior to board installation (as shown in Figure 1-2 on page 29). Refer to the Product Manual for the PMC module for configuration and setup.

NOTE: Air flow requirements as measured at the output side of heatsink is to be greater than 450LFM.

2. Insert the VMIVME-7807/VME-7807RC into a VME chassis system controller or peripheral slot. While ensuring that the board is properly aligned and oriented in the supporting board guides, slide the board smoothly forward against the mating connectors. Use the ejector handles to firmly seat the board.

3. All needed peripherals can be accessed from the front panel or the rear I/O VMIACC-0586/ACC-0586RC or VMIACC-0590/ACC-0590RC Rear Transition Modules (RTMs). Each connector is clearly labeled on the front panel and detailed pinouts are in Appendix A.

4. Connect a keyboard and mouse if the system has not been previously configured.

5. The VMIVME-7807/VME-7807RC feature an optional CompactFlash Disk resident on the board. Refer to Chapter 3 for set up details.

6. If an external drive module is installed, the BIOS Setup program must be used to configure the drive types. See Appendix B to properly configure the system.

7. If a drive module is present, install the operating system according to the manufacturer’s instructions.

BIOS Setup

The VMIVME-7807/VME-7807RC have an onboard BIOS Setup program that controls many configuration options. These options are saved in a special non-volatile, battery-backed memory chip and are collectively referred to as the board’s ‘CMOS Configuration’. The CMOS configuration controls many details concerning the behavior of the hardware from the moment power is applied.

Details of the VMIVME-7807/VME-7807RC BIOS setup program are included in Appendix B.

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Installation

1

Figure 1-2 Installing a PMC Card on the VMIVME-7807/VME-7807RC

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Figure 1-3 Backside Mounting for the PMC Card Back of VMIVME-7807 SBC

(Solder Side)

Back of V

MIVME -7807/V

ME-78

07RC SBCs (Solder S

ide)

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Front/Rear Panel Connectors

1 Front/Rear Panel Connectors

The VMIVME-7807/VME-7807RC provide front panel access for the PMC expansion site, an optional Gigabit Ethernet port, one 10/100 RJ45 connector, one serial port, SVGA, keyboard/mouse, the manual reset switch and the status LEDs. A drawing of the VMIVME-7807/VME-7807RC front panels are shown in Figure 1-5. The front panel connectors and indicators are labeled as follows:

• 10/100 10/100 Mbit Ethernet connector

• G1 10/100/1000 Mbit Ethernet connector 1 (or LEDs) port 1

• G2 10/100/1000 Mbit Ethernet LEDs port 2

• M/K Mouse/keyboard connector

• COM1 Serial Port

• RST Manual reset switch

• S Status LEDs

• SVGA Analog Video connector

The VMIVME-7807/VME-7807RC provide rear I/O support for the following: digital video, Serial ATA, COM2, 3 and 4, IDE drive and two USB ports. These signals are accessed by the use of an RTM such as the VMIACC-0586/ACC-0586RC and the VMIACC-0590/ACC-0590RC, which terminates into industry standard connectors.

The front panel connectors, including connector pinouts and orientation, for the VMIVME-7807/VME-7807RC are defined in Appendix A. Rear panel connections are defined in the appropiate RTM Installation Guide. Contact Sales for compatible RTMs offered by GE Fanuc Embedded Systems.

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Figure 1-4 VMIVME-7807/VME-7807RC Front Panels

1101.10 Front Panel

with Gigabit Ethernet Front Panel Access

1101.10 Front Panel

without Gigabit Ethernet Front Panel Access VME Standard

Front Panel with Gigabit Ethernet Front Panel Access

VME Standard Front Panel

without Gigabit Ethernet Front Panel Access

VMIVME 7807

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Front/Rear Panel Connectors

1 Front Panel Layout

Status LEDs (from left to right)

Sysfail VME failure- Lights during VME SYSFAIL condition, (Red LED).

PWR Power - Indicates when power is applied to the board, (Green LED).

IDE Activity Indicator - Flashes when IDE activity is occurring, (Yellow LED).

Boot Done Booting - Indicates BIOS Boot is in progress. When LED is off, CPU has finished POST and is ready, (Red LED).

RST Switch Reset - Allows the system to be reset from the front panel.

10/100 Ethernet LEDs

Link Indicates the Ethernet is active, (Green LED).

Activity Indicates whether 10BaseT (Yellow LED) or 100BaseTX Green LED) mode is active.

Front Gigait Ethernet LEDs

Link Indicates the Ethernet is active, (Yellow LED).

Activity Indicates whether 10BaseT (LED Off),

100BaseTX (Yellow LED) or 1000BaseT (Green LED) Ethernet mode is active.

Rear Gigait Ethernet LEDs

P M C

U S B

G 2 G 1

RST S

VMIVME 7807

1 0 / 1 0 0

C O M 1

PMC

USBs

10/100 Gigabit Ethernet

Gigabit Ethernet

LEDs

COM1 Mouse/

Keyboard

SVGA

Link

Activity Link

Link Activity

Activity

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CHAPTER

Standard Features

Introduction

The VMIVME-7807/VME-7807RC are Pentium M processor-based single board computers compatible with modern industry standard desktop systems. The VMIVME-7807/VME-7807RC therefore retain industry standard memory and I/O maps along with a standard interrupt architecture. The integrated peripherals described in this section (such as serial ports, USB ports, IDE drives, floppy drives, video controller and Ethernet controller) are all memory mapped the same as similarly equipped desktop systems, ensuring compatibility with modern operating systems.

The following sections describe the standard features of the VMIVME-7807/VME-7807RC.

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CPU

The VMIVME-7807/VME-7807RC CPUs are factory populated with Pentium M processors. The CPU speed and Memory/CompactFlash size are user specified as part of the VMIVME-7807/VME-7807RC ordering information.

To change memory size or CompactFlash size contact Customer Care to receive a Return Material Authorization (RMA). RMAs are available at rma@gefanuc.com.

GE Fanuc Embedded Systems Customer Care is available at: 1-800-GEFANUC (or 1-800-433-2682), 1-780-401-7700 or

E-mail us at support.embeddedsystems@gefanuc.com.

Physical Memory

The VMIVME-7807/VME-7807RC provide DDR Synchronous DRAM (SDRAM) as onboard system memory. Memory can be accessed as bytes, words or longwords.

The VMIVME-7807/VME-7807RC accept one 200-pin DDR SDRAM SODIMM along with the optional solder-in 512MB onboard memory, for a maximum capacity of 1.5GB. The onboard DRAM is accessible to the VME through the PCI-to-PCI bridge and is addressable by the local processor.

NOTE: Memory capacity may change due to part availability.

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PCI Device Interrupt Map

2 PCI Device Interrupt Map

The PCI bus-based external devices include the Universe IID bridge, PMC site, Ethernet controllers, FPGA and the GE Fanuc Embedded Systems connector. The default BIOS maps these external devices to the PCI Interrupt Request (PIRQx) lines of the 6300ESB I/O controller Hub. This mapping is defined in Table 2-1.

* The Device ID for the Intel 82546EB is 1010H.

The Device ID for the Intel 82546GB is 1079H.

Table 2-1 PCI Device Interrupt Mapping by the BIOS

Device PGNT PREQ IDSEL IRQ Vendor ID Device ID

Universe IID PCI0_GNT[1]# PCI0_REQ[1]# PCI0_AD[29] PCI_IRQE# 10E3H 0001H PMC Site PCI_GNT[3]# PCI_REQ[3]# PCI_AD[30] PCI_IRQC# Customer Customer Gigabit Ethernet #1 PCI_GNT[0]# PCI1_REQ[0]# PCI_AD[21] PCI_IRQA# 8086H 1010H

1079H*

Gigabit Ethernet #2 PCI_GNT[1]# PCI1_REQ[0]# PCI_AD[21] PCI_IRQB# 8086H 1010H 1079H*

82551 PCI_GNT[2]# PCI0_REQ[2]# PCI_AD[28] PCI_IRQF# 8086H N/A

FPGA N/A N/A PCI_AD[21] PCI_IRQD# N/A N/A

GE Fanuc Embedded Systems Conn

PCI_GNT[3]# PCI0_REQ[3]# PCI_AD[20] PCI_IRQ[A:D]# N/A N/A

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Integrated Peripherals

The VMIVME-7807/VME-7807RC incorporate an SMSC Super I/O (SIO) chip. The SIO provides the VMIVME-7807/VME-7807RC with two 16550 UART-compatible serial ports, keyboard and mouse port. The keyboard and mouse ports are available via the front panel using a standard PS/2 type connector. COM1 is accessed via the front panel. COM2 is routed to the VME P2 connector.

COM ports 3 and 4 are also provided by the 6300ESB I/O Controller Hub and are routed to the VME P2 connector.

The parallel IDE interface is provided by the Intel 6300ESB I/O Controller Hub. The IDE interface supports two channels: primary and secondary. The secondary channel is routed onboard to the optional CompactFlash socket. The primary channel is routed out of the VME P2 backplane connector to an RTM which terminates into a standard 40-pin header. This channel can support a master and slave drive. The IDE interface on the VMIVME-7807/VME-7807RC supports Ultra ATA/33, Ultra ATA/66 and Ultra ATA/100 drives and automatically determines the proper operating mode based on the type of drive used. In order to properly function in the Ultra ATA/100 mode, a special 80 conductor cable must be used instead of the standard 40 conductor cable.

This cable is typically available from the Ultra ATA/100 drive manufacturer.

A Serial ATA Drive Interface is also provided by the 6300ESB I/O Controller Hub. The Serial ATA port can be used alone or in limited conjunction with the parallel IDE interface.

NOTE: Selection of drive type (parallel or serial), along with detailed IDE/ATA selections is available in the CMOS Advanced BIOS Setup Menu.

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Ethernet Controller

2 Ethernet Controller

The network capability is provided by the Intel 82546EB for the VMIVME-7807 or the Intel 82546GB for the VME-7807RC Ethernet Controller for Gigabit Ethernet and the Intel 82551 10/100 Mbit Ethernet. These Ethernet controllers are PCI bus based and are software configurable. The VMIVME-7807/VME-7807RC supports 10BaseT, 100BaseTX and 1000BaseT Ethernet.

10BaseT

A network based on the 10BaseT standard uses unshielded twisted-pair cables, providing an economical solution to networking by allowing the use of existing telephone wiring and connectors. The RJ45 connector is used with the 10BaseT standard. 10BaseT has a maximum length of 100 meters.

100BaseTX

The VMIVME-7807/VME-7807RC also supports the 100BaseTX Ethernet. A network based on a 100BaseTX standard uses unshielded twisted-pair cables and a RJ45 connector. 100BaseTX has a maximum length of 100 meters.

1000BaseT

The VMIVME-7807/VME-7807RC support 1000BaseT Ethernet using the Intel 82546EB for the VMIVME-7807 or the Intel 82546GB for the VME-7807RC dual Ethernet controller. The interface uses shielded cables with four pairs of conductors, along with an RJ45 connector on the front panel or routed to the VME P2 connector.

The Gigabit Ethernet is also available with the optional VITA 31.1 routed out of the optional P0 connector.

NOTE: Ethernet activity is noted on the front panel LEDs by a blinking yellow LED.

The yellow LED will be on continuously when the Ethernet port is linked but with no activity.

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Video Graphics Adapter

The SVGA port on the VMIVME-7807/VME-7807RC is controlled by the Intel 855GME Graphic and Memory Controller Hub (GMCH). The GMCH is hardware and BIOS compatible with the industry SVGA and digital video standards supporting both VESA high-resolution and extended video modes. Table 2-2 and Table 2-3 show the graphics video modes supported by the GMCH video controller for analog monitors.

Not all SVGA monitors support resolutions and refresh rates beyond 640 x 480 at 85Hz. Do not attempt to drive a monitor to a resolution or refresh rate beyond its capability.

NOTES: The VMIACC-0586/ACC-0586RC or the VMIACC-0590/ACC-0590RC RTMs are required for graphics operation when using the digital video out the P2 backplane connector.

Table 2-2 Supported Graphics Video Resolutions for Windows 2000 (Analog) Screen

Resolution Maximum Colors Maximum Refresh Rates (Hz) 640 x 480 256, High and True

are supported at all resolutions.

85

768 x 1024 85

800 x 600 85

1024 x 768 85

1024 x 1280 75

1200 x 1600 60

1280 x 1024 75

1600 x 1200 60

Table 2-3 Supported Graphics Video Resolutions for Windows XP (Analog) Screen

Resolution Maximum Colors Maximum Refresh Rates (Hz) 640 x 480 High and True are

supported at all resolutions.

85

800 x 600 85

1024 x 768 85

1080 x 1280 75

1600 x 1200 60

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Video Graphics Adapter

2 Digital Visual Interface (DVI)

The VMIVME-7807/VME-7807RC have a Digital Visual Interface that provides a high-speed digital connection for visual data types that are display technology independent. DVI is a display interface developed in response to the proliferation of digital flat-panel displays. For the most part, these displays are currently connected to an analog Video Graphics Array (VGA) interface and, thus, require a double

conversion.

The digital signal from the computer must be converted to an analog signal for the analog VGA interface, then converted back to a digital signal for processing by the flat-panel display. This inherently inefficient process takes a toll on performance and video quality and adds cost. In contrast, when a flat-panel display is connected to a digital interface, no digital-to-analog conversion is required.

DVI uses Silicon Image's PanelLink, a high-speed serial interface that uses Transition Minimized Differential Signaling (TMDS) to send data to the monitor. The DFP and VESA Plug and Display interfaces also use PanelLink. For this reason, DVI can work with these previous interfaces by using adapter cables (depending on the signal quality of the adapter.)

DVI also supports the VESA Display Data Channel (DDC) and the Extended Display Identification Data (EDID) specifications. DDC is a standard communications channel between the display adapter and monitor. EDID is a standard data format containing monitor information such as vendor information, monitor timing, maximum image size, and color characteristics. EDID information is stored in the display and is communicated over the DDC. EDID and DDC enable the system, display and graphics adapter to communicate so that the system can be configured to support specific features available in the display.

DVI Connectors

The DVI connector has 24 pins that can accommodate up to two TMDS links and the VESA DDC and EDID services. The DVI specification defines two types of connectors (see Figure 1):

• DVI-Digital (DVI-D) supports digital displays only (used on the VMIVME-7807/VME-7807RC)

• DVI-Integrated (DVI-I) supports digital displays and is backward compatible with analog displays (not supported)

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Dual Head Video

The VMIVME-7807/VME-7807RC are capable of driving two monitors at the same time using the Intel 855GME GMCH. The graphics controller allows the use of one digital monitor connected to the VMIACC-0590/ACC-0590RC or VMIACC-0586/

ACC-0586RC RTMs, routed out the rear I/O P2 connector. The second is a standard SVGA monitor connected to the front panel of the VMIVME-7807/VME-7807RC, using a standard DB15 connector.

Dual Head Setup Procedure:

1. Boot Windows 2000.

2. In the windows desktop right click.

3. When the menu appears, scroll down to the ‘Graphics Options’ and then click on ‘Graphics Properties’. The Intel 82852/82855GM/GME graphics controller properties menu will appear. From this menu you can choose the display mode of choice.

The monitors can be displayed in several modes:

• Monitor Mode - In this mode only the SVGA monitor is displayed.

• Digital Mode - In this mode only the Digital is displayed.

• Dual Display Clone Mode - In this mode both the SVGA and the Digital monitors are displayed, with the desktop the same on both monitors.

• Extended Desktop Mode - In this mode the two monitors are displayed as one desktop.

4. After making your choice click ‘OK’ to apply the changes.

NOTE: When using the Dual Head mode, the maximum resolution for each monitor is 1600x1200 for the 855GME. Refer to manufacturer’s documentation for the

resolutions of each monitor used.

Hot Keys

The Intel 855GME Graphic and Memory Controller allows the use of hot keys to set up the monitors:

Action Hot Key Combination Enable Monitor <CRTL><ALT><F1>

Enable Notebook <CRTL><ALT><F3>

Enable Digital Display <CRTL><ALT><F4>

Invoke Graphics Properties <CRTL><ALT><F12>

Rotate Normal <CRTL><ALT><UP>

Rotate 90 Degrees <CRTL><ALT><LEFT>

Rotate 180 Degrees <CRTL><ALT><DOWN>

Rotate 270 Degrees <CRTL><ALT><RIGHT>

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Video Graphics Adapter

2 Digital Video Display Modes

High-resolution digital graphics and multimedia-quality video are supported on the VMIVME-7807/VME-7807RC using the 855GME (GMCH) chipset internal graphics controller. Screen resolutions up to 1,600 x 1,200 x 256 colors (single view mode) are supported by the graphics adapter.

Table 2-4 Partial List of Display Modes Supported Resolution

Bits Per Pixel (Frequency in Hz) 8-bit Indexed 16-bit 24-bit

320 x 200 70 70 70

320 x 240 70 70 70

352 x 480 70 70 70

352 x 576 70 70 70

400 x 300 70 70 70

512 x 384 70 70 70

640 x 400 70 70 70

640 x 480 60, 70, 72, 75, 85 60, 70, 72, 75, 85 60, 70, 72, 75, 85

720 x 480 75, 85 75, 85 75, 85

720 x 576 60, 75, 85 60, 75, 85 60, 75, 85 800 x 600 60, 70, 72, 75, 85 60, 70, 72, 75, 85 60, 70, 72, 75, 85 1,024 x 768 60, 70, 72, 75, 85 60, 70, 72, 75, 85 60, 70, 72, 75, 85 1,152 x 864 60, 70, 72, 75, 85 60, 70, 72, 75, 85 60, 70, 72, 75, 85 1,280 x 720 60, 75, 85 60, 75, 85 60, 75, 85 1,280 x 960 60, 75, 85 60, 75, 85 60, 75, 85 1,280 x 1,024 60, 70, 72, 75, 85 60, 70, 72, 75, 85 60, 70, 75, 85 1,600 x 900 60, 75, 85 60, 75, 85

1,600 x 1,200 60, 70, 72, 75

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CHAPTER

Embedded PC/RTOS Features

Introduction

GE Fanuc Embedded Systems’ VMIVME-7807/VME-7807RC feature additional capabilities beyond those of a typical desktop computer system. The units provide four software-controlled, general-purpose timers along with a programmable Watchdog Timer for synchronizing and controlling multiple events in embedded applications. The VMIVME-7807/VME-7807RC also provide a bootable

CompactFlash Disk system and 32KB of non-volatile RAM. Also, the VMIVME-7807/

VME-7807RC support an embedded intelligent VME bridge to allow compatibility with the most demanding VME applications. These features make the unit ideal for embedded applications, particularly where standard hard drives and floppy disk

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VME Bridge

In addition to their desktop functions, the VMIVME-7807/VME-7807RC have the following VME features:

• Complete six-line Address Modifier (AM-Code) programmability

• VME data interface with separate hardware byte/word swapping for master and slave accesses

• Support for VME64 multiplexed MBLT 64-bit VME block transfers

• User-configured interrupter

• User-configured interrupt handler

• System Controller mode with programmable VME arbiter (PRI, SGL and RRS modes are supported)

• VME BERR bus error timer (software programmable)

• Slave access from the VME to local RAM and mailbox registers

• Full-featured programmable VME requester (ROR, RWD and BCAP modes are supported)

• System Controller auto detection

• Complete VME master access through five separate Protected-mode memory windows

The VMIVME-7807/VME-7807RC support High Throughput DMA transfers of bytes, words and longwords in both Master and Slave configurations.

If Endian conversion is not needed, GE Fanuc Embedded Systems offers a special

“Bypass” mode that can be used to further enhance throughput (not available for byte transfers).

The VMIVME-7807/VME-7807RC VME interface is provided by the PCI-to-VME bridge built around the Tundra Semiconductor Corporation Universe II VME interface chip. The Universe II provides a reliable high-performance 64-bit VME-to-PCI interface in one design. The functions and programming of the

Universe-based VME interface are addressed in detail in a companion manual titled:

GE Fanuc Embedded Systems’ Tundra Universe II Based VME Interface Product Manual (500-000211-000).

I

²

C/SMBus Temperature Sensor

The MAX6657MSA can be monitored and controlled on the SMBus at address 0x98 for the VMIVME-7807/VME-7807RC. This will allow the user to monitor and set up the two alarms available (ALERT and OVERT1).

For more information on the Maxim MAX6657MSA contact them directly at:

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

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Embedded PCI Functions

3 Embedded PCI Functions

The VMIVME-7807/VME-7807RC provide non-volatile RAM (NVRAM), timers and a Watchdog Timer via the PCI bus. These functions are required for embedded and real time applications. The PCI configuration space of these embedded functions are shown below.

The “Device ID” field indicates that the device is for VME products (00) and indicates the supported embedded feature set.

The “Vender ID” and “Subsystem Vendor ID” fields indicate GE Fanuc Embedded Table 3-1 PCI Configuration Space Registers

31 16 15 00 Register

Address

Device ID 0004 Vendor ID 114A 00h

Status Command 04h

Class Code Revision ID 08h

BIST Header Type Latency Timer Cache Line Size 0Ch PCI Base Address 0 for Memory-Mapped VME Control registers (BAR0) 10h PCI Base Address 1 for Memory-Mapped 32kB NVRAM (BAR1) 14h PCI Base Address 2 for memory-mapped Watchdog and other timers (BAR2) 18h

Reserved 1Ch

Reserved 20h

Reserved 24h

Reserved 28h

Subsystem ID 7807 Subsystem Vendor ID 114A 2Ch

Reserved 30h

Reserved 34h

Reserved 38h

Max_Lat Min_gnt Interrupt Pin Interrupt Line 3Ch

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Timers

General

The VMIVME-7807/VME-7807RC provide four user-programmable timers (two 16-bit and two 32-bit) which are completely dedicated to user applications and are not required for any standard system function. Each timer is clocked by independent generators with selectable rates of 2MHz, 1MHz, 500kHz and 250kHz. Each timer may be independently enabled and each is capable of generating a system interrupt on timeout.

Events can be timed by either polling the timers or enabling the interrupt capability of the timer. A status register allows for application software to determine which timer is the cause of any interrupt.

Timer Control Status Register 1 (TCSR1)

The timers are controlled and monitored via the Timer Control Status Register 1 (TCSR1) located at offset 0x00 from the address in BAR2. The mapping of the bits in this register are as follows:

Field Bits Read or Write

Timer 1 Caused IRQ TCSR1[0] R/W

Timer 1 Enable TCSR1[1] R/W

Timer 1 IRQ Enable TCSR1[2] R/W

Timer 1 Clock Select TCSR1[4..3] R/W

Reserved All Other Bits R/W

All of these bits default to “0” after system reset.

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Timers

3

Each timer has an independently selectable clock source which is selected by the bit pattern in the “Timer x Clock Select” field as follows:

Each timer can be independently enabled by writing a “1” to the appropriate “Timer x Enable” field. Similarly, the generation of interrupts by each timer can be

independently enabled by writing a “1” to the appropriate “Timer x IRQ Enable”

field.

If an interrupt is generated by a timer, the source of the interrupt may be determined by reading the “Timer x Caused IRQ” fields. If the field is set to “1”, then the

respective timer caused the interrupt. Note that multiple timers can cause a single interrupt. Therefore, the status of all timers must be read to ensure that all interrupt sources are recognized.

A particular timer interrupt can be cleared by writing a “0” to the appropriate “Timer x Caused IRQ” field. Alternately, a write to the appropriate Timer x IRQ Clear (TxIC) register will also clear the interrupt. When clearing the interrupt using the “Timer x Caused IRQ” fields, note that it is very important to ensure that a proper bit mask is used so that other register settings are not affected. The preferred method for clearing interrupts is to use the “Timer x IRQ Clear” registers described on page 52.

Timer Control Status Register 2 (TCSR2)

The timers are also controlled by bits in the Timer Control Status Register 2 (TCSR2) located at offset 0x04 from the address in BAR2. The mapping of the bits in this register are as follows:

Clock Rate MSb LSb

2MHz 0 0

1MHz 0 1

500kHz 1 0

250kHz 1 1

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capture the values of all four timers at a given instance in time. However, by setting this bit to “1”, all four timer outputs will be latched only on reads to the Timer 1 & 2 Current Count Register (TMRCCR12). Therefore, to capture the current count of all four timers at the same time, perform a read to the TMRCCR12 first (with a 32-bit read), followed by a read to TMRCCR3 and TMRCCR4. The first read (to the TMRCCR12 register) causes all four timer values to be latched at the same time. The subsequent reads to the TMRCCR3 and TMRCCR4 registers do not latch new count values, allowing the count of all timers at the same instance in time to be obtained.

Timer 1 & 2 Load Count Register (TMRLCR12)

Timers 1 & 2 are 16-bits wide and obtain their load count from the Timer 1 & 2 Load Count Register (TMRLCR12), located at offset 0x10 from the address in BAR2. The mapping of bits in this register are as follows:

When either of these fields are written (either by a single 32-bit write or separate 16-bit writes), the respective timer is loaded with the written value on the next rising edge of the timer clock, regardless of whether the timer is enabled or disabled. The value stored in this register is also automatically reloaded on terminal count (or timeout) of the timer.

Timer 3 Load Count Register (TMRLCR3)

Timer 3 is 32-bits wide and obtains its load count from the Timer 3 Load Count Register (TMRLCR3), located at offset 0x14 from the address in BAR2. The mapping of bits in this register are as follows:

When this field is written, Timer 3 is loaded with the written value on the next rising edge of the timer clock, regardless of whether the timer is enabled or disabled. The value stored in this register is also automatically reloaded on terminal count (or timeout) of the timer.

Timer 2 Load Count TMRLCR12[31..16] R/W Timer 1 Load Count TMRLCR12[15..0] R/W

Timer 3 Load Count TMRLCR3[31..0] R/W

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Timers

3 Timer 4 Load Count Register (TMRLCR4)

Timer 4 is 32-bits wide and obtains its load count from the Timer 4 Load Count Register (TMRLCR4), located at offset 0x18 from the address in BAR2. The mapping of bits in this register are as follows:

When this field is written, Timer 4 is loaded with the written value on the next rising edge of the timer clock, regardless of whether the timer is enabled or disabled. The value stored in this register is also automatically reloaded on terminal count (or timeout) of the timer.

Timer 1 & 2 Current Count Register (TMRCCR12)

The current count of timers 1 & 2 may be read via the Timer 1 & 2 Current Count Register (TMRCCR12), located at offset 0x20 from the address in BAR2. The mapping of bits in this register are as follows:

When either field is read, the current count value is latched and returned. There are two modes that determine how the count is latched depending on the setting of the

“Read Latch Select” bit in the WDT Control Status Register (CSR2). See the CSR2 register description for more information on these two modes.

Timer 3 Current Count Register (TMRCCR3)

The current count of Timer 3 may be read via the Timer 3 Current Count Register (TMRCCR3), located at offset 0x24 from the address in BAR2. The mapping of bits in this register are as follows:

Timer 4 Load Count TMRLCR4[31..0] R/W

Timer 2 Count TMRCCR12[31..16] R.O.

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When this field is read, the current count value is latched and returned. There are two modes that determine how the count is latched depending on the setting of the “Read Latch Select” bit in the WDT Control Status Register (CSR2). See the CSR2 register description for more information on these two modes.

Timer 4 Current Count Register (TMRCCR4)

The current count of Timer 4 may be read via the Timer 4 Current Count Register (TMRCCR4), located at offset 0x28 from the address in BAR2. The mapping of bits in this register are as follows:

When this field is read, the current count value is latched and returned. There are two modes that determine how the count is latched depending on the setting of the “Read Latch Select” bit in the WDT Control Status Register (CSR2). See the CSR2 register description for more information on these two modes.

Timer 1 IRQ Clear (T1IC)

The Timer 1 IRQ Clear (T1IC) register is used to clear an interrupt caused by Timer 1.

Writing to this register, located at offset 0x30 from the address in BAR2, causes the interrupt from Timer 1 to be cleared. This can also be done by writing a “0” to the appropriate “Timer x Caused IRQ” field of the timer Control Status Register (CSR1).

This register is write only and the data written is irrelevant.

Timer 2 IRQ Clear (T2IC)

Timer 3 IRQ Clear (T3IC)

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Timers

3 Timer 4 IRQ Clear (T4IC)

Writing to this register, located at offset 0x3C from the address in BAR2, causes the interrupt from Timer 4 to be cleared. This can also be done by writing a “0” to the appropriate “Timer x Caused IRQ” field of the timer Control Status Register (CSR1).

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Watchdog Timer

General

The VMIVME-7807/VME-7807RC provide a programmable Watchdog Timer (WDT) which can be used to reset the system if software integrity fails.

WDT Control Status Register (WCSR)

The WDT is controlled and monitored by the WDT Control Status Register (WCSR) which is located at offset 0x08 from the address in BAR2. The mapping of the bits in this register are as follows:

The “WDT Timeout Select” field is used to select the timeout value of the Watchdog Timer as follows:

The “SERR/RST Select” bit is used to select whether the WDT generates an SERR# on the local PCI bus or a system reset. If this bit is set to “0”, the WDT will generate a system reset. Otherwise, the WDT will make the local PCI bus SERR# signal active.

The “WDT Enable” bit is used to enable the Watchdog Timer function. This bit must be set to “1” in order for the Watchdog Timer to function. Note that since all registers default to zero after reset, the Watchdog Timer is always disabled after a reset. The Watchdog Timer must be re-enabled by the application software after reset in order for the Watchdog Timer to continue to operate. Once the Watchdog Timer is enabled, the application software must refresh the Watchdog Timer within the selected timeout period to prevent a reset or SERR# from being generated. The Watchdog Timer is

SERR/RST Select WCSR[16] R/W

WDT Timeout Select WCSR[10..8] R/W

WDT Enable WCSR[0] R/W

All of these bits default to “0” after system reset. All other bits are reserved.

Timeout WCSR[10] WCSR[9] WCSR[8]

135s 0 0 0

33.6s 0 0 1

2.1s 0 1 0

524ms 0 1 1

262ms 1 0 0

131ms 1 0 1

32.768ms 1 1 0

2.048ms 1 1 1

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Watchdog Timer

3

refreshed by performing a write to the WDT Keepalive register (WKPA). The data written is irrelevant.

WDT Keepalive Register (WKPA)

When enabled, the Watchdog Timer is prevented from resetting the system by writing to the WDT Keepalive Register (WKPA) located at offset 0x0C from the address in BAR2 within the selected timeout period. The data written to this location is irrelevant.

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NVRAM

The VMIVME-7807/VME-7807RC provide 32KB of non-volatile RAM. This memory is mapped in 32K of address space starting at the address in BAR1. This memory is available at any time and supports byte, short word and long word accesses from the PCI bus. The contents of this memory are retained when the power to the board is removed.

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VME Control

3 VME Control

The following table shows the register definitions for the VMIVME-7807/

VME-7807RC (offset from BAR0).

Table 3-2 Register Definitions Offset From BAR0 Register Name Offset

VMECOMM 0x00

Bit Name Bit Definition

MEC_SEL 0 Master big-endian enable bit 1=Big Endian,

0=Little Endian bit

SEC_SEL 1 Slave Big-Endian enable bit 1=Big Endian,

0=Little Endian

ABLE 2 Auxiliary BERR logic enable bit

1=Aux. BERR enabled 0=Aux. BERR disabled

BTO 3 Bus error timer enabled 1=enabled, 0=disabled

BTOV [1:0] 5:4 Timeout value

00 - 16μs 01 - 64μs 10 -256μs 11 - 1.00ms

BERRI 6 BERR interrupt enable 1=Interrupt enabled

0=Interrupt disabled

BERRST 7 BERR status read/clear bit

1=Clear BERR status, 0=Do nothing

SFENA 8 Enables generation of VME SYSFAIL upon

WDT timeout

1= Enable SYSFAIL generation, 0=Disable

Unused 9 Not Used

BPENA 10 Endian conversion bypass bit

1=bypass, 0=Not bypassed

VBENA 11 VME enable bit (VBENA)

1 = enabled, 0 = disabled

Unused 31:12 Not Used

VBAM 0x04

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CompactFlash Disk

The VMIVME-7807/VME-7807RC feature an optional onboard CompactFlash mass storage system with a capacity of up to 2GB. This CompactFlash Disk appears to the user as an intelligent ATA (IDE) disk drive with the same functionality and

capabilities as a “rotating media” IDE hard drive. The VMIVME-7807/VME-7807RC BIOS includes an option to allow the board to boot from the CompactFlash with user-provided operating system.

Configuration

The CompactFlash Disk resides on the VMIVME-7807/VME-7807RC as the secondary IDE bus master device (the secondary IDE bus slave device is not assignable).