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Directoryless shared memory coherence using execution migration

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Academic year: 2021

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Figure

Figure 1. In the hybrid EM/RA architecture, memory accesses to addresses not assigned to the local core cause the execution context to be migrated to the core, or may result in a remote data access.
Figure 2. (a) A single-issue five-stage pipeline with efficient context migration; differences from a single-threaded pipeline are shaded
Table 1. System configurations used
Figure 4. For our benchmarks, under our EM/RA designs the cache miss rates are on the average 3.2× lower be-cause storing each cache line in only one location elimi-nates many capacity and coherence-related evictions and effectively increases the availab
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