·.·ADVANTAGE
Technical Manual
00464C
TABLE OF CONTENTS
Section Page
1 INTRODUCTION 1-1
1.1 using this Manual 1-2
1.2 System Description 1-3
1.3 Warranty 1-6
1.4 ADVANTAGE Specifications 1-7
2 ADVANTAGE OPERATION 2-1
2.1 Operating Cont~ols 2-1
2.1.1 Keyboard 2-1
2.1.2 Rear Panel Controls 2-4 2.1.3 Diskette Loading/Unloading 2-6
2.2 System Startup 2-7'
2.2.1 Standard Startup - Booting
From Drive 1 2-7
2.2.2 Alternate Startup - Booting
From Drive 2 2-8
2.2.3 Alternate Startup - Booting
From A Serial Port 2-8 2.2.4 Mini-Motor Startup 2-8
2.3 Restarting The System 2-9
2.3.1 Keyboard Reset 2-9
3 IMPLEMENTING ADVANTAGE FEATURES 3-1
3.1 Microprocessor Control 3-1
3.2 Memory Control 3-1
3.2.1 Memory Mapping 3-1
3.2.2 Memory Parity 3-6
3.3 Inter'rupts 3-7
3.3.1 Maskable Interrupts 3-8 3.3.2 Non-Maskab1e Interrupts 3-8
TABLE OF CONTENTS (continued)
Section Page
3.5. Keyboard Control 3-16
3.5.1 Keyboard Reset Enable 3-16
3.5.2 Reset 3-17
3.5.3 Interrupt or Polled 3-17
3.5.4 Read Keyboard 3-19
3.5.5 Character Overrun 3-19
3.5.6 Cursor Lock 3-12
3.5.7 All Caps 3-21
3.5.8 Auto Repeat 3-21
3.6 Video Display Control 3-22
3.6.1 Screen Mapping 3-23
3.6.2 Forming Letters and Symbols 3-25
3.6.3 Display Flag 3-27
3.6.4 Screen Blanking 3-27
3.6.5 Video Driver 3-27
3.7 Floppy Disk Drive Control 3-31 3.7.1 Power-on Initialization 3-34
3.7.2 Motor Enable 3-34
3.7.3 Drive Selection 3-34
3.7.4 Seek 3-34
3.7.5 Sector Selection 3-35
3.7.6 Read Data 3-36
3.7.7 Write Data 3-37
3.7.8 Floppy Disk Data Format 3-39 3.8 Hard Disk Drive Control 3-40
3.8.1 I/O Commands 3-40
3.8.2 Head Positioning 3-45
3.8.3 Data Format 3-47
3.8.4 Format Operation 3-48
3.8.5 Read Operations 3-49
3.8.6 Write Operation 3-50
3.9 Accessing The I/O Boards 3-51
3.9.1 Reset 3-51
3.9.2 Board Identification 3-51
3.9.3 Byte Transfers 3-53
3.9.4 Interrupt 3-53
ADVANTAGE ii TECHNICAL MANUAL
TABLE OF CONTENTS (continued) Section
3.10 SIO Board 3.10.1 Reset
3.10.2 Board Identification 3.10.3 Data Transfers
3.10.4 Control 3.10.5 Status
3.10.6 Interrupt or Polled
3.10.7 SIO In Asynchronous Mode 3.10.8 SIO In Synchronous Mode 3.11 PIO Board
3.11.1 Reset
3.11.2 Board Identification 3.11.3 Data Transfers
3.11.4 Control 3.11.5 Status
3.11.6 Interrupt or Polled 3.11.7 Programming Example 3.12 Speaker Control
3.13 Bootstrap Firmware 3.13.1 Startup
3.13.2 Boot From Disk Drive 3.12.3 Boot From Serial Port 4 THEORY OF OPERATION
4.1 Main PC Board 4.1.1
4.1.2 4.1.3 4.1.4 4.1.5 4.1.6 4.1.7 4.1.8 4.1.9
Central Processor Main RAM
Boot PROM
Auxiliary Processor and Keyboard
Floppy Disk Controller
Dislay RAM and Video Generator I/O Board Interface
Speaker Circuit Voltage Regulators
Page 3-54 3-54 3-54 3-55 3-55 3-57 3-58 3-58 3-66 3-72 3-72 3-73 3-73 3-73 3-74 3-75 3-77 3-77 3-78 3-78 3-79 3-82 4-1 4-1 4-4 4-15 4-18 4-18 4-22 4-25 4-36 4-41 4-41
TABLE OF CONTENTS (continued)
Section Page
7
ADVANTAGE
4.2.1 4.2.2 4.2.3
Track and Sector Format Hard Disk Controller Hard Disk Drive
5 PREVENTIVE MAINTENANCE
4-44 4-44 4-55 5-1 5.1 Wear and Damage Inspection 5-2 5.2 Voltage Checks and Adjustment 5-3 5.3 Voltage Controlled Oscillator Check
and Adjustment 5-4
6 DIAGNOSTICS
6.1 The Mini-Monitor
6.2 The General Diagnostic Programs 6.2.1
6.2.2 6.2.3 6.2.4 6.2.5 6.2.6 6.2.7
Single Block Mode
Floppy Disk Subsystem Test Executable Memory Test Video Memory Test
SIO Board Test Keyboard Test
Display Monitor Test 6.3 Hard Disk Diagnostic Procedures TROUBLESHOOTING AND REPAIR
7.1 Tools and Test Equipment 7.2 Troubleshooting Procedures
7.2.1 Troubleshooting Chart 7.3 Assembly Replacement Procedures
7.3.1 Opening and Closing ADVANTAGE
6-1 6-2 6-4 6-4 6-6 6-8 6-11 6-12 6-13 6-22 6"';23
?,-l
7-1 7-2 7-2 7-15
Cabinet 7-16
7.3.2 Removing and Installing The
Keyboard 7-20
7.3.3 Removing and Installing The
Main PC Board 7-24
7.3.4 Removing and Installing a
Disk Drive 7-27
iv TECHNICAL MANUAL
Aggendix
A B C
o
E F G
H I J
TABLE OF CONTENTS (continued)
CHARACTER CODE TABLES
IIO ADDRESS SUMMARY PC BOARD JUMPERS ERROR MESSAGES PARTS LISTS
FULL ASSEMBLY DRAWINGS
Z80 MICROPROCESSOR DATA SHEET 8251 USART DATA SHEET
SCHEMATICS
READER RESPONSE FORM
~
A-I B-1 C-l 0-1 E-l F-l G-l H-l I-I J-l
Figure 1-1 1-2 2-1 2-2 2-3 3-1 3-2 3-3 3-4 3-5 3-6 3-7 3-8 3-9 3-10 3-11 3-12 3-13 3-14 3-15 3-16 4-1 4-2 4-3 4-4 4-5 4-6 4-7 4-8 4-9 4-10 4-11 4-12 4-13 4-14 4-15 4-16 4-17 4-18 4-19 4-20
ADVANTAGE
ILLUSTRATIONS
The ADVANTAGE Computer Functional Block Diagram The ADVANTAGE Keyboard ADVANTAGE Rear View Loading a Diskette
Memory Mapping Registers
The Three Shared I/O Interface Registers Data Format In Display RAM
Disk Read/Write Timing
Floppy Disk Track and Sector Format Hard Disk Track and Sector Format
Asynchronous Modem'Configuration Header Asynchronous Terminal Configuration Header Current Loop Configuration Header
Current Loop Circuit Buffer Full Modification
Synchronous Modem Clock Header
Synchronous Modem Configuration Header Synchronous Terminal Clock Header
Synchronous Terminal Configuration Header Standard PIO Configuration Header
The ADVANTAGE System Block Diagram Central Processor Block Diagram Main RAM Block Diagram
Main RAM Timing
Auxilliary Processor Block Diagram Disk Controller Block Diagram
Display RAM and Video Driver Horizontal Scan Timing
Vertical Scan Timing
I/O Board Interface Block Diagram I/O Board Timing
Voltage Regulators Block Diagram Hard Disk Controller Block Diagram SIO Board Block Diagram
Connector Pin Assignments (Asynchronous) SIO Connector Pin Assignments (Synchronous) PIO Board Block Diagram
PIO Connector Pin Assignments Standard PIO Configuration Header PIO Port Timing
~
1-1 1-5 2-1 2-4 2-6 3-3 3-10 3-24 3-38 3-39 3-47 3-59 3-60 3-61 3-62 ' 3-63 3-66 3-66 3-67 3-67 3-72 4-2 4-5 4-15 4-17 4-19 4-22 4-26 4-31 4-35 4-36 4-40 4-42 4-45 4-58 4-60 4-60 4-63 4-65 4-66 4-68
vii TECHNICAL MANUAL
Figure 6-1 6-2 6-3 6-4 6-5 6-6 6-7 6-8 6-9 6-10 7-1 7-2 7-3 7-4 7-5 7-6 7-7 7-8 7-9 7-10 7-11 7-12 7-13 7-14 7-15 7-16 7-17 7-18 7-19 7-20 7-21 7-22
ILLUSTRATIONS (continued)
Single Block Mode - Display Format
Floppy Disk Subsystem Test - Display Format Executable Memory Test - Display Format Locating a Defective Main RAM Chip
Loacating a Defective Video RAM Chip SIO Board Test - Display Format
Keyboard Test Modules and Sections N-Key Rollover Test
Keyboard Test Summary
Display Format for Display Monitor Test ADVANTAGE Troubleshooting Chart
Pin Locations on the Disk Drive
Pin Locations on the Controller Board (Solder Side)
Power Cord Removal
Bottom View of the ADVANTAGE Cabinet Separation Sequence
Major Components Inside the ADVANTAGE ADVANTAGE 20 Base Assembly
ADVANTAGE HD-5 Base Assembly ADVANTAGE 20 Cable Connections ADVANTAGE 80-5 Cable Connections Main PC Board Removal
Disk Drive Shield Removal Disk Drive Cabling
Upper Disk Drive Removed Power Supply Components Cover Assembly
Fan Cable Removal/Installation Video Components
Video PC Board CRT Removal
CRT Installation
~
6-5 6-7 6-9 6-10 6-11 6-12 6-14 6-19 6-20 6-22 7-1 7-11 7-13 7-16 7-17 7-18 7-19 7-20 7-21 7-22 7-23 7-25 7-27 7-28 7-29 7-30 7-32 7-32 7-34 7-35 7-36 7-38
Table 1-1 2-1 2-2 3-1 3-2 3-3 3-4 3-5 3-6 3-7 3-8 3-9 3-10 3-11 3-12 3-13 3-14 3-15 3-16 3-17 3-18 3-19 3-20 3-21 3-22 3-23 3-24 3-25 3-26 3-27 3-28 3-29 3-30 3-31
·3-22 3-33 4-1 4-2 4-3 4-4 4-5 4-6 4-7
ADVANTAGE
ILLUSTRATIONS (continued)
ADVANTAGE Specifications ADVANTAGE Keys
Rear Panel. Controls
256K Address Space Allocation Memory Mapping I/O Addresses
Memory Mapping Register Configurations Memory Parity I/O Address
Memory Parity Status and Control Bytes Shared Register Addresses
I/O Control Register Format
I/O Commands for I/O Control Register I/O Status Register 1 Format
I/O Status Register 2 Format
Sample Routine for Reading Characters Video I/O Addresses
Video Driver Control Codes Video Driver Data Block Format
Floppy Disk I/O Addresses
Floppy Drive Control Register Format Hard Disk Drive I/O Commands
Hard Disk Drive Control Register Format Hard Disk Controller/Drive Status Bits
I/O Board Addresses
I/O Board Identification Codes First Digit of I/O Addresses SIO Interrupt Mask Format Serial I/O Addresses
Asynchronous Baud Rate Selection
Sample Asynchronous I/O· Routines for SID Board
Synchronous Baud Rate Selection
Sample Synchronous I/O Routines for SIO Board
PIO Interrup Mask Format PIO Status Byte Format Parallel I/O Addresses
Sample Routine for Outputting PIO Data Boot PROM CRC Routine
I/O Status Register 1 Format I/O Address Decoder Signals I/O Select PROM Summary I/O Control Register Format I/O Commands
I/O Status Register 2 Format Floppy Disk I/O Instructions
~
1-7 2-2 2-5 3-2 3-4 3-5 3-7 3-6 3-9 3-11 3-12 3-14 3-15 3-20 3-26 3-28 3-29 3-31 3-33 3-41 3-43 3-44 3-52 3-52 3-55 3-56 3-57 3-64 3-65 3-68 3-69 3-74 3-75 3-76 3-77 3-81 4-8 4-9 4-10 4-12 4-13 4-20 4-23
ix TECHNICAL MANUAL
Figure 4-8 4-9 4-10 4-11 4-12 4-13 4-14 4-15 4-16 4-17 4-18 4-19 5-1 6-1 6-2 6-3 7-1 7-2 7-3 7-4
ILLUSTRATIONS (continued)
Floppy Disk Control Register Format HTIML Horizontal Scan PROM
HTIMH Horizontal Scan PROM 60 Hz vertical Timing PROM 50 Hz Vertical Timing PROM 1/0 Board Pin Assignments
Hard Disk Controller Input/Output Sign~ls
SIO Board I/O Instructions SIO Board 1/0 Instructions PIa Board 1/0 Instructions PIa status Byte Format PIa Interrupt Mask Format
Preventive Maintenance Schedule Mini-Monitor Commands
Keyboard Test Abbreviation Codes Keyboard Test Control Keys
Main Board Input Power (Jll) Main Board Video Interface (J7)
Main Board - Floppy Disk Power (JI0) Driver Status Signals
4-24 4-28 4-29 4-33 4-34 4-38 4-46 4-61 4-62 4-67 4-68 4-69 5-1 6-3 6-16 6-21 7-6 7-6 7-10 7-14
1.2 SYSTEM DESCRIPTION
The North Star ADVANTAGE is packaged in a molded high impact plastic unit with an integral keyboard. The keyboard features an ASCII typewriter-like layout with programmable function keys and a numeric keypad.
The ADV~TAGE cabinet holds the l2-inch (diagonal) monitor, video circuit assembly, and main processor board which contains the CPU, the memory, the floppy disk controller, the I/O interface circuits, and the power supply regulator. The cabinet also houses either two floppy disk drives or one floppy disk drive and one 5" Winchester hard disk drive.
The ADVANTAGE uses a 4 MHz Z80A microprocessor as the
cpu.
64 Kbyte of 200 nsec dynamic random access memory (RAM) is provided for program storage, with a separate 20 Kbyte 200 nsec RAM for the bit-mapped display. A 2 Kbyte PROM contains the resident bootstrap program. An auxiliary 8035 microprocessor controls keyboard and:disk input/output (I/O) to and from the
cpu.
The display can operate as a 1920 character display with 24 lines x 80 characters or as a bit-mapped display with 240 x 640 pixels. Each pixel is controlled by one bit in the 20 Kbyte display memory.
The n-key rollover keyboard contains 49 standard typewriter keys, 9 symbol or control keys, a l4-key numeric/cursor control pad, and 15 programmable function keys.
In the ADVANTAGE 2Q, the two integral 5-1/4" floppy disk drives are quad capacity double-sided and double- density to provide 360 Kbyte of storage per diskette.
In the ADVANTAGE HD-5, the Winchester hard disk drive provides 5 Mbytes of storage.
ADVANTAGE 1-3 TECHNICAL MANUAL
A simplified block diagram of the ADVANTAGE computer is shown in Figure 1-2. The blocks are described briefly below. Refer to Chapter 4, Theory of Operation for more detailed descriptions of ADVANTAGE component blocks.
- The Central Control Unit maintains primary control of the system. Contained herein are the Z80 and 8035 processors and the controllers for the I/O devices.
- The 64K Main RAM (Random Accesp Memory) provides temporary storage of programs and data. Programs are executed while residing in this RAM.
- The 2K Boot PROM (Programmable Read-Only Memory) provides bootstrapping and a built-in Mini-Monitor for debugging functions.
- The Video Monitor and 20K Display RAM produce a high resolution display that can be used for graphics applications, or to display messages for the operator.
- The floppy Disk Drive(s) use 5-1/4 inch quad capacity diskettes. The optional hard Disk Drive replaces the second floppy drive.
- The Speaker produces a tone used to signal the operator. The frequency and dUration of the tone are under program control.
- The Keyboard configuration, function keys.
includes the standard typewriter a numeric keypad and 15 programmable - The I/O Board Slots allow the ADVANTAGE to be customized for specific applications. There are six board slots which may contain interface boards for external devices or other boards which expand the computing power of the ADVANTAGE. Two types of North Star boards are presently available for use in this area: the Serial Input/Output (SIO) Board and the Parallel Input/Output (PIO) Board. As supplied, the ADVANTAGE contains an SIO board installed in I/O slot one.In an ADVANTAGE HD-5 the Hard Disk Controller resides in I/O slot six.
64K MAIN
RAM
2K BOOT PROM
SPEAKER
I·
ADVANTAGE
Functional Block Diagram
VIDEO MONITOR
20K DISPLAY
RAM
CENTRAL CONTROL
UNIT
KEYBOARD
---
Figure 1-2
FLOPPY DISK DRIVE 1
FLOPPY DISK DRIVE 2
I/O BOARD SLOTS
.. ;>
~ 7
EXTERNAL I/O DEVICES
r---.
I I
I I
I HD-5 I
or I I
I HARD DISK I
I I
I I
'---r----.J
I
1-5 TECHNICAL MANUAL
1.4 ADVANTAGE SPECIFICATIONS
Table 1-1 lists the physical characteristics of the ADVANTAGE.
Table 1-1
ADVANTAGE Specifications CABINET
and electrical
Dimensions 48 cm wide x 51 cm long x 31.5 cm high (18-3/4 in x 20 in x 12-112 in)
Net Weight 19.5 kg (43 lbs)
Composition High impact structural foam POWER REQUIREMENTS
External (with
Internal Line Filter)
Domestic 115 VAC, (98 to 132 VAC) 60Hz
International 230 VAC, (196 to 264 VAC) 50/60 Hz
Internal Supply ±5 VDC ±5%
Voltages +12 VDC ±5%
Power
Consumption 2 amps @ ll5V 1 amp @ 230V TEMPERATURE AND HUMIDITY
Operating: 10 C to 40 C (with diskette) (50 F to 104 F)
20% to 80% non-condensing Non-operating -40 C to 60 C
(-40 F to 140 F)
Shipping
Table 1-1 (continued) -40Cto52C
(-40 F to 125 F)
5% to 95% non-condensing PROCESSOR/MEMORY
CPU
Memory
VIDEO Screen
Grid
Graphics resolution Refresh rate CRT Anode Voltage KEYBOARD Key tops
Z80A Microprocessor, operating speed: 4MHz 8035 auxiliary processor for keyboard and disk 64K byte Main RAM
20K byte Display RAM 2K byte Boot PROM
28 cm (12 in) diagonal P31 phosphor (green)
High impact, non-glare safety shield 1920 character display,
24 lines by 80 characters
5X7 character in 8xlO dot matrix 240 pixel high x 640 pixel wide 60 Hz
17 KV maximum
Sculptured
Selectric-compatible
N-Key roll-over for fast data entry Number of Keys: 87
Key Groups
ADVANTAGE
49 Standard Typewriter Keys
l4-key Numeric Pad with ENTER key 15 Programmable Function Keys 9 Additional Symbol/Control Keys
1-8 TECHNICAL MANUAL
Table 1-1 (continued) Other features Full Cursor control
Special Shift-Lock Keys 5 Shift Modes
Auto Repeat FLOPPY DISK DRIVES
Number of
drives Two floppy disk drives housed in cabinet Diskettes Standard 5-1/4 in floppy diskettes.
Recommended type: Dysan part No. 107/2D.
512 bytes/sector, 10 (hard) sectors/ track 35 tracks/side, 2 sides/diskette
storage .Quad (double-sided, double-density) 360K bytes per diskette (formatted) Transfer Rate 250K bits/second
Latency 100 ms (average)
Access Time
Track-to-Track 5 ms Track Density 48 tpi Tracks per Side 35 ERROR RATES
Soft errors 1 per 108bits Hard errors 1 per l011bi ts Seek errors 1 per 106 seeks
read read
Disk speed 300 rpm + 3.0%
Table 1-1 <Continued) HARD DISK DRIVE
Capacity
Unformatted Per Drive Per Surface Per Track Formatted
Per drive Per surface Per track Per sector
Sectors per track Transfer Rate
Access Time
Track to track Average
Maximum
Settling time Average Latency
Rotational Speed Recording Density Flux Density
Track Density Cylinders Tracks R/w Heads Disks
Max Error Rates:
Soft read errors
=
Hard read errors
=
Seek errors
=
6.38 megabytes 1.59 megabytes 10416 bytes 5.0 megabytes 1.25 megabytes 8192 bytes 512 bytes 16
5.0 megabits per second
3 ms 170 ms .500 ms 15 ms 8.33 ms
3600 rpm
±
1%7690 bpi max 7690 fci 255 tpi 153 612 4 2
1 per 109 bits read 1 per 1011 bi ts read 1 per 106 seeks Less bad spots, if any (max 16)
Not recoverable within 16 retries.
ADVANTAGE 1-10 TECHNICAL MANUAL
INPUT/OUTPUT I/O Bus
Serial I/O (SIO)
Parallel I/O
Table 1-1 (continued)
Slots for up to six plug-in boards (up to five plug-in boards in the HD-5)
Each board addressed by 16 I/O addresses RS232 Serial Port
Current loop option
Asynchronous: 45 baud to 19.2 kilobaud Synchronous: 2400 baud to 51 kilobaud
8-bit data in and out with three handshake lines for each port
Maximum speed is limited by the processor.
ADVANTAGE OPERATION 2
This chapter describes startup and general operation of the ADVANTAGE. It contains a description of the keyboard and rear panel controls of the ADVANTAGE. It also provides instructions for loading diskettes in the floppy drive(s), booting a program, and methods for performing a system reset.
2.1 OPERATING CONTROLS
2.1.1
The ADVANTAGE operating controls consist of the keyboard and rear panel controls. On the rear panel are a power switch, screen brightness control, and the system Reset button. For operation of the disk drives, diskette loading and unloading procedures are given.
Keyboard
Primary system control is maintained by entering commands and data from the ADVANTAGE keyboard. The keyboard is illustrated in Figure 2-1. There are 87 keys, described in Table 2-1. The keys generate standard ASCJI codes as well as additional 8-bit hex codes. Keys and their codes are listed under various
tabu1~tions in Appendix A.
Characters entered from the keyboard are displayed on the CRT screen under program control. A program- maintained cursor marks the position on the screen where the next character entry will be displayed.
The ADVANTAGE Keyboard
Figure 2-1
ADVANTAGE 2-1 TECHNICAL MANUAL
Key Group CHARACTER
KEYBOARD CONTROL
CURSOR CONTROL
Keys
ABCDEFGHIJKLM NOPQRSTUVWXYZ l234567890! @#
$%A&*() __ =+;:
'",.<>I?[]{}
(space) SHIFT
ALL CAPS
RETURN TAB
<X]
ENTER
8 direction arrows
CURSOR LOCK
Table 2-1 ADVANTAGE Keys
Description
Alphabetic, numeric, and special symbols. Numbers and three
symbols (.,-) are also available on the numeric~pad.
Either of two identical keys which cause most of the other keys to shift into upper case
(see Appendix A).
Shifts only alphabetic
characters to upper case. Key is a "push on-off" type with LED to signal when function is active.'
Carriage return.
Position to next tab set on the line. Setting and releasing tabs is done under program control.
Character delete, backspace, qr delete and backspace depending upon the program being used.
Numeric pad data entry key.
All cursor activity is under program control.
Shifts only cursor control keys (1-9 on numeric pad) to allow cursor positioning without using SHIFT key. Key is a "push on- push off" type with LED to signal when key is active.
Key Group FUNCTION
PROGRAM
ADVANTAGE
Table 2-1 (continued) Keys
Fl F2 F3 F4 FS F6 F7 Fa F9 FlO Fll Fl2 F13 F14 FlS
ESC CONTROL CMND
2-3
Description
Special purpose keys entirely under program control. Each Function key can generate up to three codes.
(ESCAPE) key under program control.
(CTRL) operates as a special shift for keys.
(Command) operates as a special shift for keys.
TECHNICAL MANUAL
2.1.2 Rear Panel Controls
A rear view of the ADVANTAGE is shown in Figure 2-2.
Table 2-2 describes-the controls shown in the figure.
On/Off Switch Power Cord
Receptacle Fuse Holder
ADVANTAGE Rear View
<l)
\
~-4--Brightness Control
Reset Push Button
Figure 2-2
Control ON/OFF Switch
Power Cord Receptacle Fuse Holder
Reset Pushbutton
I/O Plate
Brightness Control
ADVANTAGE
Table 2-2
Rear Panel Controls
Description
Applies/removes electrical power to the unit.
Mates with power cord to provide electric current from AC power source.
Contains the AC line fuse. Use 2A slo-blo (time delay) fuse for llSV operation and IA time delay fuse for 230V operation.
Resets and initializes the system. After reset, data in Main Memory is indeter- minate but disk storage data is not affected.
Openings in plate allow access to I/O connectors on I/O Boards I through 6. A Serial I/O Board is a standard installation
in slot 1. In hard disk systems, the Hard Disk Controller resides in slot 6.
Controls brightness of the display screen.
Turn clockwise to~increase brightness.
2-5 TECHNICAL MANUAL
2.2 SYSTEM STARTUP
2.2.1
Startup is a function of the bootstrap routines contained in ROM. Drive 1 is programmed as the default drive in the bootstrap program; Drive 1, therefore, is the drive normally used for booting the operating system.
Standard Startup - Booting From Drive 1
To boot from floppy disk drive 1, proceed as follows:
1. Insure that there are no diskettes in the floppy disk drive(s).
CAUTION
Turning power on or off with diskettes loaded may cause loss of data on the diskettes.
2. Turn on ADVANTAGE power by pressing the ON/OFF switch at the rear of the cabinet to the ON position.
3. Insert a system diskette or diagnostic diskette into drive 1. Drive 1 is:
- the upper drive in an ADVANTAGE with dual floppy drives
- the lower drive in an ADVANTAGE with a hard disk.
4. Press RETURN after the message "LOAD SYSTEM"
appears on the screen. A program is read from drive 1, and control is turned over to the operating system or the diagnostics.
5. Proceed as prompted by the program loaded. If diagnostics have been loaded, refer to Chapter 6 for further information.
2.2.2
2.2.3
2.2.4
Alternate- Startup - Booting From Drive 2
An ADVANTAGE with dual floppy drives may be booted from drive 2 (the lower drive). To boot from Drive 2, proceed as in Section 2.2.1, except as follows:
At step 3 insert the system or diagnostic diskette into Drive 2.
At step 4 when the "LOAD SYSTEM"~message appears, type D2 before pressing RETURN.
Alternate Startup - Booting From A Serial Port
The bootstrap program allows the system to load a program through a serial communication link. To use this feature, you must have a Serial 1/0 board installed in slot 3. Section 3.13.3 gives details of the communication link.
To boot from a serial port, proceed as follows:
1. Power up the ADVANTAGE (Section 2.2.1) or Reset (Section 2.3) to obtain the "LOAD SYSTEM" message.
2. When the "LOAD SYSTEM" message appears, type Sand then press RETURN. The system then boots from the serial port.
Mini-Monitor Startup
The built-in Mini-Monitor may be started up as follows.
Refer to Section 6.1 for a description of Mini-Monitor commands:
1. Power up the ADVANTAGE (Section 2.2.1) or Reset (Section 2.3) to obtain the "LOAD SYSTEM" message.
2. When the "LOAD SYSTEM" message appears, press CONTROL-C to enter the Mini-Monitor.
ADVANTAGE 2-8 TECHNICAL MANUAL
2.3 RESTARTING THE SYSTEM
2.3.1
The ADVANTAGE may be restarted by entering the unique keyboard Reset sequence, by cycling power, or by pushing the rear panel Reset button. Cycling the power forces the CPU program counter to the base address (OOOOH); the Reset switch and the keyboard sequence both send a non-maskable interrupt (NMI) to the CPU (refer to Section 4.1.1). This interrupt forces the ADVANTAGE to re-initialize and display the "LOAD SYSTEM" prompt.
CAUTION
Resetting the ADVANTAGE during program operation can cause loss of data. Use the keyboard reset feature to reset the ADVANTAGE only to recover from system hard errors.
RESET THE ADVANTAGE USING THE REAR PANEL SWITCH ONLY WHEN ALL RECOVERY METHODS HAVE FAILED.
Keyboard Reset
The ADVANTAGE system may be reset by pressing four keys simultaneously on the keyboard. The keys are: CMND, both SHIFT keys, and <Xl. The effect of this reset is equivalent to pushing the Reset pushbutton on the rear of the ADVANTAGE cabinet.
The keyboard reset feature may be enabled and disabled under program control. When power is first applied to the ADVANTAGE or after the Reset pushbutton is pressed, the keyboard reset feature is enabled. Thereafter, the feature can be disabled and re-enab1ed by the program
(see Section 3.5.1).
IMPLEMENTING ADVANTAGE FEATURES 3 This chapter provides programming information for the various sections of the ADVANTAGE, including the I/O devices. It also explains how to reconfigure the SIO and PIO boards to change their mode of operation.
3.1 MICROPROCESSOR CONTROL
3.2 3.2.1
The ADVANTAGE uses the Z-80A microprocessor as its central processing unit (CPU). Refer to the Appendix G for the programming details of this integrated circuit.
MEMORY CONTROL Memory Mapping
The ADV~TAGE computer uses a memory mapping scheme to expand its memory addressing capabilities from 64K bytes to 256K bytes. This effectively expands the Memory Address bus from 16 bits to 18 bits.
The addressing scheme divides the 256K bytes into 16 pages of 16K bytes each (see Table 3-1). The three major areas of memory in the ADVANTAGE: the Main RAM, the Display RAM, and the Boot PROM, are permanently assigned to the addresses shown in the table.
ADVANTAGE 3-1 TECHNICAL MANUAL
Page 0 1 2 3 4
5"
6 7 8 9 A B C
D E
F
Table 3-1
2S6K Address Space Allocation
18-Bit Address Contents
00000 - 03FFF 16K bytes of Main RAM 04000 - 07FFF 16K bytes of Main RAM
08000 - OBFFF 16K bytes of Main RAM OCOOO - OFFFF 16K bytes of Main.. RAM 10000 - 13FFF
} Not presently used
14000 - 17FFF 18000 - 1BFFF 1COOO - 1FFFF
20000 - 23FFF First 16K bytes of Display RAM
24000 - 27FFF Last 4K bytes of Display RAM
repeated four times 28000 - 2BFFF Not used
2COOO - 2FFFF Not used 30000 - 33FFF
34000
-
37FFF } 2K-byte Boot - PROl~ repeats38000 - 3BFFF to fill 64K bytes 3COOO - 3FFFF
Memory mapping is implemented by four Memory Mapping registers. Figure 3-1 shows how these registers work.
First, output instructions are used to load the register with the appropriate bits. Thereafter, each time the memory is accessed, the upper two bits of the program address automatically generate four bits of memory address by selecting one of the four Memory Mapping registers. The remaining 14 bits of the program address are passed through to the memory address wi thou t change.
With anyone configuration of the Memory Mapping registers, the program has access to only four of the 16 possible pages. In order to change the four pages it wishes to access, the program must change one or more of the Mapping registers.
Memory Mapping Registers
115 114113 1 12 1 11 I 10 I I
1 PROGRAM
9 1
8 1 7 I 6 I I
3 I 1 1 1 0
ADDRESS 5 4 2
\ 1\ 1
W 9
'\ ADDRESS 2 r"-
LOAD
4\. FOUR 4-BIT
\. MAPPING
DATA REGISTERS
IN
jDATA
OUT,
( A "
II
,
MEMORY 117 1 16 I 15 I 14 113 I 12 1 11 I 10 I 9 1 8 I 7 1·6 1 5 1 4 1
3 1 2 1
1 I o
I
ADDRESS
\ w -" w I
PAGE SELECT ADDRESS ON PAGE
Figure 3-1
ADVANTAGE 3-3 TECHNICAL MANUAL
Table 3-10 (Continued) NOTES
• Bits 0-3 are only valid after bit 7 changes state to acknowledge that the command has been executed •
• When bits 0-3 contain the disk sector number, they have a range of 0-9 for the 10 sectors, or one of the
following special codes:
E = disk drive motors off F
=
index pulse detected 3.5 KEYBOARD CONTROL3.5.1
This section contains the programming information for the ADVANTAGE keyboard. Refer to the diagrams and tables in Section 3.4 for the following discussion.
Keyboard Reset Enable
The 4-key reset feature of the ADVANTAGE keyboard may -
be enabled or disabled under program control. This feature is initially enabled at power-up. It may be disabled under program control by issuing the two- command sequence "6,7" to the I/O Control register (I/O address FOH) when the feature is enabled. This command sequence complements the current state of the Keyboard NMI flag and places its current state into bit 0 of I/O Status register 2 (I/O address DOH).
The keyboard reset is enabled by power-on reset, pushing the RESET button, or by the program issuing the
"6,7" sequence to the I/O Control register when the feature is disabled. Once enabled, the 4-key keyboard reset functions exactly like the RESET pushbutton reset. It forces a non-maskable interrupt to reset the system as described in the following section.
3. Wait for the Command Acknowledge bit to complement.
This delay is in the range of 0.5 to 1.5 milliseconds.
4. Input from liD Status register 2 and check bit
o.
If this bit is on, the KB MI flag is now set.
5. If the KB MI flag is reset, repeat step 2 above.
When the keyboard causes an interruEt, verify the source of the interrupt by liD Status register and checking bit O.
if the keyboard is interrupting.
the program can inputting from This bit is on To clear the interrupt, the program must input keyboard characters (see Section 3.5.4) until the Keyboard Data flag is reset. This flag is bit 6 of liD Status register 2.
Polled. If the keyboard is to be polled rather than operated in interrupt mode, the KB MI flag must be reset. This flag is reset when the ADVANTAGE power is turned on, or when the ADVANTAGE Reset Button is pushed. The program may reset the KB MI flag by repeating the same sequence as above and checking the bit for "off" (zero) at step 4. Perform a repeat (step 5) if the KB MI flag is set.
The program polls the keyboard by periodically inputting from liD Status register 2 (liD address DOH) and checking bit 6. If the bit is on, the program
reads the keyboard character(s) as described below.
ADVANTAGE 3-18 TECHNICAL MANUAL
3. 7 FLOPPY DISK DRIVE CONTROL
The Floppy Disk Drive Controller uses a mlnlmum of hardware and requires a sophisticated program, implemented in ROM, to read from and write to the disk drives. Some of the timing and motor control is determined by the program.
The program communicates with the Floppy Disk Controller in the following ways:
1. Through the Shared I/O Interface registers described in Section 3.4.
2. By outputting control bytes to the Drive Control register. The format for the register is shown in Table 3-16, and its I/O address is listed in Table 3-15.
3. By accessing the other I/O addresses given in Table 3-15.
Table 3-15
Floppy Disk I/O Addresses I/O Address
(Hexadecimal) Operation Description
80 INPUT
so
OUTPUTInput Disk Data. Sets the processor into the wait state until the disk data is available, then reads the data. Inputting from this address when data is unavailable puts the processor into a continuous wait state.
Output Disk Data. Sets the processor into the wait state until the Disk Controller writes the data to the diskette. Outputting to this address before setting the Disk Write flag puts the processor into a continuous wait state.
81
81
82
82
83
Table 3-15 (continued) INPUT
OUTPUT INPUT
OUTPUT
OUTPUT
Input Sync Byte. Sets the processor into the wait state until the sync byte is available, then reads the data. If the disk format is correct, the character read is a BFH. Inputting from this address when a sync byte is not available puts the processor into a continuous wait state.
Load Drive Control Register. See Table 3-16 for the register format.
Clear Disk Read Flag. Terminates the disk read operation. The data input by this address is inde- terminate.
Set Disk Read Flag. This flag is set as one of the steps in
initiating a disk read operation.
The output data is ignored.
Set Data write Flag. This flag is set to initiate a disk write operation. The output data is ignored. The Disk Write flag is cleared on the leading edge of the next sector mark.
NOTES
eWhen these IIO addresses are decoded, bits 2 and 3 are ignored. This produces four address for each function that work equally well. For example, addresses 80, 84, 88 and 8C all produce identical results.
elf a disk operation causes the processor to continuous wait state, the Main RAM refresh interrupted and data in Main RAM is lost.
go into a cycles are
ADVANTAGE 3-32 TECHNICAL MANUAL
Table 3-16
Floppy Drive Control Register Format I/O Address 81B (output only)
7 6 5 4 321 0
[I I I I I I I
" '~1 +
Disk Drive 1. A one selects disk drive 1., Bit 1 must be off.
Disk Drive 2. A one selects disk drive 2.
Bit 0 must be off. This bit is not used in the ADVANTAGE HD-5 floppy drive.
~--- Not used.
~--- Step Pulse. Setting this bit on, then
resetting it, causes the head to step in the selected disk drive. This bit must remain off for at least 5 milliseconds between step pulses.
---Step Direction/Precompensation
A. During stepping of the disk from track to track, this bit determines the step
direction.
o =
Step toward outer cylinder 1=
Step toward inner cylinderB. During writing, this bit controls write.
precompensation.
1 = Use precompensation
o =
Use no precompensation.Precompensation is required on the inside 20 cylinders- tracks 15 through 34 on side 0 and tracks 35 through 49 on side 1.
~--- Diskette Side Select.
o
= Side 0 1=
Side 1~---Not used
3.7.1
3.7.2
3.7.3
3.7.4
A disk operation involves selecting the drive, enabling the motor, performing a head seek, selecting a sector, and then performing the read or write operation. These operations are described separately in the following subsections.
Power-On Initialization
The data separation circuitry must be initialized after power is applied to the disk controller but before a read or write operation. This is done by alternately setting and clearing the Disk Read flag (1/0 address 82H» at approximately lOO-millisecond intervals for five cycles.
Motor Enable
Both disk drive motors are turned on whenever a command 5 is received (Start Disk Drive Motors, see Table 3-8).
If the command 5 is removed for three seconds, the value OEH is displayed as the sector number. After 100 microseconds both disk drive motors are turned off and the Drive Control register is reset to zeros. The 100- microsecond delay prevents the motors from being turned off in the middle of a read or write operation.
Drive Selection
After the drive motors are turned on, the program loads the Drive Control register (see Table 3-16) to select one of the two drives. In the ADVANTAGE HD-5, this drive is always disk drive 1, i.e., the floppy drive.
At the same time the other bits of the register may be loaded in preparation for a head seek, read, or write.
Seek
The positioning of the disk drive read/write head is entirely under program control. The program must keep track of the position of the head and generate the timing pulses required to move the head from track to track.
ADVANTAGE 3-34 TECHNICAL MANUAL
3.7.5
The head is initialized (set on Track 0) by stepping it one track at a time' toward the outside of the diskette, and after each step, inputting 1/0 Status register 1 (1/0 address EOH). Bit 5 of the register is on when the selected drive has its head positioned on track O.
There are 35 tracks per side.
The head is stepped by setting and then resetting bit 4 of the Drive Control register (1/0 address 8lH). When the head is moved by more than one track in either direction, this bit must remain off for at least 5 milliseconds between step pulses. When the head reaches its destination, the program must delay at least 20 milliseconds to allow time for the head to settle.
Sector Selection
The sector number is read by performing the following sequence:
1. Input and record the state of the Command Acknowledge bit (1/0 address DOH, bit 7).
2. Issue command 5 to the I/O Control register (1/0 address FOB, refer to section 3.4).
3. Wait for the command acknowledge bit to complement.
This delay is in the range of 0.5 to 1.5 milliseconds.
4. Input the Sector Mark bit (1/0 address EOB, bit 6) until it is found to be zero.
5. Input the sector number (1/0 address DOH, bits 0 through 3). This number is valid while the Sector bit is zero, and for 50 microseconds thereafter.
The number obtained by following the above procedure is actually the number of the previous sector. For example, if sector 6 is to be accessed, the program must search for sector 5. If the desired sector is not found on the first attempt, repeat steps 4 and 5 above until it is found.
3.7.6
When the correct sector has been located, the program goes into a loop, waiting for the sector mark to go from a zero to a one. The read or write operation sequence must be initiated on this transition.
Read Data
After the proper sector number is found, the read sequence is as follows:
1. Wait 500 microseconds after the
transition of the Sector Mark bit. zero-to-one 2. Set the Disk Read flag by outputting to I/O address
B2H.
3. Change the Acquire Mode flag to zero (bit 3 of I/O address FOH).
4. Wait 150 microseconds, then change the Acquire Mode flag to a one.
5. Wait until the Disk Serial Data bit (I/O address EOH, bit 7) changes to a one.
6. Input the sync byte (I/O address BlH). This byte should be FBH.
7. Input from I/O address BOH for the remainder of the data. The next byte read is the second sync byte~
which is (sector number) + (16 x track number) truncated to the lower eight bits. Following this are the 512 data bytes and the CRC byte. The CRC byte is not checked by hardware; a software routine is needed if checking is desired.
B. The program's task is complete at this point. The hardware will reset the Disk Read flag at the zero- to-one edge of the next sector mark. Duiing the sector mark a new read sequence can be started.
Read timing is illustrated in Figure 3-4A. Note that the timing is such that consecutive sectors may be read.
ADVANTAGE 3-36 TECHNICAL MANUAL
3.7.7 write Data
After the proper sector number is found, the write sequence is as follows:
1. Input the Write Protect bit (liD address EOH, bit 4). The bit must be a zero to write on the diskette.
2. If writing to one of the inner tracks, set the Precompensation bit (I/O addressslH, bit 5).
Precompensation is required on tracks 15 through 34 on side 0, and tracks 35 through 49 on side 1.
3. Set the Disk Write flag by outputting to I/O address s3H. This must be done within 150 microseconds after the zero-to-one transition of the Sector Mark bit
(I/O address EOH, bit 6).
4. Output 33 consecutive bytes of zeros to I/O address SOH. This forms the preamble of the sector.
5. Output two sync bytes to I/O address SOH. The first contains the synchronization byte (OFBH), and the second contains the sector address (see READ DATA).
6. Output 512 data bytes to I/O address SOH.
7. Output the CRC byte to I/O address SOH. Note that the program must calculate the CRC byte.
8. The program's task is complete at this point. The hardware will reset the Disk Write flag at the zero- to-one edge of the next sector mark. During the sector mark a new write sequence can be started.
Note that it is possible to write contiguous sectors by waiting for the Sector Mark bit to return to zero, and starting again with step 3 above.
Write timing is illustrated in Figure 3-4B.
Disk Read/Write Timing
A-READ TIMING
__ 1-414--
-5 ms---.1_,
HOLE - , ,~----~;j~'---~L-
r-
--3mS4
---~,~(--~
SECTOR MARK ...J- } ,- i r
1 r-
500 MSDISK READ FLAG ---.J
II ~.---17ms---~
ACQUIRE MODE ~ ,....----~---
j
l.-150 MS--. r
0 TOI
200 SYNC BYTE-FBH MSDATA (NOMINAL , /
1
~~~~;~~R~:tTE IzEROSIII
512DATA BYTES
:t-t _ _ ... I .. I_G_A_R_B_A_G_E ..111
msU TFlACK AND SECTOR' L CRC .. I
~
...
- - - -20 ms ---+01-.
B-WRITE TIMING
_11-+-4
- - - 5 ms1
HOLE , ' - -_ _ _ _ _ _ ...J,.., --~/ ,r-'
---.L..
,
SECTOR MARK -J~---~/
/
•r-3
m s - , r---~/~I---~I
DISK WRITE FLAG ~- , r ' -
- - . . , LESS THAN 150 MS
r
SYNC BYTE - FBHDATA (NOMINAL "
~~~~;~~R~:tTE IZEROSIII
512DATA BYT'~I-i __ --,I_I
---'~ 1 ms
LL
TRACK AND SECTOR L CRC... - - - -17.5 ms ...I
~---20ms---__ ~
Figure 3-4
ADVANTAGE 3-38 TECHNICAL MANUAL
3.7.8 Floppy Disk Data Format
Each floppy disk is formatted for 35 data tracks per side, with each track containing 10 hard sectors. Index holes in the diskette media physically mark the beginning of each sector. An eleventh index hole provides the Floppy Disk Controller with an indication of one complete disk revolution. Actual disk recording begins approximately 96 microseconds after sector hole detection.
The data format is shown in Figure 3-5. Each sector contains a Preamble (16 bytes of zeros), a Sync Character (FBH) byte, 256 bytes of data, and a Check Character byte. The formatting program computes the Check Character constantly by setting it to zero, then exclusive DRing each successive data byte value with the current value of the Check Character and rotating the byte left one bit.
Floppy Disk Track and Sector Format
SECTOR 1 SECTOR 2
INDEX SECTOR 0 MARK MARK
I I MARK I I
~~---~~~---SE-C-T-O-R-1----~~
~
I
SECTOR 0I
-3ms ~I ... --- -20ms ----.~
,
I
n ~YxxJ<..xxxxx~~1 \
DATA (51; BYTES IIt
CRC BYTE331~6:ES TRACK AND SECTOR 1.0.
SYNC BYTE (FBHI
NOTE: WAVEFORMS REPRESENTATIVE OF DATA SEPARATOR OUTPUT I DATA POSITIVE TRUE, ALL ELSE NEGATIVE TRUE I
Figure 3-5
3.8 HARD DISK DRIVE CONTROL
3.8.1
The ADVANTAGE HD-5 has a separate Disk Controller board dedicated to the hard disk.
It requires its own disk driver program to perform read or write operations. The driver program must:
Format the drive.
Position the drive head over the desired track Locate the desired data sector.
Initiate the read or write operation.
These operations are described in detail in this section.
The program communicates with the controller through 16 contiguous IIO ports (addresses). Although only eight of the addresses are used in performing a read or write operation, the controller responds to all 16. Commands used to communicate with the controller via the 1/0 ports are described in Section 3.8.1.
1/0 Commands
The controller occupies an address space of 16 consecutive 1/0 addresses. The controller responds to eight input commands and three output commands, as described in Table 3-17.
ADVANTAGE 3-40 TECHNICAL MANUAL
Table 3-17
Hard Disk Drive I/O Commands I/O Address
(Hexadecimal) Function
OUTPUT COMMANDS 05
06
07
INPUT COMMANDS 00
01
Load Sector Counter. Loads the Sector Counter in the controller. This command is used only when formatting the disk drive to write the controller index pulse. It prevents an inadvertent sector pulse from stopping the write operation when the drive is being formatted.
Load Control Register. Loads the Drive Control register in the controller. The control bits are defined in Table 3-18.
Host Write RAM. Writes the data into the RAM location to which the RAM Address Counter currently points. The RAM Address Counter is incremented by 1 after the RAM write is complete.
Read RAM. Reads the data from the RAM location to which the RAM Address Counter cur rently points. At the end of the inpu tope ra t ion, the RAM Address Counter is incremented by 1.
Read Status. Transfers information from the Controller Status register to.
the computer. The status bits are defined in Table 3-19.
Table 3-17 (Continued)
IIO Address Function
(Hexadecimal)
02 Clear RAM Address. Resets the RAM Address Counter to location O.
03
04
05
06
07
Clear Sector. Clears the sector pulse latch.
Start Sync. Sets the enable sync latch. This latch is set at the beginning of each read to allow the controller board to synchronize with the preamble at the beginning of the sector (see Figure 3-6).
Start Read. Sets the read enable flip-flop and clears the sync latch.
This allows the controller to begin looking for the sector sync byte.
Start Write. Sets the write latch in the controller, enabling writing on the drive.
Format Write. Sets the write latch and clears the index one-shot. This command is used only when formatting the drive to permit writing during the index pulse.
NOTE
In dec9ding the I/O address, the controller ignores bit 3. Thus, for each function, there are two addresses that work equally well: Addresses 00 and 08 produce identical resul ts, as do 01 and 09, 02 and OA, etc. In this table only the nominal form (bit 3=0) is listed.
ADVANTAGE 3-42 TECHNICAL MANUAL
Table 3-18
Hard Disk Drive Control Register Format
I/O Address 06H 7 6 543 210
I I I I' I I I I
~
Head Select. Binary code selects one of four drive heads (numbered 0 through 3).Reserved for future use.
Low Write Current. Controls the reduced write current signal to the drive. This bit must be set to:
o
= for writing on cylinders 0 through 127 (normal current).1 = for writing on cylinders 128 through 152 (low current).
Head Step Pulse. This bit must be set to one and then zero under program control to issue a head step pulse to the drive.
~--- Step Direction/Precompensation.
A. Dur ing stepping of the heads from cylinder to cylinder, this bit determines the step direction:
O=Step toward inner cylinder (higher number cylinder).
, 1 = Step toward outer cylinder (lower number cylinder).
B. During writing, this bit controls write precompensation:
o
= precompensation on 1 = precompensation offPrecompensation is required on cylinders 64 through 152.
~--- Not used.
~--- Header Read Enable. When set to a one, this bit causes the controller to read the first 15 bytes of a sector into controller RAM locations 1 through 15.
This implies that the Clear RAM Address command (input, I/O address 02H) was executed before executing the read
Table 3-19
Hard Disk Controller/Drive Status Bits
IIO Address OlH 7 6 543 2 1 0
I I I I I I I I I
I t Write Fault, A zero indicates that there is a fault in the drive and that it is not safe to perform any operations with the drive.
Seek Complete. A zero indicates that the seek is complete in a drive and that all head motion has stopped. This bit, in conjunction with the Drive Selected and Ready bits (3 and 4, respectively) is used to determine when a drive is ready to read and write.
L - -_ _ _ Track O. A zero indicates that the drive head is positioned over cylinder O.
' - - - Drive Selected, A zero indicates that the drive is selected. The drive is automatically selected as soon as power is applied to the drive and remains a zero as long as the drive is selected.
~---Ready. A zero indicates that the drive is ready for a new operation. This bit becomes a zero approximately 15 seconds after power is applied to the drive and remains a zero as long as the drive is selected.
'--- Read/Write Active. A one indicates that the controller is in the process of performing a read or write operation. During these times no access by the program is permitted to the controller RAM memory. This bit is asserted when the actual input sync byte "has been found on read and remains asserted until the next sector pulse. For a write operation, the bit is asserted when the Start Write command (input, IIO address 06H) is executed and remains asserted until the next sector pulse.
L - -_ _ _ _ _ _ _ _ _ _ Controller Index. A zero indicates that the controller index pulse is present. This bi t goes low on the leading edge of the physical index pulse from the drive and returns high when the controller's index pulse written on the data track is detected. The bit is guaranteed to be low for a minimum of 100 microseconds per revolution.
'--- Controller Sector. A one indicates that the controller has seen a sector pulse. This bit is the output of a latch that is set each time the electronically generated sector pulse occurs. It is cleared under program control, using the Clear Sector command (input, IIO address 03H). Note that the first sector pulse is generated immediately after the index pulse.
ADVANTAGE 3-44 TECHNICAL MANUAL
