Example with sequential multiplication

(1)

1 Control

1 1 0 0 +

0 0 + +

0 0

1 0 0

1 0 1 0 0 0 0 0 0

1 1 1

1 1

1 0

1 1

1 0

1 0 1 0 1 0

0 0 1 1 0 0 +

0 0 0 0 0 0 0 +

0 0 1 0 1 0 1 +

0 0

1 0 0 1 0 0 0 0

0 1 1 1

1 1

1 0

1 1

1 0

Control

Example with sequential multiplication

Intermediate result

Operand 2

Result

+

Reset W_result

W_operand Shift Operand 1

Counter Increment

Operand 2

Result

+

Reset W_resultat

W_Operand Shift Operand 1

Multiplier Control

Op1→Operand 1 Op2→Operand 2

0→Result

Yes End

W_Operand

Reset

Op1+Result→Result 1

W_Result 0

Counter=3?

Counter

=3?

Increment

Shift Operand Increment Counter

No

Shift Increment

Operand₀ Operand₀

(2)

2

0

Converting a Flowchart into a Control Circuit

Step 1 Signal 1

Step 2 Signal 2

Flip-Flop D Signal 1

Signal 2

→

x ¹

→

^x

Multiplier Control Circuit

Op1→Operand 1 Op2→Operand 2

0→Result

Yes End

W_Operand

Reset

W_Result 0

No

Shift Increment Counter=3?

Operand0

Operand₀

Flip-Flop D

Counter=3 ? W_Operand, Reset

End W_Result

Shift Increment Flip-Flop D

Shift Operand 2 Operand 1 Operand 2 00000011

Result

0 1

Multiplier Control Circuit

+

Reset W_Result

Flip-Flop D

Flip-Flop D End Counter

W_Operand

clock

2n

2n 2n

2n

0 0

0 0 0

0011

00000000 Operand 1

2n 0111

00000111

1

0 1

00000011

1

1 1 00000110

00000011

1

00001001

1 1 00001100

00000001

2

1

00010101

1 1 00011000

00000000

3 1

1 End Flip-Flop D

Increment

(3)

3 A Systematic Approach for Designing a Sequential Circuit

Approach:

convert a finite- state automaton into a circuit Multiplier:

•

4 states

•

Inputs: Operand

₀

et Counter=3.

•

Outputs: W

_Operand

, Reset, W

_Result

, Shift, Increment, End.

Op1→Operand 1 Op2→Operand 2 0→Result

Yes End

W_Operand

Reset

W_Result 0

No

Shift Increment Counter=3?

Operand₀

Initial state

Addition

Iteration End

Sequential Circuit Design - Automaton

O0↔Operand0

C↔Counter=3 W_Operand=1 Reset=1 W_Result=0 Shift=0 Increment=0 O0=1

C=d

O₀=0 C=d Initial state

W_Operand=0 Reset=0 WResult=1

Shift=0 Increment=0

W_Operand=0 Reset=0 WResult=0

Shift=1 Increment=1 W_Operand=0

Reset=0 W_Result=0 Shift=0 Increment=0

Addition Iteration

End C=1 O₀=d

C=0 O₀=0 C=0

O₀=1

W_Operand=1 Reset=1 W_Result=0 Shift=0 Increment=0 O₀=1

O₀=0 Initial state

WOperand=0 Reset=0 WResult=1 Shift=0 Increment=0

WOperand=0 Reset=0 WResult=0 Shift=1 Increment=1 W_Operand=0

Reset=0 W_Result=0 Shift=0 Increment=0

Addition Iteration

End

C=1 C=0

O₀=0 C=0

O₀=1

Sequential Circuit Design – Transition Table

Storing states → flip- flops

Assign states (4 states

→ 2 flip-flops Q

₁

Q

₀

).

Specify transitions (Q

⁺

=next state).

End Iteration Addition Initial

Etat

1 1 0 0 Q1

1 0 1 0 Q0

0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 Inc.

1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 End

0 0 0 0 1 1 1 1 1 1

1 0 0 0 1 1 0 1 1 1

0 1 0 0 0 1 1 0 1 1

0 0 1 1 1 0 0 0 1 1

0 0 0 0 1 1 1 1 0 1

1 0 0 0 1 0 0 1 0 1

0 1 0 0 0 1 1 0 0 1

0 0 1 1 1 0 0 0 0 1

0 0 0 0 1 1 1 1 1 0

1 0 0 0 1 1 0 1 1 0

0 1 0 0 0 1 1 0 1 0

0 0 1 1 0 1 0 0 1 0

0 0 1 0 Wrés

0 1 0 0 Déc

.

0 0 0 1 Rese

t

0 0 0 0 O0

0 0 0 0 C

1 0 0 0 Q0+

1 1 1 1 Q1+

1 0 1 0 Q0

0 0 0 1 Wop.

1 1 0 0 Q1

(4)

4 Sequential Circuit Design – Final Circuit

Using D flip-flops

Set D1, D0so as to impose desired transitions

Q⁺=D→transition table = truth table ofD₁, D₀.

Outputs correspond to current states

0 1 0

1

0 1

1 0 1 0 0 0

1 0 0 1

. .

. Reset

. . .

.

Q Q Increment Shift

Q Q W

Q C Q Q Q O D

Q C Q O D

res operand

=

+ +

= + +

=

1 1 0 0 Q⁺

1 1 0 0 D

1 0 1 0 Q

1 0 1 0 D

1 1 0 0 Q

1 0 1 0 Q⁺

...

1 1 1 1 1 1 1 1

...

1 1 1 1 0 1 1 1

...

0 1 0 1 1 0 1 1

...

1 0 1 0 0 0 1 1

...

1 1 1 1 1 1 0 1

...

1 0 1 0 0 1 0 1

...

0 1 0 1 1 0 0 1

...

1 0 1 0 0 0 0 1

...

1 1 1 1 1 1 1 0

...

1 1 1 1 0 1 1 0

...

0 1 0 1 1 0 1 0

...

0 1 0 1 0 0 1 0

1 0 0 0 D0

...

0 0 0 0 O0

0 0 0 0 C

1 0 0 0 Q0+

1 1 1 1 Q1+

1 0 1 0 Q0

1 1 1 1 D1.

1 1 0 0 Q1

Data Paths - Bus

Connecting a large number of components:

bus.

Bus =a set of n 1-bit wires

Very cheap, but not efficient with large number of components

COMPONENT - 1

COMPONENT - 2

COMPONENT - 3

COMPONENT - 4

1 0 open open Z

1 1 0 0 C

1 0 1 0 X

Bus

Synchronous buses:

•

All components timed with same clock

•

Links indicate

address, data, command

•

Internal buses or connection to memory

Access protocol (priorities,…) implemented in control circuit

Address

Read

Data Data Command Address

Data Write Clock