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TL-TILECAL-PROC-2018-002

31/07/2018

ATLAS Tile Calorimeter Upgrades for HL-LHC

S. Angelidakisa,∗,

on behalf of the ATLAS Tile Calorimeter System

aLaboratoire de Physique de Clermont-Ferrand (LPC), Universit´e Clermont Auvergne, CNRS/IN2P3, France

Abstract

The High-Luminosity phase of the Large Hadron Collider (LHC) at CERN is expected to begin in 2026, delivering a luminosity of 5 × 1034cm−2s−1, with up to 200 interactions per 25 ns bunch crossing. In order to cope with the expected high trigger rates and

intense radiation environment, the ATLAS Tile Calorimeter will be upgraded with re-designed electronic systems that will maintain its optimal performance in its future operation.

Keywords: Calorimetry PACS:29.40.Vj

1. Introduction

The Large Hadron Collider (LHC) [1] at CERN is sched-uled to undergo a decisive upgrade program [2], that will extend its physics potential well beyond the initial design goals [3, 4]. The final, High-Luminosity LHC (HL-LHC) is expected to be-gin operation in the year 2026, delivering an instantaneous lu-minosity of about 5 × 1034cm−2s−1 and aiming to collect an integrated luminosity of at least 3000 fb−1by the year 2035.

In order to perform in the harsh radiation environment of the HL-LHC, with up to approximately 200 proton-proton colli-sions per 25 ns bunch crossing, the ATLAS detector [5] is also scheduled for important upgrades, targeting for an all-new in-ner tracker, upgraded calorimeters and muon spectrometer, as well as an improved trigger and data acquisition system [6].

2. The ATLAS Tile Calorimeter

The Tile Calorimeter (TileCal) [7] is the central hadronic calorimeter of ATLAS, constructed of steel plates as absorber and scintillating tiles as active medium. It is divided into two central long-barrel and two extended-barrel partitions, covering the pseudorapidity1 range |η| < 1.7. Each barrel is comprised

of 64 wedge modules, tightly aligned along the azimuthal coor-dinate. The scintillation light is collected from both sides of the tiles by wavelength-shifting (WLS) fibres, which are bundled, to define readout cells, and coupled to a pair of photomultiplier tubes (PMTs). This arrangement of the Tile readout employs a total of 9852 PMTs.

Corresponding author

Email address: [email protected] (S. Angelidakis)

1ATLAS uses a right-handed coordinate system, centered at the nominal

interaction point. The x-axis points towards the center of the LHC ring, the y-axis points upwards and the z-axis points along the beampipe. Cylindrical coordinates (r,φ) are used in the transverse plane, φ being the azimuthal angle around the z-axis. The pseudorapidity is defined in terms of the polar angle θ as η= − ln(tanθ2).

3. Mechanics

The PMTs and Front-End (FE) electronics are inserted at the outer radius of each Tile module, currently housed by a pair of mechanical structures, called “drawers”. The upgrade plan foresees the replacement of the 1.4 m long drawers with mini-drawers of half their size to improve the reliability of the cool-ing circuits and grant easier access to the electronics. Each mini-drawer is designed to host up to 12 PMTs, along with dedicated FE readout and High Voltage (HV) distribution cards. Another benefit of the mini-drawers is the reduced demand for a wide detector opening in order to service the Tile electronics.

4. Front-End electronics

The PMTs are currently read by FE cards, which shape and amplify the signal in two channels, with a gain ratio of 64. The analog output is then digitised by 10-bit 40 MSps Analog-to-Digital Converters (ADCs), located on dedicated boards, seri-alised and transmitted to the back-end electronics upon trigger decision. The upgraded readout system is adapted to the trigger policy of ATLAS for the HL-LHC, which requires delivery of the data from each mini-drawer to the off-detector electronics, upon each bunch-crossing. As in the current system, the ana-log processing of detector signals is performed in two channels, but with a gain ratio of 32, while digitisation is carried out at the Mainboard by 12-bit ADCs, establishing an effective 17-bit dynamic range. The digitised data are finally received by the Daughterboard, that handles all communication with the back-end electronics, to be deserialised and propagated to the o ff-detector Pre-Processor (PPr) through high-speed optical links.

5. Pre-Processor (PPr)

The PPr serves as the off-detector interface to the FE elec-tronics, sending Detector Control System (DCS) commands

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and run-control data to the Daughterboards, using the GigaBit Transceiver (GBT) protocol (4.8 Gbps). Each PPr unit receives and deserialises the data from 32 mini-drawers, at the 40 MHz LHC clock cycle, and stores them in pipeline buffers. At the same rate, reconstructed data are transmitted to the trigger sys-tem. The stored samples are then forwarded to the ATLAS data acquisition system upon trigger decision. Finally, the PPr is de-signed as a full ATCA (Advanced Telecommunications Com-puting Architecture) blade to fit the new data communication protocol adopted by ATLAS for the HL-LHC.

6. Low Voltage Power Supply

The Low Voltage Power Supply (LVPS) system controls and monitors the operating voltage of the FE electronics. Each Tile module is supplied by one water-cooled LVPS box, installed at the “finger” of each Tile module (right in front of the two draw-ers), consisting of eight individual power supply boards, called “bricks”, a fuse board and a monitoring/control board. Cur-rently, each brick converts a 200 V input to the output low volt-age required by the sub-circuit it is powering. The new brick design, however, uses identical bricks with 10 V output, while the supply for the individual loads will be created by means of point-of-load regulators located at the loads. This allows redun-dancy to the system by grouping the bricks into four sets of two and using a diode-OR on the point-of-load regulators.

7. High Voltage Power Supply

The High Voltage Power Supply (HVPS) system controls and monitors the voltage applied to each PMT. In the current sys-tem a primary HV feeds the HV regulation boards (HVopto) installed on each drawer. In the new system, the HV regula-tion boards (HVremote) will be located in the ATLAS counting room, out of the radiation environment of the detector, grant-ing permanent access for maintenance, while the monitorgrant-ing and control system will be implemented by means of Ethernet links. Furthermore, the current, passive HV dividers, attached to the base of each PMT, will be upgraded into active dividers with one transistor and one diode in parallel, in the last three stages. The new design has demonstrated improved linearity for a large range of DC currents, pulse shape stability and radi-ation hardness.

8. Calibration Systems

The TileCal incorporates three calibration systems to ensure accurate and stable measurements. First, the Charge Injection System (CIS), implemented on each FE card, injects the read-out electronics with known charge, allowing constant monitor-ing but also mappmonitor-ing of the FE response (ADC counts) to the input charge (pC). For the HL-LHC, the CIS will be updated to cover the input range of the new FE electronics. Next, the Cesium (Cs) system allows calibration of the full optical chains (scintillating tiles, WLS fibres, PMTs, FEs) by means of a mov-able137Cs γ-source, hydraulicaly circulated through a system

of tubes that traverses every tile-row. The upgrade plan fore-sees integration of the control data flow into the standard data readout electronics (GBT slow control stream), optimization of the operation mode and revision of the principle of the source movement. Finally, the laser system monitors the PMT gains between subsequent Cs scans. The current, reliable architec-ture will be preserved, with substitution of aged components and adaptation of the interfacing card, called LASCAR (LASer Calibration Rod), to comply with the ATCA format of the PPr.

9. Conclusion

As described in the above sections, the TileCal strategy for the HL-LHC relies on the current design, which has demon-strated excellent performance during the preceeding data-taking periods [8]. The scheduled upgrades, focused on the optimisa-tion of the readout system, will allow the TileCal to cope with the harsh radiation environment of the HL-LHC in order to fully exploit the unprecedented delivered luminosity.

Copyright 2018 CERN for the benefit of the ATLAS Collaboration. CC-BY-4.0 license.

References

[1] L. Evans and P. Bryant: LHC Machine, JINST 3 (2008) S08001. [2] G. Apollinari, et al.: High-Luminosity Large Hadron Collider (HL-LHC):

Preliminary Design Report, CERN-2015-005 1-19, arXiv:1705.08830. [3] K. Jakobs: Physics at the LHC and sLHC, Nucl. Instrum. Meth. A636

(2011) S1-S7.

[4] B. Schmidt: The High-Luminosity upgrade of the LHC: Physics and Technology Challenges for the Accelerator and the Experiments, J. Phys. Conf. Ser. 706 (2016) 2 022002.

[5] ATLAS Collaboration: The ATLAS Experiment at the CERN Large Hadron Collider, JINST 3 (2008) S08003.

[6] ATLAS Collaboration: ATLAS Phase-II Upgrade Scoping Document, CERN-LHCC-2015-020 (2015).

[7] ATLAS Collaboration: Readiness of the ATLAS Tile Calorimeter for LHC collisions, Eur. Phys. J. C70 (2010) 1193.

[8] ATLAS Collaboration: Operation and performance of the ATLAS Tile Calorimeter in Run 1, CERN-EP-2018-062 (2018), arXiv:1806.02129.

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