HAL Id: hal-01963537
https://hal.laas.fr/hal-01963537
Submitted on 30 Dec 2018
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Hardware-in-the-loop simulation of PV systems in micro-grids using SysML models
A. Gutierrez, Harold Chamorro, J. Jimenez, Luiz Fernando Lavado Villa, Corinne Alonso
To cite this version:
A. Gutierrez, Harold Chamorro, J. Jimenez, Luiz Fernando Lavado Villa, Corinne Alonso. Hardware- in-the-loop simulation of PV systems in micro-grids using SysML models. IEEE 16th Workshop on Control and Modeling for Power Electronics (COMPEL 2015), IEEE, Jul 2015, Vancouver, Canada.
�10.1109/COMPEL.2015.7236466�. �hal-01963537�
Hardware-in-the-Loop Simulation of PV Systems in Micro-grids Using SysML Models
A. Gutierrez 1−3 , H.R. Chamorro 2 , J.F. Jimenez 1 , L.F.L. Villa 3−4 , C. Alonso 3−4
1
Universidad de los Andes, Department of Electrical and Electronic Engineering, Bogot´a, Colombia
2
KTH Royal Institute of Technology, Stockholm, Sweden
3
Univ. de Toulouse, Univ. Paul Sabatier, LAAS, F-31400, Toulouse, France
4