1K TO 16K EPROM

WIIJI~~

~~IIIMicrocomputerprOducts ,

²¹¹⁶ Walsh Avenue, Santa Clara, CA 95050, (408)246-2707

1K TO 16K EPROM

FEATURES:

SYSTEM COMPATIBILITY

S-IOO bus computer systems.

MEMORY

Up to 16K bytes of 2708 EPROMs (not included)

Any unused EPROM socket will automatically disable the board for that lK incre- ment. For example, with 8 EPROMs it acts as an 8K board, taking up only 8K of memory address space.

ADDRESSING

DIP switch sel~ction of memory address assignment in 16K byte increments.

Magic Mapping TM allows any byte within ROM to be mixed with any similarly add- ressed RAM board equipped with Phantom Disable.

VECTOR JUMP

Power-on/reset vector jump to any 256 byte increment; DIP switch addressable.

Vector jump can be disabled.

Vector jump requires other memory boards to be equipped with Phantom Disable. OTHER FEATURES

DIP switch selection of 0 to 8 wait state crock cycles, so fast or slow EPROMs can be used.

All lines buffered, Reverse voltage protection.

High grade glass epoxy PC board with gold plated edge conn~ctor contacts.

Low profile sockets provided for all ICs.

Power requirements (less EPROMs) -- +8v @ 160mA, +16v @ 10mA, -16v @ 10mA typical.

We used to be Solid State Music. We still make the blue boards.

t

I CON TEN T S

1.0 Assembly Instructions 2.0 Functional Check

3.0 Set-Up

3.1 Address selection

3.2 Prom area enable/disable.

3.3 Magic Mapping . 3.4 Wait state selection 3.5 Jump address selection 4.0 Trouble Shooting Hints

5.0 Theory of Operation 5.1 Use age

5.2 Operation 6.0 Warranty

U12

&

U24 Heatsink Insulator Placement Assembly Drawing

Parts List Schematic

J

SSM MICROCOMPUTER PRODUCTS

2116

Walsh Ave.

Santa Clara, California

~1B8-A - 8K/16K EPROM BOARD 1.0 ASSEMBLY INSTRUCTIONS (refer to figure 1)

D o

o o

D

Check kit contents against parts list.

Check PC board for possible warpage and straighten if required.

Insert 16 24-pin, 9 16-pin, 5 14-pin, and 1 a-pin socket into the com- ponent side of the board with the IIpin ¹¹¹ index toward the top of the boa fd. (The component side is the side on wh i ch liSa 1 i d State Mus i c^{l l}

is printed.)

Place a flat piece of stiff cardboard of appropriate size on top of . the sockets to hold them in place.

Holding the cardboard in place against the sockets, turn the board over and lay it on a flat surface. (Be sure that all of the socket pins ?ore through.the holes.)

Note: Keep soldering iron tip clean to prevent rosin and sludge from being deposited on traces. Wipe tip fr~quently on a d~mp cloth or steel wool .

D

,On each,socket, solder two of the corner pins, choosing two that are diagonally opposite of ~ach other.

D

D D D

o o

Once the sockets are secured, lift the board and check to see if they are flat against the board. If not, seat the sockets by pressing on the top whi 1e reheating each soldered pin.

Complete soldering the remaining pins of each socket. Touch pin and pad with iron tip, allowing enough solder to flow to form a filet between pin and pad. Keep the tip against the pin and pad just long enough to produce the filet. Too much h~at can cause separation of pad and trace from the board. A 600 degree iron is recommended.

Insert and solder 6 2.7K SIPs and I 10K rffsistor.

Insert and solder 5 diodes (observing polarity).

Insert and solder 4 O. luF ceramic capacitors.

Observing polarity, insert and solder 4 dipped & 3 tubular tantalum capacitors.

Insert 2 DIP switches with the word -'--'-'~--.'----"--.-' "OPEN" toward .---, .. :--.. -:---·the .... ^~-.. left ., -... .of _-' ... ^--:..,.. the '--, board. .. --.. '

Place regUlators on the board so the mounting hole in the regulator is in line with the hole in the board. Mark leads for:p~oper bending to match the board holes - allow for a bend radius. . . Bend regulator leads to match holes in board .

. If available, apply thermal compound to the back' side of each regu- . lator case (the side that will contact the heat sink). Use just a

little thermal compound. Too much is worse thailnone at all.

On the front (component side) of the board, position 2 heatsi~ insulators on the U~2and U24 regulator locations

*.

Next position heatsink and insert regulator for each of the 5 regulators. Finally, posit.ion nut and lock-

washer on top of regulator and secure from behind with screw in each case. Be sure regulators and heats inks fit flat on board and then solder all regulator leads.

2.0 FUNCTIONAL CHECK

WARNING! DO NOT INSTALL OR REMOVE BOARD WITH POWER ON. DAMAGE TO THIS AND OTHER BOARDS COULD OCCUR.

Apply power (+8 volts approx.) to board by plugging into computer or by

conn~ction to a suitable power supply. Measure the output of U25. If less than 4.8 volts is measured (allowing for meter accuracy) check for shorts or wiring errors ... CAUTION: WHILE IT HAS NEVER HAPPENED TO US, SHORTED REGULATORS HAVE BEEN KNOWN TO EXPLODE WITH POSSIBLE INJURY TO EYES OR HANDS. BETTER SAFE THAN SORRY - KEEP FACE AND HANDS CLEAR OF THE '. REGULATOR SIDE OF THE BOARD DURING THIS AND SUBSEQUENT TESTS!

Apply power (+16 volts) to the board by plugging into computer or by .connection to a suitable power supply. Verify that the outputs of Ul

&

U13 are between +11.5

&

+12.5 Vdc.

Apply power (-16 volts) to the board by plugging into computer or by connection to a suitable power supply; Verify that the outputs of U12

&

U24 are between -4.8 & -5.4 Vdc. .

Finally, insert the ICs into their sockets, observing polarity.

Now, look the board over ca:refully. Check for poor solder joints or bridges. Using the component layout drawing, look for improper pa~t

location or polarity. A few minutes of careful inspection may save a few hours.of troubleshooting.

*

SeeJllu5tration on page 12.

3

J

.. -+-

3.0 SET-UP

3.1 Address Selection

~he ME-8 card can be set to one of four possible address locations in 16K increments.

HIGH ORDER BITS SETTING OF S2

Starting Address A15 A14 A15 A14

0000 ( 0) 0 0 OPEN OPEN

4000 (16,384)- 0 ^{1 OPEN CLOSED}

8000 -( 32, 764) 1 0 CLOSED OPEN

C000 (49,148) 1 1 CLOSED CLOSED

note: open

=

off closed

=

on Even though the MB-8A card can support 16K of PROM, it can be disabled down to as small as one byte of PROM. No jumpers necessary for disab1e selection!

3.2 PROM Area Enable/Disabl~

A. lK Increments

Where ever PROM is inserted into the MB-8A card, the board can -enable at that address location, and the empty ROM sockets will be addresses that the card will disable itself. This will allow the user to have only lK or 2K of active PROM area. This means you can place a RAM card at an address within the ME-8A's area if there is no PROM in the socket at that address.

B. Less than lK increments.

If., ,the user wants PROM areas on the MB-8A in fractions of lK, it is possible.

Example.

Problem:

Solution:

Only a 512 byte program is needed for system operation, the user then wants the rest of his 16K bytes filled with RAM:.

Address the MB-8A card so that it will overlap the wanted 512 byte program's address. Find the socket on the MB-8.A card which is the lK block that overlays the 512 bytes.

Program a 2708 PROM for this socket with the 512 byte program, and any bytes that are not used shall be pro- grammed with FF Hex. Now insert the ME-8A card with the one PROM into~he computer and insert RAM at all addresses except where 512 bytes of ROM is located.

As you can see, any byte in ROM set to FF Hex will disable the ME-8A

I'

3.3

Magic Mapping

This is the most interesting mode of the MB-8A card, but req~ires

more software and oare in implementing. The idea of magic mapping is the ability of having scratch RAM within the 1024 bytes of a 2708 ROM or have a couple of bytes (or more) of ROM right in the middle of a RAM card. If that sounds like what you have been looking for, then here is how to do it.

A. The RAM card that will be mixed with PROM must be equipped w1t~

Phantom disable. (Pin 67 on the bus going low will disable melij.ory~)

B. Any area of a 2708 PROM you wanted to be changed into RAM must be

programrne~ with FF Hex. - r - -

C. The area of RAM that a 2708 overlaps must be initialized to'FF before the user program can be run. This initialization program can not have any FF bytes in its machine code, if it also overlaps

RAM

memory.

A simple initialization routine is listed below:

FCI.

FII21'

4811

ce81 FCI.

... .

,FC88, 1188 •• ,

,e13 2111C' FCI6AP'

Fel? 2F

FCII 17' FC89 23 'FC~

18

, FC88 19

,08e

BI ,

veep

^{C~16FC' .}

Fell 0321,.,

.ITHIS PROGRAM WiLL FILL JUSTONE\BLOCK 0'"

JME"ORY WITHFY HEX. WRITTEN 'BY NALCOLMVRJGHTI

J 1-18-1978. ' " " , , '

J '-LOC·' , 1 S

THE·

STARTINQ ADDRESS '0·,.' _,

. '

.

^'.

, JTHEPROGRAM •

" ,

LOC

SQU

'FClaH

XXXX EQU

"'821H' ITO US.Jl'S"~NJTOa. , JDEMO.

BYTES

EQU' '" START EQU

"".8H ,INUMBER SF aYTES-16K

·8C181B J

START

ADDR- -TGP' 16K,'

ORa 'LOC ,

JPLAC£ THE NUMBER OF SYTESTO BS CHANGED LXI 8 .. SYTES , . WARNING.

'PLACE THi 'STAR~ INS, ADDatsslNTO H~L+' .

LXI , H#'STABT'

J*WARNIRGl,':

NEXT.

XiA A, CMA

NOV ""A ^{, ,;, 0 ' \}

INX H

DCX B,

MOV, A .. C

ORA a

IN

z

^{IIQ:T J • VA. X'NO' ),~' ,}

'JCHANG'~XXXX TO T"B~TRY PII.TO'V

youa

NO.ITOR.

JKP X X X X " "

.;,

J* ••• -,-THIS "UJII~ SHOU1J~ IJOTHAVE ANY," BY'II

IN

IT- 'END'

's

Fall

Fa21

Fell

•

Fe01 212AFC

J

THIS

PROGRAM WILL·Flu..

AREAS

e,.".vJIITJI

,,.,. HEX AS SPECIFIED IN

AADDaISS\"~8t.$

SUPPLIED

Jay'~ • THE USER. WRITTEN BY, '_LeaLIt . ,WR1GaT#I~1'·19.71. , t '

. ' , '-

, .

J~·L.OC·· ^{IS THE}

STARTING

^ADDRESS

0'

TIS PROG'MM- ,

L.OC·EQU ",.eSSH

. XXXX EQU 'F021H

JT~ USER'.

MONITeR

ORa

LOC

JTHE ENTRY POINT OF THIS PROGRAM BEGINS VITH JLXI H INSTRUCTION. THE TWO BYTES THAT ARE GOING

J

INTO

H&1. CAN NGT BE FF HEX. ' .

JIF EITHER BYTE IS FF

^{I '}

THEN TRY THIS-

- .I MV I Hoi " .I I F REG. HIS FF'.

J DCR H

;' MVI L"LOW JSET 1.0W

^1/2

OF At>DR.

JOR THIS:

.I MVI

.I

MVI

J OCR

HIHIGH

1..,0

L

.I SET HIGH 1/2 OF ADDR,~

IIF REG.1..

15

FY.

FC0~

4£ 'GETa

L.XI

MOV

INX·

MOV

INX

MOV INX t10V

INX MOV

ORA

JNZ ORA JNZ ORA JZ

. HITABLE JTABLE

0,. ADDRESSES,!

elM

Felli 23

Fees 46

FC06 23 FCi7 5E

FC08 2-3' . FC09 56

FC0A 23

FC0B 76

FC0C B1

~C0D C21iFC

FC10 B3 FCII C218FC FC14 ,62

FC15

CA21F0

Fe18 ~B

FCl9 03 FCIA Aii'

reid'

2F

FClC 02

reID 78

Fe1E BA FelF DA19FC FC22 19 FC23 SS FC24 DAl9FC

F027 C303FC FC2A

START: DCX

NEXT: INX

XRii

CMA

STAX t10V

eM?

Je

MOV eM?

JC J1'1P

TABLE: DS

H

B~H

JSTARTING ADDRESS

H

E"M

H D"M H

A"B

C START E START

o

XXXX

B B A

a A"a

D

NEXT

A .. C E

NEXT

GET 12

.lEND ADDRESS

;CHECK FOR LAST

". WARNING

I

". WARNING I·

JSET XXXX TO THE ENTRY JADDRESS OF YOUR MONITOR.

JINITIALIZATION IS COMPLETE.

;CLEAR REG.A TO ZERO

;STORE "FF"

J*

WARNING!

; . WARNINGI

IN£XT AREA PLEASE.

J* WARNING!

J5ET WITH ADDRESS VALUES

;* ••••

THIS dYTE

OR

INSTRUCTION CAN NOT BE FF HEX.

END

3.3

(cont i nued)

(3) If individual JK blocks need to be initialized to FF Hex, then the routine on the previous page~wil1 help.

The lower part of the program labeled /lTable^{l l} is where the starting

& ending addresses of each block is stored. The format is:

Table: Starting Address 1 ; Two Bytes (low ha 1 f fi rs t)

3.4 Wa~t· State Selection

Ending Address 1 ; Starting Address 2-

,

Ending Address 2-

,

Starting Address Last Ending Address Last NOP

NOP NOP NOP

Two Bytes Two Bytes Two Bytes

Four zero Bytes

Indicate end of table.

The MB-8A can be set for zero to eight wait states.

Prom Access Time* Dip Switch Settings Wait DIP Switch (n sec) WE WflJ WI W2 Cycles Notation

Less than 550 ¹ 0 0 0 0 0=swi tch clQsed

1050 0 1 1 I 1 l=switch open

1550 0 ^flj 1 1 2

2050 0 1 0 1 3

2550 0 9J 9J 1 4

3050 0 ¹ 1

"

⁵

3550 0 ^flj I 0 6

4050

"

^{1 0 0 7}

Less: than 4550

" " "

^{0 8}

,'t--'Prime 2708¹⁵ normC'')1y do not require wait cycles.

3.5 Jump Address Selection

The MB-8A is equipped with a Power-On Clear or Reset Vector Jump CircLJit~

To activate this function, switch S2-JE must be switched to the closed (on) position. The Jump Select Connection has already b~en connected for Power-On Jump, but this small PC Jumper can be cut to allow for a Jumper Wire Selecting the Reset option.

7

.;;..-

The Jump circuit generates four Bytes onto the bus which are:

F3---Disable Interrupts

C3---Jump Instruction, 1st Byte 00---lnw Address, 2nd Byte YY---High Address, 3rd Byte

T-he last Byte (YY) can be set by switch 51 which controls the high add.,.

ress (A8 thru A15). A sw·itch position set to 9pen (off) is a logic0 state and set to closed (on) as a logic 1. 51 can be set for any address from 0000H to FF00H in 256 Byte increments.

Jump Address Setting of S 1

______ A_15 A14 A13 Al2 All A10 A9 A8 0000 Hex All Open (off)

0100 Hex All Open, Except A8=closed 0200 Hex All Open, Except A9=closed

FF00 Hex All Closed (On)

4.0 Trouble Shooting Hints

~. Check for proper settings of DIP switches.

b. Verify that all ICs are in the correct sockets.

c. Visually ins.pect allies to be sure that leads are in the sockets and not ben t unde r .

d. Verify that the output voltage of each regulator is correct.

e. Inspect back side of board for solder bridges, running a small sharp knife blad~ between traces that appear suspicious. A magnifying glass is a must for this.

f. If you have an addressing problem:

1) Check U35 (7465136) for addresses A14 & A15.

2) Check u28 (74367) for address A13.

3) Check U30 & U34 (74L138) for addresses A10 thru Al2.

4)

Check U27 & u28 (7465367) for addresses A0 thru A9.

g. If you\have a problem with data output (consistent mis$ing bits)~

I) Check outputs of buffers U32 & U33 (74L5367) for shorts as well as proper operation.

2) Check signals on U23 (74L$~~).

~. If you have a wait cycle problem:

1) Check signals on U23 (74L$197) 2) Check signals on U31 (74L$04)

3)

Check signals on U36 (75453) i. If you have a vector jump problem:

I) Check u26, U2 & U14 if the jump code is wrong.

2) Check U26 & U29 if no code sequence is sent out. Also check switch Sl-JE for proper operation.

j. If the "Magic Maping" feature doesn't work, then check Ol,Jt Ul1 & U29 for proper operation.

5.0 Theory of 0eeration 5. I Us'eage

Jl

Ul1 (8-lnput Nand,. 74LS30) is a detector for /IFF" Hex Bytes.

2) U23 (Presettab1e Binary Counter, 74197) is used to count Phase

2

cycles to give a number of different Wait State cycles dep~nding

on the settings of S2.

3) U26 (Hex D Flip-Flops, 74LS174) is used as a shift register to sequence the Jump code on to' the bus for Power-On Jump~

4) U27, u28 (Hex Tri-State Buffers, 74LS367) are to buffer (isolate) the lower address lines (A0 thru A9, A13) onto the card.

5) U29 (Quad 2-lnput Nand, 74LS0~) is used as control lOgic for add- ress enable, PDBIN strobe and PRDY functions on the card.

6)

U30~ U34 (3 to 8 Decoder, 74LS138) are used for decoding the add~·

ress for driving the appropriate chip select pin of the bank of 2708's.

7) U3 ^J (Hex Inverter, 74LS~4) is used to buffer signa IIi nes onto the card (Psync, Phase 2, A10, All & AI2).

8) U32, U33 (Hex Tri-State Buffers, 74LS367) are used for buffering the eight output data 1 ines. These buffers are turn-on by PDBIN.

9

9) U35 (Quad Exclusive-Or ~Jatc5 with open collectors, 74LS136) is used to compare the Dip Switch address selected with A14 & A1S.

This Ie is also used as a phantom line driver and a enable gate for SMEMR status to the card.

10) U36 (Dua 1 2- I nput or ~'Ii th open coIl ecto~s, 75453) is used to drive the PRDY and PS bus 1 ines.

11) Ul, U13 (340T-12) positive 12 volt regulators for the PROMS 12) U12, u24 (320T-5) negative 5 volt regulators for the PROM~.

13) U25 (340T-5) positive 5 volt regulator for logic power.

5.2

Operation

The MB-8 card uses U30 & U34 for chip selection of the 2708^15. U30 &

U34 decode the address bits Al0, All, A12 & Al3 for address steps in IK increments. U30 & U34 are only disabled during the Vector Jump operation of the card. U35 is used to decode the address selection from S2 against Al5 & A14 for a SMEMR state. If the address is valid, then a enable sig- nal (logic 1) is sent to U29, pin 12, for a possible output data enable signal. U29 receives a address enable signal and a signal from U11 which is a "FF" code detector. The "FF" detector wi 11 output a lo~ic zero to U29, pin 13 if all ones are detected. U29 will provide an enable signal

(U29,'~ih 3=0) for output data to U32 & U33, if th~ address is valid (U29, pin 13=1), and PDBIN signal is valid (U29, pin 2=1).

The Wait State circuit us~s a counter U23 to count out the number of wait cycles. PSYNC drives the load enable of U23, pin 1 through a inverter . U31. PSYNC loads U23 with a binary number from 52 which activates the

PRDY signal to U36 pin 7. (logic.0) Phase 2 pulses the clock of U23

which,c04nts up from the binary number until U23, pin 5 goes high to turn- on the PRDY signal.

The Veciqr J~mp circuit is activated by a logic zero on pin 1 (clear) of u26. The logic zero signal can be PRESET or poe depending on the user selected Jumper wire. Switch 52, position JE, must be closed for the Vector Jump to operate.

u26 .is connected up as a shift register to sequence (five cycles) out the Jump instruction onto the Computer's Bus. u26 controls the Input Select, chip enable and some on the Input lines of the 74LS2S8 ICls (U2, U14).

u26 is clocked through its sequence by a pulse form U29, pin 3 (PDBIN).

U~, ur4 receive logic patterns on the A-select Inputs (pins' 2, 5, 11, 4) for the Hex codes

F3,

C3, & 00 from u26. These Hex codes give the comput- er a Disable Interrupt and 2/3 of a Jump Command. The Final Byte (high address) of the Vector Jump is received from Switch 51 (8 bits) to the B-Select Inputs of U2 & u14. After the four machine instruction Bytes,

5.2 (continued)

a fifth cycle is sequenced which turns off U2 & U14.

During the whole Vector Jump operation U3~ & U34 are disable so that all the PROM's outputs are disable, and U2 & u14 a~e enable so their Tri- State Outputs are turned-on.

6.0 Warranty

Parts guaranteed to original purchaser for 90 days, unless fai lure is due to misuse or failure of purchaser to excercise caution in addembly and operation. Registration card must be returned at time of purchase to

valid~te warranty.

Assembled boards may be returned for service. A service charge wi.ll be made ·unless, in our judgement, the problem is due to a defective board . or parts .

. , .

JJ

/J.

(·:l08 )

Place two plastic insulators sideways, as shown vnderneath the reg~lator

c:::c:ID:::> 01

~

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r U3 CICJ--. L ²⁷⁰⁶

U2 co

I() N 11)

~

^({)

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()

^UC~

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~

r

^UI5

U4 2708

n---'~l 2708

r

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JUMP SELECT o RSTa ot:-OC

(u36l

U75453

I

U5 U6 U1 U8 U9 UIO

2708 2708 2706 2708 2708 2708

. I ^I ~

14

>~"'"<>~,-, - - - "

115

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¹¹

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⁶

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I I

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2,08

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^U30 U31

R~3

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^U33 r-

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MB8A Parts List

Chip Pack 2 - U2,14 1 - Ull 1 - U23 1 - U26 1 - U29 2 - U30,34 1 - U31 1 - U36

4 - U27,28,32,33 1 - U35

Capacitor Pack 3 - C3,8,11 4 - C5,6,9,10 4 - C1,2,4,7 Resistor Pack 5 - Dl-5

6 - Rl-6 1 - R7

Hardware Pack

2 -

U1,13 2 - U12,24 1 - U25 5

4 5

Socket Pack 1

5 1 2 Misc.

15 9 1 1

74L$258 74L$30

74L$197/8291 74L$174

74L$OO 74L$138 74L$04

75453

74367/8097 74L$136

10uf,20v O.luf disc

4.7uf 20v drop tant

1N4001 to lN4006 2.7K x 7 SIP pack 10K

!W 5%

7812/340T-12 7905j320T-5 7805/340T-5 Heatsinks

Insulators

Sets #6 hardware

24 pin socket 14 pin sockets 8 pin socket

8 position DIP switch

24 pin sockets 16 pin sockets PC board

Warranty card

Revised 1/3/80

12-1-78 MS8A ADDENDUM

Magic Happing vs. Wait States

The magic mapping functi9n will disable the outputting of data and wait states from the MS8A, if there is no ROM in the socket or the ROM's code is FF (He~).

Anot~er way a ROM can generate an FF code is to be slow in responding to a chip select on pin 20. A slow ROM can disable its OW;-wait state signal back to the computer.

In most computer systems today, the ROM's speed is better than 550 nanoseconds for chip select and the main system clock is 2mhz, so no read problems occu·r.

I f the ROM is very slow or the compute r is runn i ng at 4mhz, then do the fo'l- lowing; .

1. Wait States wanted, but no Magic Mapping!

a. Remove Ull from the board to defeat Magic Mapping.

b. The Ms8A is now a full 16K ROM with/or witho~t the ROMs in their sockets.

2. Wait States wanted and MaSic Mapping!

a. Cut the trace going to U29, pin 9.

C Vi ( B f\(J(S'oe (JF BOAfU»)

B. Jumper U29, pin 9 to U29, pin 10.

52 2

00

«

^to

« «

^(\j

~

I U28 2 U28 4 U28 6 U28 4 U27 2 U2714 U2712 U2710 U27 6 U27

41 B~I~31 ~21 g~9c ~0, ~Ic

^{r i c}

~0.

⁷⁹

I I I I I I 15 15 I I

9 3 5 7 5 3 13 II 9 7

,;.,

340T-5

~----~----~----~----~----~----~~----~---~---~+~5~V---~~~--~--~--~0-5~30UTU251N ^{I I}

~ R21<> ~ ~> ^{R51,,> I.. I,,>} I~ ~

C5 .k6 .k9

^js:10 ~ ^GNO ~J=II ⁵¹ +8V

R2~7 >5 R2:~3 R2:~2 '>8 R5:~6 R5:~4 R5 =2 .. ~

T T T'"

^{2 .... r.:;;:J}

+5V 8x 74~S367 ~ GND

,.,7

t - -_ _ _ _ _ ...-_--+--.:.;0" 9 5 D 10

I 340~12 3 ~~2~0~~~2~0~~~2~0~~~2~0~~~2~0~~~2~0~~~2~0~~~20~ ~~AI I~U33

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