\::I r::J CO~OR<\TION

(1)

I

I J

\--_/

,~

604.28500

f';:/j c:\

CONT~OL

DATA

\::I r::J CO~OR<\TION

I ',,---,,' ,~, - - - - ....-"...,

( \

( I '-_ ^....'

I~

( )

"'--'

,,"--'"

l~

(---., ... )

Cl

(---\:'

'"--"

CONTROL DATA®

FA722-A/8/C

DISK STORAGE CONTROLLER

DT220-C

SECOND CHANNEL FEATURE

DT716-A

DOUBLE DENSITY OPTION

GENERAL DESCRIPTION OPERATION

THEORY OF OPERATION

(,,---

"~

Volume 1 of 3

( I ' ...

HARDWARE MAINTENANCE MANUAL

(~. )

(2)

REVISION A (11-30-74)

B (2-5-75)

C (2-5-75)

D (2-5-75)

E (4-4-75)

F (4-4-75)

G (4-4-75)

H (4-30-75)

J (4-30-75)

K (7-11-75) Publication No.

60428500

REVISION RECORD

DESCRIPTION

Manual released. Includes engineering change orders listed on correlation sheet.

Manual revised; includes Engineering Change Orders 35876 (B), 35758, and 35759. Pages 1-1, 6-279, 7-7,7-11, and 7-12 are revised by ECO 35876. Pages viii (Volwne 2), 4-4, 4-5, 4-8, 4-9, 6-263, 6-265, 6-267, 6-269, 6-271, 6-273, 6-275, A-431, A-43~, and A-433 are revised by ECO 35758. Pages 6-13, 6-15, 6-17, 6-19, 6-21,6-23, 6-25, 6-27, A-421, A-422, A-423, A-424, A-425, A-426, and A-427 are revised by ECO 35759. Page 4-6 is deleted.

Manual revised; includes EngineerinK Change Order 35960. Page 6-261 is revised.

Manual revised; includes Engineering Change Order 35954. Pages 6-147, A-394, A-395, A-396, A-397, A-398, A-399, A-400, A-401, A-402, A-403, A-404, A-405, A-406, A-408, A-409, A-410, A-411, A-412, A-413, A-414, A-415, A-416, A-417, A-418 and A-419 are revised.

Manual revised; includes Engineering Change Order 35681. Pages 6-1, 6-35, 6-67, 6-69, 6-75, 6-79, A-106, A-108, A-310, A-364, A-369 and A-406 are revised. An editorial correction is made to page 4-9.

Manual revised; includes Engineering Change Order 36039. Pages vii, viii, 6-9, 6-11, 6-29, 6-31, A-6, A-7, A-8, A-9, A-ll, A-12, A-14, A-15, A-16, A-32, A-33, A-34, A-137, A-138, A-139, A-140, A-141, A-143, A-147, A-148, A-150, A-151, A-152, A-153, A-154, A-158, A-159, A-160, A-162, A-163,A-165, A-184, A-194, A-195, A-196, A-197 and A-380 are revised. Miscellaneous changes made to pages 6-13, 6-15, 6-17, 6-19, 6-21, 6-23, 6-25, 6-27, 6-61, 6-239, 6 -241, 6-243, 6-245, 6 -247, 6 -249, 6 -251, A -29 and A-187. Pages 5-43 through 5-51 are added.

Engineering Change Order 36080. This information is included in Revision D.

Manual revised; includes Engineering Change Order 36247 (publications chan!te only).

Title Pa{!'e (Vol 1) Revision Record, Correlation Sheet, vii (Vol. 1) , 1-1, 3-2 through 3-7, 3-9 through 3-12, 3-229, 3-250, 3-287, 3-289, 3-292, 3-294, 3-300, Comment Sheet (Vol. 1), Title

Page (Vol. 2), RevisionRecord, Correlation Sheet, viii (Vol. 2), 4-11, 6-5, 6-147, 6-171, 6-205, 6-210, 6-211, 6-212, 6-213, 6-217, 6-252 through 6-257,6-259, 6-261,6-277, Comment Sheet (Voi. 2), Front Cover (Vol. 3), Title Page (Vol. 3), Revision Record, Correlation Sheet, vii (Vol. 3), A -3, Comment Sheet (Vol. 3), are the pages changed. New Pages added are 6-211.1, 6-213.1, 6-257.0, 6-257.1, DT716-A Yellow Divider, A-437 through A-446. Appendix B Divider deleted •..

Manual revised; includes Engineering Change Order 36235. Pages 4-9, 6-1, 6-7, 6-9, 6-11, 6-15, 6-23, 6-29, 6- 31, 6-33, 6-37, 6-39. 6-61 of (Volume 2). A-5. A-6, A-9, A-12. A-15. A-16. A-18.

A-37. A-136. A-137, A-147. A-153, A-156, A-162. A-164. A-165 A-179 A-187 and A-204 of (Volwne 3) are revised. Engineerin!t Chan!te Order 35791 is included in thiR "'0";";"'"

Manual revised' includes Field Chan!te Order 36293. Pa!tes 6-1 6-9 6-31 6-61 and A-29 are revised. Miscellaneous changes are made to Cover, Title Page. v in Volwnes 1. 2, and 3, 1-1,

Address comments concerning this manual to:

Control Data Corporation

Publications and Graphics Division 4201 North Lexington Avenue Arden Hills. Minnesota 55112 by Control Data Corporation

or use Comment Sheet in the back of this manual.

Printed in the United States of America

/

(

./

/

(3)

1,--,)

()

... ^/

REVISION RECORD (CONT/D)

REVISION DESCRIPTION

K 7 - 1, and 7 - 2 •

o

^(Cont'd)^L Manual revised; includes Field Change Order 36377 and Engineering Change Order 36079. Field (7 -23-75) Change Order 36377. Pages 6-213, 6-219, A-88, A-354, and A-361 are revised. Engineering

Change Order 36079. Pages A-440, A-441, A-442, A-443, and A-446 are revised. Miscellaneous changes are made to vii, 6-7, 6-13, 6-15, 6-17, 6-19, 6-21, 6-23, 6-25, 6-27, 6-33, 6-37, 6-87, and 6-279. Pass On-Pass Back Wiring (Divider) and A-447 through A-454 are added.

M Manual revised; includes Field Change Order 36470. Pages 6-1 and 6-61 are revised. Editorial (9-26-75) correction is made to page 6-63.

(

_,,--,,

')

'-. .. /

c)

C)

(j

'-..-.

Publication No.

60428500

(4)

, /

l

(

"

(5)

i __ )

1''''---)-

\ - - -

C)

(~)

MANUAL TO EQUIPMENT LEVEL CORRELATION SHEET

SHEET_l_OF

...L . EQUIPMENT

MANUAL REV FCO OR ECO FA722 FA722 DT220 DT7l6 FA722

A Released AOl BOl COl AOl AOl

-

EC035758 AOl BOl COl AOl

-

ÊC035759 ÂOl ^BOl ^COl ÂOl

B EC035876 AOl BOl COl AOl

C EC035960 AOl BOl COl AOl

D EC035954 AOl BOl COl AOl

E EC03568l AOl BOl COl AOl

F EC036039 AOl BOl COl AOl

G EC036080 AOl BOl COl AOl

H EC036247 AOl BOl COl AOl

J EC036235 A02 B02 CO2 AOl CO2

EC03579l A02 B02 CO2 AOl CO2

K FC036293 A03 B03 C03 AOl C03

L EC036079 A03 B03 C03 AOl C03

FC036377 A04 B04 C04 AOl C04

M FC036470 A05 B05 C04 AOl C04

60428500

(6)

(

/

I

,/

(

/

(

(7)

I '-...-/

,-

^...^,

u

o

PREFACE

This manual provides level 2' hardware maintenance information for the CONTROL DATA

~ FA722-A/B/C Disk Storage Controller and some of its related options. The F.A722-A/B

I

serves as the primary control element in CDC® 7054/844 Disk Storage Subsystems. Level

U

2 maintenance includes the following activities.

G

(J

/

~I

c c

LI

• I

~/.

Preventive maintenance

Replacement of defective logic cards, power modules, and indicator lights

Adjustments

Cable and backpanel repair

The manual is divided into three volumes. Volume 1 contains equipment descriptions and operational theory. Volume 2 contains installation procedures, maintenance information, and diagrams. Volume 3 contains parts data, wire lists, and option information.

The following equipment manuals. provide maintenance and reference information for equipment used in disk storage subsystems. The product manuals provide information pertaining to subsystem interaction with computer systems. Refer to the Literature Distribution Services catalog for the latest revisions of all manuals.

EQUIPMENT MANUALS Control Data Publication

FA 710/FA 719/FA 720/FA 722 Disk Storage Controller

DCI44~A /B, DTI98-A, DC401-A Mass Storage Extender

BR3 OX Disk Storage Unit BR30X Disk Storage Unit BR30X Disk Storage Unit 84X/975X l?isk Storage Unit TF201 Maintenance Console BB3 72 -A Core Storage Module I FV444-A Power Regulator Module TTL Key to Logic Symbols

60428500 K

Manual Type

Hardware Reference Customer Engineering Maintenance

Diagrams and Wire Lists Parts List

Maintenance Aids Customer Engineering Customer Engineering Customer Engineering

Publication No.

60364500 60392600 70618400 70618500 70618600 70619100 58032700 60346500 60406000

v

(8)

PRODUCT MANUALS

Control Data Publication Manual Type Publication No.

Disk Storage Subsystem General Information 60364400

Disk Storage Subsystem Operation and Programm ing 60363900 Section 2 Stations /Subsystems Site Preparation 60277500 SCOPE 3.4 Operating System Installation Handbook 60307400 KRONOS 2. 1 Operating System Installation Handbook 60407500 Network Operating System Install ation Handbook 60435700 (NOS) 1. O. 0

System Maintenance Monitor Reference 60160600

(SMM)

Buffer Controller Diagnostics Reference 60400300

Buffer Controller Assembly Reference 60372000

Language (BUCAL)

vi 60428500

A

(9)

o o o

o o

o

()

o o

]

o

(J

o

(J

o o o

(j

CONTENTS

VOLUME 1 1. GENERAL DESCRIPTION Introduction

Expansion Options Double Density Option Controlware

Functional Description Coupler

Subsystem Processor Control Logic

Core Memory Physical Description

Dimensions

Environmental Requirements Power Requirements

2. OPERA TION Introduction

Auxiliary Operator Panel Controls 1-1 1-1 1-1 1-1 1-2 1-2 1-3 1-3 1-4 1-4 1-6 1-7 1-7

2-1

and Indicators 2-1

Power' Controls and Indicators 2-2 . Power-up/ Power-down Procedure 2-3

Power-down Power-up

Disk Storage Unit Controls Disk Pack Exchange Procedure 3. THEORY OF OPERA TION Introduction

Interfaces

2-3 2-4 2-5 2-5

3-1 3-1

PPU Interface 3-1

Pass On/ Pass Back Interfaces 3-3 Control Logic/ Disk Storage

Unit Interface 3-4

60428500 H

Maintenance Console Interface 3-13 Block Transfer Interface 3-13 Coupler / Normal Channel Inter-

face 3-15

Control Logic/Subsystem Pro-

cessor Interface 3-16

Coupler / Control Logic Inter-

face 3-19

Coupler Theory 3-22

Component Theory Operational Sequences

Subsystem Processor/Core Memory 3-22 3-33

Theory 3-53

Component Theory

Subsystem Processor Instruc- tion Sequences

Control Logic Theory Component Theory Operational Sequences

VOLUME 2

3-54 3-62 3-160 3-160 3-185

4. INSTALLATION AND CHECKOUT 5. MAINTENANCE

6. DIAGRAMS

VOLUME 3 7. PARTS DATA

APPENDIX A. WIRE LISTS

vii

I

(10)

FIGURES

1-1 1-2 2-1 2-2

Controller Block Diagram 1-2 Controller Component Locations 1-5 Auxiliary Operator Panel 2-1 Power Controls and Indicators 2-3 2-3 DSU Controls and Indicators

3-1 Interface Diagram 3 - 2 Coupler Block Diagram 3-3 Pulsed to TTL Converter 3 -4 Waveforms for Pulsed to TTL

Converter

3-5 TTL to Pulsed Converter 3-6 Waveforms for TTL to Pulsed

Converter

3-7 Assembly/Disassembly Com- ponents

3-8 Data Multiplexer Components 3-9 Connect Logic

3-10 Autoload Initiation Logic 3-11 PPU/Coupler Activity During

Autoload or PPU Write Opera- tions

3-12 Subsystem Processor/Coupler Activity During Autoload 3 -13 Func tion Logic

3-14 Subsystem Processor Gene'I'ated 2-7 3-2 3-23 3-24 3-24 3-25 3-26 3-28 3-32 3-34 3-37

3-38 3-39 3-42

Status Reply 3-44

3-15 Coupler Generated Status Re-

ply 3-46

3-16 Coupler to Control Logic Trans-

fers 3-48

3-17 Control Logic to Coupler Trans-

fers 3-50

3-18 Coupler to PPU Transfers 3-19 Subsystem Processor/Core

Memory Data Flow

3-20 Memory Interface Timing 3-21 Key to Instruction Sequence

Symbols

3-22 Subsystem Processor Internal Cycles

3-23 Common RNI Activity

viii

3-51 3-55 3-60 3-62 3-65 3-66

3-24 Common RAD Activity 3-25 Common ROP Activity 3-26 Common STO Activity 3-27 Selective Stop (OOXX)

3-67 3-68 3-69 3-71 3-28 Selective Set Bit t of A (010X) 3-72 3-29 Selective Clear Bit t of A

(020X) 3-74

3-30 Selective Complement Bit t

of A (030X) 3-75

3-31 Count of Leading Zeros in

Ai to Af (04XX) 3 -76 3-32 Shift (A) Right, t Places

(05XX) 3-78

3-33 Transfer (A) + s, t to B1

(06XX) 3-79

3-34 Transfer (A) + s, t to B2

(07XX) 3-80

3-35 Set Condition Equal: Internal

Tests (08XX) 3-81

3-36 Set Condition Equal to Bit t

of Channel s (09XX) 3-83 3-37 Selective Set Bit t of Channel

o

(040X) or Set Bit t and Clear All Other Bits of Channel s

(s

f.

0) (OAsX) 3-84 3-38 Selective Clear Bit t of

Channel 0 (OBOX) 3-85 3-39 Input to A from Channel s

(OCXO) 3-87

3-40 Set Channel 0 from A (ODXO) 3-88 3-41 Clear Channel 0 from A (OEOX)3-89 3-42 Transfer (A) to Channel s

(OFXX) 3-91

3-43 Add - No Address (lOXX) 3-92 3-44 Subtract - No Address (llXX) 3-94 3-45 Exclusive OR - No Address

(12XX) 3-95

3-46 Logical Product - No Address

(13XX) 3-97

3-47 Test Index B1 - No Address

(14XX) 3-98

3-48 Test Index B2 - No Address

(15XX) 3-100

60428500 A

('

C"

(

\,

/

\

(-

(

(11)

() ()

0

3-49 Load A Complement - No Ad- 3-81 Unconditional Jump (B8XX -

dress (16XX) 3-101 BFXX) 3-147

3':'50 Load from (A) (1 7XX) 3-103 3-82 A Zero Jump (COXX - C7XX) 3-148

0

3-51 Direct (XO or X8) 3-106 3-83 A Nonzero Jump (C8XX -

3-52 Direct/Index B1 (Xl or X9) 3-107 CFXX) 3-149

3-53 Direct/Index B2 (X2 + XA) 3-108 3-84 A Positive Jump (DOXX -

0

3-54 Relative Forward (X3 or XB) 3-109 3-85 A Negative Jump (D8XX -^D7XX) ^3-151

3-55 Indirect (X4 or XC) 3-111 DFXX) 3-152

0

3-56 Indirect/Index B1 (X5 or XD) 3-112 3-86 Condition True Jump (EOXX -

3-57 Indirect/Index B2 (X6 or XE) 3-114 E7XX) 3-154

3-58 Relative Backward (X7 or XF) 3-115 3-87 Condition False Jump (E8XX -

0

3-59 Enter A with Address (18XX - ^EFXX) ^3-155

Control Logic Block Diagram -

1 FXX) 3-116 3-88

Basic Data Path 3-161

0

3-60 Enter B1 with Address (20XX -27XX) 3-117 3-89 Simplified Logic Diagram -

Memory Scanner 3-162

3-61 Enter B2 with Address (28XX -

3-90 Memory Scanner Access

0

^{2 FXX)} ^3-119 Timing Diagram 3-163

3-62 Test Index B1 (30XX·- 37XX) 3-120

3-91 Address Multiplexer Block

[,

3-63 Test Index B2 (38XX - 3FXX) 3-121 Diagram 3-167

3-64 Load A (40XX - 47XX) 3-123 3-92 Clock Generation 3-174 3-65 Load A Complement (48XX - 3-93 Data Coding - Modified Fre-

4 FXX) 3-124 quency Modulation 3-175

3-66 Load Leftmost Byte (50XX - 3-94 Open Cable Detector Current

57XX) 3-125 Supply Block Diagram 3-180

0

3-67 Load Rightmost Byte (58XX - 3-95 Data Resynchronization Timing

5 FXX) 3-127 Diagram 3-182

0

3-68 Add (60XX - 67XX) 3-129 3-96 Data Path Switching Block

3-69 Subtract (68XX - 6FXX) 3-130 Diagram 3-184

3-70 Exclusive OR (70XX - 77XX) 3-131 3-97 Load Director Buffer - 0018 3:..188

0

3-71 Logical Product (78XX - 7FXX) 3-133 3-98 Function Master Clear - 0020 3-189 3-72 Replace Add (80XX - 87XX) 3-134 3-99 Start Director Execution -

0022 3-190

0

3-73 Replace Add One (88XX - 8FXX) 3-136

3-100 Stop Execution - 0024 3-191 3-74 Replace Leftmost Byte (90XX -

3-101 Clear Parity Error - 0025 3-192

97XX) 3-137

0

3-75 Byte Flow for Replace Left- 3-102 Enter Clock Step Mode - 0028 3-193 most Byte 3-138 3-103 Exit Clock Step Mode - 0029 3-194

0

3-76 Replace Rightmost Byte (98XX - 3-104 Step Clock - 002A 3-195

9FXX) 3-140

3-105 Stop Loading Directors - 0038 3-196 3-77 Byte Flow for Replace Right-

3-106 Status Selection Flowchart 3-198

0

most Byte 3-141

3-78 Store (AOXX - A 7XX) 3-143 3-107 Clear Internal Status Flow-

chart 3-199

3-79 Store Zeros (A8XX - AFXX) 3-144

3-108 Test Data Flowchart 3-200

0,

3-80 Destructive Load (BOXX -

3-109 Director Buffer Write Timing 3-203

B7XX) 3-145

0

60428500 A ix

(J

(12)

3-110 Director Buffer Read Timing 3-211 3-119 3-111 Address Director Execution 3-218

3-112 Data Transfer - Data Buffer 3-120

to Memory 3-220

3-113 Data Transfer - Data Buffer 3-121

to Coupler 3-221

3-114 Data Transfer - Coupler to 3-122

Data Buffer 3-222

3-115 Data Transfer - Memory to 3-123

Data Buffer 3-225

3-116 Conditional Branch Director 3-124

Execution 3-231

3-117 Enable Disk Function Director 3-125

Execution 3-251

3-118 Read to Register File Director 3-126

Execution 3-261

3-127

TABLES 2-1 Auxiliary Operator Panel Con-

2-2 2-3

x

trols and Indicators 2-2 Power Controls and Indicators 2-4 Disk Storage Unit Controls

and Indicators 2-5

3-1 3-2 3-3 3-4

( (

Read to Data Buffer Director

Execution 3-264 ^(~'

Read Checkword Director

Execution 3-272

Read Address Pattern

Sequence 3-277

Write from Data Buffer

Director Execution 3-286

(

Write from Register File

Director Execution 3-290

Write Checkword Director

(

Execution 3-295

Write Address Pattern

Sequence 3-301

Complete Read Sequence

Timing 3-314

Complete Write Sequence

Timing 3-315

Status Select Line Functions 3-4 Tag Line Functions 3-5 AI D Control Signals 3-31 Director Function Codes 3-186

(

\

(

('

60428500 A

(

(13)

f''''---'·''·

I \~

,r-',

( ;

'-.../

,~

I )

\"-.-/

r--\

( ',I '-...'

,,---"

{

"---"

c

C"

e,

LI

L ,,---,,' '

SECTION 1

GENERAL DESCRIPTION

(14)

/

(15)

" ... ^" "

'"

\'--'./'

,~'

( I

'--.,.-/

G

( J

~

( ^"

,--",'

GENERAL DESCRIPTION

INTRODUCTION

The FA 722 -A /B/C Disk Storage Controller (controller) interfaces up to eight CDC@' BR302/BR303/BR308 Disk Storage Units with one peripheral processor unit (PPU) data channel from on~ of the following computer systems.

CDC 6000 Series

CDC@ CYBER 70 Models 72, 73, 74 CDC@CYBER 170 Models 172, 173, 175

I

The FA 722-A requires 60-Hertz (Hz) power, and the FA722-B may use either 50- or 60-Hz

power. The FA722-C is functionally identical to the FA722-B. The difference between the

I

Band C is in cabinet color, FA722-B is gold and the FA722-C is blue-gray.

EXPANSION OPTIONS

Options are available to increase the number of PPU data channels or disk storage units serviced by the controller. The DT220-C Second Channel Feature adds a second PPU data channel access to the controller. DC144-A/B, DT198-A, and DC401-A Mass Storage Extenders permit up to 64 standard density disk storage units to be attached logically to a controller. Double density disk storage units must connect directly to the controller. The second channel feature is described in this manual.

Refer to the preface for publication numbers of mass storage extender manuals.

DOUBLE DENSITY OPTION

lJT7/bA

The.:1ltLlf]j8ij; Double Density Option must be installed in the controller to permit operation with double density BR308 Disk Storage Units. The double density option requires wiring changes, the replacement of two control logic modules, and the addition of one control logic module.

CONTROLWARE

Many of the operating characteristics of the controller are determined by software which executes in the subsystem processor and control logic portions of the controller.

This software is called controlware. The equipment configuratt>r for controlware

60428500 K 1-1

(16)

designed to execute in the controller is MA 710. Refer to the disk controller hardware reference manual listed in the preface for controlware reference information •.

FUNCTIONAL DESCRIPTION

Figure 1-1 illustrates the relationship of major controller components.

COUPLER

The coupler performs assembly / disassembly of 12-bit PPU words and provides an interface between the PPU and either the subsystem processor or the control logic.

PPU DATA CHANNEL A PASS ON

I

PASS ·BACK

PPU DATA CHANNEL B

PASS

ONI

PASS BACK

-

A

-

8

,J.... r~V'F-L

.-

~

...

DISK STORAGE

-

COUPLER

~

- ^{DT 220-C}

SECOND CHANNEL

- FEATURE

MAINTENANCE CONSOLE

CONTROLLER , (J- "

SUBSYSTEM

- _PROCESSOR

,

.. I _---_...

/ ~.

CORE MEMORY

I

- -

^...

CONTROL LOGIC

Figure 1-1. Controller Block Diagram

DISK STORAGE

UNITS AND

lOR

MASS STORAGE EXTENDERS

1-2 60428500

A

r

(17)

o o o

o o

o

SUBSYSTEM PROCESSOR

The subsystem processor is a general purpose processor that uses a 16-bit instruction set and serves as the major control element of the controller. The subsystem processor communicates with a PPU via the coupler and controls the activities of the control logic. It receives function codes from the PPU and then selects a list of directors (control logic instructions) for execution by the control logic. The subsystem processor also passes status information from the control logic to the PPU.

Although the subsystem processor controls data transfer operations, data passes directly between the control logic and the PPU via the coupler.

The subsystem processor has a control section, an arithmetic section, and various

o

interfaces.

o

o o

o

• The control section processes instructions and controls sequences.

• The arithmetic section performs two's complement arithmetic operations by means of an adder, two index registers, a shift network, and an accumulator register.

• A block transfer interface accommodates block transfers (such as auto- ,

load information) between the PPU and core memory.

• A normal channel interface provides communication with the PPU via the coupler and with the control logic. Control and status signals are ex- changed on the normal channel interface.

• A storage interface links the subsystem processor to core memory through the memory scanner of the control logic.

•

A maintenance interface provides for attachment of a portable maintenance console.

CONTROL LOGIC

The control logic is a special purpose processor that controls disk storage unit physical activity, transfers data to and from disk storage units, and performs error detection and correction( The control logic performs these functions by executing directors (control logic instructions) stored in core memory. The instructions are caned directors to distinguish them from subsystem processor instructions. Directors vary in length from 16 to 64 bits.

60428500 A

(18)

When the subsystem processor has accepted a valid function code from the PPU, it

selects a director sequence and informs the control logic. The control logic accesses

C

core memory and begins loading the director sequence into its director buffer. The subsystem processor initiates execution of the director sequence which controls disk storage unit operation and data handling and processing. All data is passed directly between the control logic and the PPU (via the coupler) without being processed by the subsystem processor.

A memory scanner, which is part of the control logic, controls a1.1 accesses to the core memory and assigns priorities based on real-time constraints. The order of priority is:

1. Data handling references 2. Director buffer references 3. Subsystem processor references

Although the subsystem processor is assigned the lowest priority, it is normally not tied to real-time constraints and therefore has a larger proportion of access time available to it.

CORE MEMORY

The core memory contains 4096 l6-bit words and is shared by the subsystem processor and the control logic. The subsystem processor uses the memory to control overall operation of the controller. The control logic references memory to obtain director sequences which control disk storage unit and data handling operations.

To avoid memory conflicts, all memory references are routed through the memory scanner in the control logic so that the highest priority references are handled first.

Although the core memory has a potential cycle time of 750 nanoseconds, the effective cycle time depends upon the operations being performed by the subsystem processor and the control logic.

PHYSICAL DESCRIPTION

Figure 1-2 illustrates and identifies major controller components.

The logic consists of TTL integrated circuits encapsulated in l4-pin or l6-pin dual in-line packages (chips) which are mounted on printed circuit modules. A module con-

1-4 60428500 A

( (

(

\

(

\

(

c

( ( (

(

(19)

o o

()

o

o o o o o

o o o o o o o

o o o

CoUPLERAI----______________ ~~

SUBSYSTEM PROCESSOR / CORE MEMORY A2

CONTROL LOGIC All

+SV,IOOA SUPPLY A5

POWER DISTRIBUTI BOX A7

NOTE:

I. CABI NET PANELS REMOVED TO SHOW DETAIL

METER ASSEMBLY A5AI

- 5V, 25A SUPPLY A6A3

~.,..-,,,,..;:;..---+30V,15A SUPPLY A6A2

3AQIBA

CONVENIENCE OUTLET

Figure 1-2. Controller Component Locations

60428500 A 1-5

(20)

tains up to 25 chips. These modules are called TTL 25- paks and plug into the logic chassis.

A logic chassis consists of two or three printed circuit boards mounted in a metal frame. Each board has several rows of pins which pass through the board and pro- trude from the front and back. Modules are inserted by sliding them over metal

guides in the frame until they plug into the pins protruding from the front of the board.

Backpanel pins are interconnected by a wirewrap method.

Doors and removable panels on the cabinet provide access to site maintainabl e components. Coupler logic occupies the top two rows of the cabinet and consists of 35 modules (including the second channel feature). The next two rows contain the subsystem processor, comprised of 23 modules, a core memory, a memory power regulator, a connector panel for the maintenance console, and an auxiliary operator panel.

The lower three rows contain 71 modules of control logic. Most power related components are located in the base of the cabinet. A vertical bus bar carries +5 volts to horizontal bus bars in each logic chassis row. Individual power wires distribute other voltages to logic chassis bus bars.

Power supplies operate from 120/208-volt, 400-Hz, 3-phase power. The blower, elapsed time meter, and convenience outlet operate from 60-Hz or 50-Hz power.

NOTE

Since the convenience outlet is protected by a 7-ampere circuit breaker, it is suit- able for use only with low power equipment.

The blower draws room air through a filter, circulates it around the power supplies and logic modules, and forces it out through exhaust ducts at the top of the cabinet.

DIMENSIONS

1-6

Height Depth Width Weight

76 inches 25 inches 39 inches 300 pounds

(193 centimeters) (63.5 centimeters) (91. 4 centimeters) (136 kilograms)

60428500 A

c c-

c-'

c--

(

\

(

/

(--

c

(

I.

(

(21)

o o

u

o

(j

o

o o

o

o o o

C)

o

ENVIRONMENTAL REQUIREMENTS Cooling method

Heat dissipation Temperature

Operating Nonoperating Recommended operating

Maximum gradient Humidity (no condensation)

Operating Nonoperating Maximum operating altitude

POWER REQUIREMENTS 120/208 volts 400 Hz

120 volts 50/60 Hz

60428500 A

Forced air (blower)

2800 Btu per hour (705.6 Kg-cal/hr)

40°F (4. 4°C) to 120°F (490C) -30°F (-34.40C) to 150°F (65. 6°C) 750F (23. 9°C)

200F (11.00 C) per hour

10% to 90% relative humidity 50/0 to 95% relative humidity

6000 feet (1830 meters) above sea level

3-phase 1-phase

1-7

(22)

,

('

c

(

\ ...

( ( (

(

(23)

"-^../

' ...

,r"··· .... '"

I ^I

"-_ ^....^,'

Ci

("-""

\ ... _--,.'

r-'.

t' \

'_J'

!

1'-...-.

c

C:·

c'

,-....

(

.~'

SECTION 2

OPERATION

(24)

/

(25)

()

o

(),

o

o o o o o o

o o

()

OPERATION

INTRODUCTION

This section describes controls, indicators, and operating procedures for the controller and disk storage unit. For initial power-up and checkout procedures, refer to Installa- tion and Checkout, section 4. For complete subsystem operating procedures, refer to the Disk Storage Subsystem Operation and Programming manual. For controlware and' coupler reference information, refer to the disk controller hardware reference manual.

These manuals are listed in the preface.

AUXILIARY OPERATOR PANEL CONTROLS AND INDICATORS

Figure 2-1 illustrates the auxiliary operator panel. Tabl~ 2-1 describes auxiliary operator panel controls and indicators.

o

GO RUNNING

@

STOP

@

Me

r - -

~o

P A

INO

+ @ ~P

Y OFF

~

L - -

ON

~E

@S

OFF

~

Figure 2-1. Auxiliary Operator Panel

60428500 A 2-1

(26)

TABLE2-1. AUXILIARY OPERATOR PANEL CONTROLS AND INDICATORS

Nomenclature GO/RUNNING

STOP

MC

MEM PARITY CLR/IND

MEM PARITY STOP ON/OFF

SEL STOP ON/OFF

Device Momentary close switch/ indicator light

Momentary close switch

Momentary close switch/indicator light

Toggle switch

POWER CONTROLS AND INDICATORS

Function

Pressing the switch causes the subsystem processor to start executing instructions. The indicator lights when the subsystem processor is running.

Pressing the switch stops the subsystem processor.

Pressing this switch clears the subsystem processor's control section, addressable registers, and output channels. The GO /RUNNING indicator must be unlighted when the MC switch is pressed.

The indicator lights when a memory parity error is detected. Pressing the switch clears the error status and causes the light to go out.

When this switch is ON, the subsystem processor stops running upon detection of a memory parity error. When this switch is OFF, the subsystem processor continues to run after detecting a memory parity error.

When this switch is ON, the subsystem processor stops anytime it reads a OOXX instruction. When this switch is OFF, the subsystem processor ignores a OOXX instruction and goes to the next instruction.

Figure 2-2 illustrates the front panels of the power supplies and the power distribution box. Table 2-2 describes power indicators and controls.

2-2 60428500 A

c·

c

c c

c.

(

\.

c

( '

l " .

(

(27)

o

o o o

o o o o o

o o o o

Cj

~ ^I ^{~~I ~+O}

OFF'" -12

^+5f)6 ⁰ ⁰ ⁰ ^@

J I J I J2 RECTIFIER

METER METERING AC TEST

SELECTOR INPUT POINT

+5V ADJUST

@ ^J^I

TPI -5V ADJUST

@<C@@@@@@@

E:::::3

Ê9 ÊI Ê2 Ê3 Ê4 Ê5 Ê6 Ê7 ÊB

lUUW

L - - D C POWER I

400 Hl

~ ~ ~~~~~~~

METERING L - - -AC POWER I

Figure 2 -2. Power Controls and Indicators

POWER-UP/POWER-DOWN PROCEDURE

For this procedure, all logic voltages should be at their nominal values as described in the initial power-up procedure in section 4. The power-down sequence is listed first since it must be performed correctly for power-up to be effective.

POWER-DOWN

1. Press the STOP switch on the auxiliary operator panel.

The GO /RUNNING indicator should go out.

2. Turn OFF the POWER DISCONNECT switch.

60428500 A 2-3

(28)

POWER-UP

1. Turn ON the 400 HZ circuit breaker and the POWER DISCONNECT switch. The blowers should operate.

2. Press the GO /RUNNING switch/indicator on the auxiliary operator panel. The indicator should light. The controller is now ready for operation.

TABLE 2-2. POWER CONTROLS AND INDICATORS

Control/Indicator Function

+ 5V A DJUST rotary knob Adjusts +5-volt power output. The adjustment is monitored on the percent meter.

p'ercent meter Indicates the percent difference between

the voltage input to the meter and the nominal voltage for that input. The METER SELECTION switch determines the voltage input to the meter.

- 5V A DJUST rotary knob Adjusts -5-volt power output. The adjustment is monitored on the percent meter.

POWER DISCONNECT switch A pplies power to the blowers, elapsed time meter, and 400 Hz circuit breaker.

Elapsed time meter Indicates the amount of time that 50/60-Hz power has been applied to the controller.

400 HZ circuit breaker Protects the power supplies from over- load.

AIRFLOW SENSOR BLOWER (on Disables 50/60-Hz power input to

side of plenum) blower during airflow sensor test.

AIR FLOW SENSOR RELAY Indicates that the 130⁰F (55⁰C) thermo- INDICATOR (on side of plenum) stat has opened the relay supplying

power to the 400 Hz circuit breaker.

2-4 60428500

A

(

c--

C~, c:~

c c

(-

( (

( '- (

(

(29)

(J

o

o o

o o o o o

o o

o

o o

o

n

DISK STORAGE UNIT CONTROLS

Figure 2-3 illustrates disk storage unit controls and indicators. Table 2-3 describes each of these items.

TABLE 2-3. DISK STORAGE UNIT CONTROLS AND INDICATORS

Nomenclature Device Function

START Alternate action When the indicator is unlighted and pushbutton / indicator all interlocks are properly set, press-

ing this switch applies power to the disk storage unit and initiates disk pack rotation. When the indicator is lighted, pressing this switch removes power from the disk storage unit and stops disk pack rotation.

READY Indicator Lights when the disk pack has reached

normal speed and the heads are loaded.

FAULT Pushbutton Lights, to indicate a fault condition in swi tch / indicator the disk storage unit. Pressing the

switch clears the fault indication.

MAINTENANCE Indicator Lights when the controller is not

controlling the power application to this disk storage unit.

TEMPERATURE Indicator Lights when an overtemperature con-

dition exists in the disk storage unit.

Unlabeled Indicator Indicator Lights when the controller selects the disk storage unit.

DISK PACK EXCHANGE PROCEDURE

1. Make certain that the START indicator is not lighte d and that the disk pack is not spinning. If the START indicator is lighted, press it to turn off the light and stop the disk storage unit.

2. When the disk pack has stopped, press the main cover latch (Figure 2-3) and lift the main cover. The dust cover opens with the main cover.

60428500 A 2-5

(30)

2-6

3. Place a disk pack cover over the loaded disk ,pack so that it engages the spindle. Turn counterclockwise until the spindle clicks and lift the' cover and disk pack from the disk storage unit.

""""""'1"''1

t

^CAUTION

•••••••••••••••••••

place one hand under the disk pack to prevent the disk pack from falling free of the cover.

4. Using its cover as a handle, place the new disk pack slowly over the spindle until it engages the spindle drive unit. Turn the disk pack cover clockwise until it reaches a stop. Lift the disk pack cover from the disk storage unit.

5. Close the main cover, making sure that it latches. If the cover is not securely latched, the dust cover interlock remains open and prevents power application.

6. Press the START switch. When the disk pack is at operating speed (heads loaded), the READY indicator lights. The disk storage unit is now ready for operation.

60428500 A

C,"

r

"

c

c-

(~'

\',

(

(31)

~ 0 0 0 0 0 0 o ^0'0 ^('-- ^"--

^'\

⁾ o

en o

~ t'-' O:l CJ1 o o

~

t'-' I - l

. . - - - - U l III II. II. III ~

II

^START

III

^READY

III FAULTrAN~l[

TEMP - ] /

d

UNLABELED

/

INDICATOR

Figure 2-3. DSU Controls and Indicators

o ^{0 0 0} o o ^c) ^o c

(32)

(

c--'

(--.'

c-' r r

(

( (

(

(33)

''--./

o

[

CI

C

o c

C·

c

,---^...

( I

\....

SECTION 3 THEORY OF OPERA TION

(34)

/

(

\

,

( /

~

\

~

(

\ ,

/

(35)

() C)

o

()

o o

(J ()

o

o o

o

o o

o

n

THEORY OF OPERA TION

INTRODUCTION

This section provides component theory and operational sequences for each of the major assemblies in the disk controller. In addition, the first part of this section describes the PPU interface, pass on/pass back interfaces, DSU interface, maintenance console interface, and interfaces linking controller major assemblies.

INTERFACES

Figure 3-1 illustrates the interfaces described in the following paragraphs.

PPU INTERFACE

This interface connects the disk controller to a PPU. Dual access controllers have two PPU interfaces, one for each PPU. All data and control signals on the PPU interface are 25-nanosecond pulses which are synchronized with 1-MHz and lO-MHz clock signals also present on the interface.

Signals From PPU Only

1 MHZ CLOCK/10 MHZ CLOCK

ACTIVE

FUNCTION

MASTER CLEAR

60428500 A

The controller uses these signals to synchro- nize all communication with a PPU.

The PPU sends this signal to initiate or resume communication with the controller. An active signal accompanies each function signal.

This signal identifies the accompanying 12 data signals as a function code.

The PPU sends this signal to clear the controller just after a computer system deadstart.

3-1

(36)

PPU INTERFACE A I MHZ CLOCK 10 MHZ CLOCI(

MAINTENANCE CONSOLE

&

MAINTENANCE CONSOLE

T

MAINTENANCE CONSOLE

I~ -eCABLES A,B,C,D

BLOCK TRANSFER INTERFACE CC0-(OO-I~1 'is' _

0UTROY ~ CHASSIS A2 CORE

PPU A

&

MASTER CLEAR ~~~;~I~R ^AIi-=~.!!!N:~:R~EO'---I

FUNCTION

SUBSYSTEM PROCESSOR MEMORY NOTES:

& NOT PART OF FA722.

~~~~I<~~;~~:~~~~-VE---~

I~O~A~TA~ _ _ _ _ _ -4~ _

FULL ~

EMPTY

PARITY (CYBER 170 ONLY)

GOL )~~----

^{@ -}

1

PARITY (CYBER

170_~LY,-1

^{_ _ _}^-/

PASS BACK INTERFACE A &

SIGNAL GROUP 2 ~

NEXT r-c::.:;;.::..;:.=-=---{~I

DEVICE ON DATA CHANNEL A

& PASS ON INTERFACE A &

~S~IG~NA~L~G~RO=U~P~I _ _ _ -{~

L -_ _ _ - '

PPU B

&

PPU INTERFACE B

~S~IG::.:NA~L~Gc.:.RO=U"-P~I---_{~

DT220-C SECOND CHANNEL L-"S.:.::IG::.:NA::.::L...:;Gc.:.RO=U"-P-"2 _ _ _ -(~-. _ FEATURE

..

^~

~---' ~

PASS BACK INTERFACE B &

NEXT ~S.:.::IG::.:NA::.::L...:;G~RO~U"-P-"2---_(~

DEVICE ON DATA CHANNEL B

&

PASS ON INTERFACE B &.

SIGNAL GROUP I @---

MC-CC

~CC~I~-~10~0-~15~1 _ _ _ _ --{~, __

CREADY ~

CREPLY

~C~CT~ER~M~ _ _ _ _ _ _ .~

E0P-CC

F0RCEF COUPLERI NORMAL CHANNEL INTERFACE

SEL-lw-31 0 -

'~-=--"'",-=----(~6 4

~3-(00-151 CLR0-00

CONTROL LOGICI SUBSYSTEM PROCESSOR-_

~

7

gOI/ls t;;s ²

&

&.

In

&.

i<[ .1I :$ ~~

-@--- ^INDICATES

NUMBER OF LINES,

OCI44-A/B OR DC401-A MASS STORAGE EXTENDERS PERMIT UP' TO 64 OISK STORAGE UNITS TO BE CONNECTED TO A CONTROLLER, SEE PREFACE FOR EXTENDER PUB II CATIONS.

THIS OPTION IS COVERED IN THIS MANUAL.

PASS ON IPASS BACK CABLES ARE SUPPLEMENTARY ITEMS, REFER TO SECTION 7 fOR PART NUMBERS. REFER TO SECTION 4 FOR CABLE INSTALLATION PROCEDURE,

DOUBLE DENSITY BR30B DISK STORAGE UNITS MUST CONNECT DIRECTLY TO THE CONTROLLER AND NOT TO EXTENDERS.

TEN LINES ARE USED FOR THE STATUS BUS AND ADDRESS AND CONTROL BUS WITH CONTROLLERS HAVING THE DT716-A DOUBLE DENSITY OPTION.

THESE SIGNALS APPLY ONLY TO CONTROLLER HAVING THE DT716 -A DOUBLE DENSITY OPTI

COUPLER/CONTROL LOGIC

~

lil~1 h ^r ^{~ ~}

^I~

^e ^..

^I⁰^{0 _ -}^_>-OJ^{~ ~}^{l o t -}

^;

^;;^~^~^"''''^o^§^{~ ~}^{~ ~}⁹

^....

^o^{~ ~ ~}^"'''^~⁰ ^..^m^'"

CIBIOO-ISI -@--

1--"'=~::!.---{'6 CIRPLY

CIREO HALT

~C0~B~10~0-~15~1 _ _ _ _ _ ~'iS' .

C0REO ~

C0RPLY

CHASSIS All l. ' \ ' , I

' I

CONTROL LOGIC '~\_;\ \ I .!I

~'L J

-~,/

_

^...^/

-

CONTROL LOG1C/DSU INTERFACE E0R0UT

EOR-IN ADDRESS AND CONTROL CABLE

~~:;U~A:~: DETECTOR 17\. 0 IS K &

ADDRESS AND CONTROL BUS . ~ ^STORAGE

ON SECTOR (SECTOR ALERT) ~ ^UNIT ^OR

SEEK ERROR ~¢g:AGE 6\

ADDRESS AND CONTROL TAG LINES J5'. ~ EXTENDER

STATUS BUS SELECT LlNES.~ ill

DATA CABLE ~ (ONE OF

UN~ ~6~~1BLE

UNIT BUSY UNITS PER

UNIT SELECTED SUBSYSTEMI

ON-LINE READ DATA "I"

REFERENCE CLOCK

' - - - . . I UNIT SELECT

RELEASE

DISABLE OPPOSITE CHANNEL RESERVE CLEAR FAULT

WRITE 'DATA OPEN CABL E DETECTOR WRITE CLOCK £

WRITE STROBE £

DOUBLE DENSITY .&.

Figure 3-1. Interface Diagram

3-2 60428500 H

c

('"

5 ON,

c

(,

(

(37)

()

(:)

(J

o

o o

o

()

o o

o

Bidirectional PPU Interface Signals DATA

PARITY (CDC CYBER 170 Only)

FULL

EMPTY

INACTIVE

PASS ON/PASS BACK INTERFACES

These 12 signals carry data, function, and status words between the PPU and the controller.

This signal provides odd parity for the 12 data signals it accompanies.

This signal indicates to the receiver that the word formed by the 12 data signals can be accepted.

This signal indicates to the transmitter that the receiver has accepted the word accompanying the last full signal.

The controller replies to a function signal (and its associated function code) with an inactive signal. An inactive signal may also be used by either the PPU or the controller to terminate communication.

These interfaces transfer all the signals described under HLP Interface between the PPU and other devices connected behind the controller on the same data channel.

Signals on the pass on interface lag corresponding signals from the PPU by 100 nanoseconds. Likewise, signals on the pass back interface lag corresponding signals from the other device(s) on the data channel by 100 nanoseconds. Each access of dual access controllers may have pass on/pass back cables installed.

CONTROL LOGIC/DISK STORAGE UNIT INTERFACE

Signals between the control logic and a disk storage unit or a mass storage extender are carried on cables A (the address and control cable) and B (the data cable).

60428500 H _3-3

I

(38)

Address and Control Cable

Status Bus

I

The status bus consists of nine l~nes (10 lines for double density option) which carry status information from the unit to the controller. Information "on the status bus is determined by status select signals sent from the controller to the unit. Table 3-1 shows the relationship of the status select lines to the status bus.

I

I I I

TABLE 3-1. STATUS SELECT LINE FUNCTIONS Status Select Lines

Status Read, Read Read Read Read Read Read Read Read Bus Cyl. Diff. Head Sec. Sec. Interlock Position Fault Control

Sel. Cnt. Reg. Cntr. Reg.

Bit 0 1 1 1 1 1 Pack on Forward W+E+R' @ ^Sector

On Cyl.

Bit 1 2 2 2 2 2 Sector Reverse (W+E)· R@ Pack

block

®

^unsafe

Bit 2 4 4 4 4 4 Heads Cylinder Current Seek (i)

loaded pulse error

Bit 3 8 8 8 8 8 Brush End of + Volt On

cycle travel cylinder

Bit 4 16 16 16 16 16 Start Fine - Volt Index

switch servo

Bit 5 32 32 Local Speed Seek Amplitude®

remote monitor 1

Bit 6 64 64 Spindle AC write<D End of

motor on fault cylinder

Bit 7 128 128 Power

@

Amplitude@)

supply monitor 2

temperature

Bit 8 256 256 Cntr Logic

®

Amplitude@

Valid temperature monitor 3

Bit

9CD

⁵¹²

^CD

⁵¹²

<D

CD

Used only with DT716-A Double Density Opt,ion.

(2) This is Control Interlock for double density option.

@ This is Logic Temp. for double density option.

@ Not used with double density option.

®

This is W+ R· On Cyl. for double density option.

®

This is W' R for double density option.

G) This is Seek Incomplete for double density option.

® This is EaT Seek Error for double density option.

3-4 60428500 H

c-' c'

(~

c c

c'

(

(39)

(J

o

(J

o o

o

()

o

o o

(J

()

o o o o o

o

(j

Address and Control Bus

The address and control bus consists of nine lines (10 lines for double density option) which

I

carry information from the controller to the unit. Information on these lines is determined by address and control tag signals which are sent from the controller to the unit. Table 3-2 shows the relationship of the tag lines to the address and control bus.

On Sector (Sector Alert)

This is an unselected status line which indicates that the addressed sector is one sector away from the heads. The on s ector signal is one sector in length and occurs once per revolution until a read gate, clear, or release is received. The on sector signal is disabled while a seek command is in process.

Seek Error

This is an unselected status line. It indicates that the unit was unable to complete a move within 500 milliseconds or that the carriage has moved to a position outside the recording field. A return to zero seek command cleans the seek error condition, re- turns the heads to cylinder zero, and enables an on cylinder signal to the controller.

TABLE 3-2. TAG LINE FUNCTIONS

Address Tag Line

and

Control Difference

I Cylinder Sector Head Control

Bus Select Select Select Select Select

Bit 1 1 1 1 1 Write gate

Bit 1 2 2 2 2 Read gate

Bit 2 4 4 4 4 Seek forward

Bit 3 8 8 8 8 Head ad vanc e

Bit 4 16 16 16 16 Erase gate ~:(~:(

Bit 5 32 32 Seek reverse

Bit 6 64 64 RTZ

Bit 7 128 128 Data strobe early

Bit 8 256 256 Data strobe late

Bit 9 ^~:: 512 512

~:(Used only with DT716 -A Double Density Option.

~:(*Not used in double density disk units.

60428500 H 3-5

I

(40)

I

Address and Control Tag Lines (Received by the Unit) (Refer to Table 3-2)

Difference Select: This signal indicates that the address and control bus contains positioning information (the difference between the unit's present cylinder address and the controller's new cylinder address).

Cylinder Select: This signal indicates that the address and control bus contains the controller's new cylinder address.

Sector Select: This signal indicates that the address and control bus contains the address of the sector which will generate the next on sector signal.

Head Select: This signal indicates that the address and control bus contains the address of the head which is to be selected.

Control Select: This signal indicates that the address and control bus contains control information with the following bit assignments.

Signal

Bit 0 Write gate Bit 1 Read gate

Bit 2 Seek forward

Bit 3 Head advance

Bit 4 Erase gate

Bit 5 Seek reverse

3-6

Function Enables write driver.

Enables digital read data on the read data lines.

Initiates the positioning sequence in the forward direction if the difference counter contains a number greater than zero.

If the difference counter equals zero, a forward carriage offs et results.

Increments the head counter by one.

NOTE

This signal occurring with the end of cylinder signal clears the head counter.

Enables the erase driver. (Not used in double density disk units. )

Initiates the positioning sequence in the reverse direction if the difference counter contains a number greater than zero.

If the difference counter equals zero, a reserve carriage offset results.

60428500 H

C -.,'

~ .... ,,.

C,\

r. _'-"

c.

( '

I '-, .

(

(41)

o

o o o

o

()

o

o o o

o

o o

()

o o o

o

()

Signal

Bit 6 Return to zero

Bit 7 Data strobe early

Bit 8 Data strobe late

Status Bus Select Lines (Refer to Table 3-1)

Function

Initiates positioning to cylinder zero .. and clears seek error condition if one exists.

When this signal is true, the data strobe is moved to the early margin position.

When this signal is true.. the data strobe is moved to the late margin position.

Read Cylinder Select (Controller to Unit): This signal gates the contents of the unit -cylinder register to the controller on the status bus.

Interlock Select (Controller to Unit): This signal gates unit interlock status to the controller with the following bit assignments on the status bus.

Signal Bit 0 Pack on Bit 1 Sector block

or

Control interlock

Bit 2 Heads loaded

Bit 3 Brush cycle Bit 4 Start switch Bit 5 Local/remote

Bit 6 Spindle motor

Bit 7 Power supply temperature or

Function

Indicates a pack is mounted on the spindle.

Indicates the unit cover is closed and sec- - tor block is in position to sense sector disk.

Indicates the unit cover is closed, all dc circuit breakers are closed, and the start switch is on. (Applies to double density option only. )

Indicates heads have been loaded on the disk pack.

Indicates pack brush cycle is in progress.

Indicates start switch is on.

Indicates unit sequencing power is under control.

Power is applied to the spindle motor.

Indicates power supply temperature nor-

mal.

I

Logic temperature

Bit 8 Logic temperature

Indicates logic chassis temperature normal.

(Applies to double density option only. )

I

Indicates logic chassis temperature normal.

(Not used with double density option. )

60428500 H 3-7