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D D
C C
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A A
Title
Number Revision
Size A4
Date: 2005-10-25 Sheet of
File: C:\projekty\..\obdh_aux_brd.SchDoc Drawn By:
SD[7..0]
SA[19..0]
SMEMRD SMEMWR BALE CHRDY AEN INT5 INT9 RESETDRV VCC
GND Connector isabus
VCC
SA[19..8]
SMEMRD SMEMWR BALE CHRDY AEN INT5 INT9 RESETDRV
GND
CAN0INT CAN1INT
CAN0CE CAN1CE BIOS CE BUF FCNTRL BUF FCNTRL Unit
address_decoder
SA[7..0] SD[7..0] SMEMWR
CAN1CE
CAN0CE
CAN1INT CAN0INT VCC GND
SMEMRD
BUF FCNTRL BUF FCNTRL Module CAN_interface
BIOSCE SD[7..0]
SA[19..0]
VCC GND
SMEMRD SMEMWR Module
BIOS
VCC
GND Module
Compact Flash: IDE Header + CF Slot
VCC VCC
SA[19..0] SA[19..8]
SA[19..0]
SD[7..0]
SA[7..0] SD[7..0]
VCC VCC
SA[19..0] SD[7..0]
VCC
OBDH_AUX_BRD BLOCK DIAGRAM
1
1/1 Rafał Graczyk