HAL Id: emse-01099040
https://hal-emse.ccsd.cnrs.fr/emse-01099040
Submitted on 7 Jan 2015
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Design of Bulk Built-In Current Sensors to Detect
Single Event Effects and Laser-Induced Fault Injection
Attempts
Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise
Flottes, Giorgio Di Natale, Bruno Rouzeyre
To cite this version:
Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise Flottes, Giorgio Di Natale, et al.. Design of Bulk Built-In Current Sensors to Detect Single Event Effects and Laser-Induced Fault Injection Attempts. Joint MEDIAN–TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands. 2014. �emse-01099040�
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Concurrent Error Detection (CED) Circuitry Logic Block OReg System’s Restart M N OLogic N R eg is te r (F lip -F lo p s) Clock Clock M R eg is te r (F lip -F lo p s) node_x fault_flag_signal System’s Deadlock System’s Recovery
Options of Security Mesures System’s Block BBICS IB in = 0 out = 1 " 0 PMOS on NMOS off IA PMOS-BBICS NMOS-BBICS Flag_N = 1 Flag_P = 0 in = 1 out = 0 " 1 PMOS off NMOS on IB PMOS-BBICS NMOS-BBICS Flag_N = 0 Flag_P = 1 IA Case 0: Case 1:
Cases of Transient Faults in an Inverter Protected by a PMOS-BBICS and a NMOS-BBICS:
Bulk Built-In Current Sensors (BBICS) are fault detection mechanisms embedded in integrated systems. BBICS are able to monitor anomalous transient currents like the so-called single event effects induced by radiation or even malicious injection sources. This work reviews BBICS principles and introduce new sensor architectures that improve the transient-fault detection sensitivity. In addition, a test chip is presented for the validation of the sensor concept under the laser-induced effects.
Transient-fault current view in a cross section of classic CMOS inverter monitored by a NMOS-BBICS: alarm flag C" out ‘1’ in ‘0’ PTAP P substrate N well P+ to Vdd P+ N+ N+ P+ NMOS PMOS NMOS_bulk to Gnd BBICS Metal 1 MOS gate N+
Test chip composed of single NMOS and PMOS transistors designed with classic and triple-well 90-nm CMOS technology.
Experiment settings: measure of laser-induced currents at λ = 1064 nm, laser spot Ø = 5 µm, pulse duration = 20 µs, 1.25 W
laser beam P substrate N+ N+ P+ NMOS G S D (1.2V) B (gnd) 2.5mA
Laser-induced NMOS current Case 0 laser beam P substrate N well P+ P+ N+ P+ PMOS G S D (gnd) B (1.2V) Psub bias (floating)
1.9mA laser beam P substrate N well P+ P+ N+ P+ PMOS G S D (gnd) B (1.2V) Psub bias (gnd) 8mA 200µA
Bulk current that would be monitored by PMOS-BBICS
8mA
Drain current that would contribute to produce a transient fault 200µA
Laser-induced PMOS current Case 1A
Laser-induced PMOS current Case 1B
Bulk current monitored by a PMOS-BBICS would be an order of magnitude above drain current
N+ Pwell DNwell Nwell Nwell P substrate N+ N+ P+ NMOS G S D (1.2V) B (gnd)
DNwell bias (floating)
laser beam 2.3mA N+ Pwell DNwell Nwell Nwell P substrate N+ N+ P+ NMOS G S D (1.2V) B (gnd) DNwell bias (1.2V) 6mA
Bulk current that would be monitored by NMOS-BBICS
6mA
Drain current that would contribute to create a transient fault 200µA
laser beam 200µA
NMOS in Pwell to mimic PMOS properties
Laser-induced NMOS current
Case 0A Laser-induced NMOS current Case 0B
Use of triple-well technology amplifies bulk current by an order of magnitude above drain current
Transistors designed with classic CMOS technology
Transistors designed with triple-well CMOS technology
Layout of 65-nm CMOS test chip with BBICS devices Bulk current monitored by a NMOS-BBICS would have the
