The fabricated SNSPDs were tested in a4He sorption cryostat produced by PhotonSpot, which has a base temperature of 0.8 K. It is possible to vary the operating temperature for temperature dependent studies. Figure 3.6 shows the inside of the cryostat. The cryostat is designed to have 8 readout channels. In order to improve the signal-to-noise ratio of the readout electronics, cryogenic amplifiers are utilized on the 40 K stage, as the first amplification stage. Details about the readout electronics are outlined in App. A.4. One of the key features of the readout circuitry is that it uses a transformer to provide coupling for the the SNSPD [46]. DC-coupling is crucial for correct SNSPD operation, since it avoids unwanted nonlinear behavior such as count-rate dependent efficiency and premature detector latching [59].
During the completion of this thesis, additional devices, fabricated by the National Institute of Standards and Technology (NIST), were also characterized. These investigations typically used a different cryogenic system, which was a Gifford-McMahon cryostat with a base temperature of 2.3 K. This involved two different SNSPD types: WSi devices with an optical stack optimized for 1340 nm (See App. A.4) and MoSi devices optimized for 1550 nm (See App. A.8). Where appropriate, comparisons between the NIST devices and the UNIGE/UNIBAS devices shall be drawn.
26
3.2. SNSPD characterization
2 4 6 8 10 12 14
Bias current (µA) 0.00
0.05 0.10 0.15 0.20 0.25
System Detection Efficiency
w = 140 nm w = 170 nm
(a) First generation device without micro-cavity.
Two different nanowire widths, for a constant gap width of 160 nm.
5 10 15 20
Bias current / µA 0
20 40 60 80 100
System detection efficiency (SDE) / %
Detector :h127 Width = 150 nm FF =RT−1/2 λ=1550.0 nm Date : 2016−05−04 Temperature = 0.75 K ID280 : 78 mV Int.time : 10 sec Ch.cryo :A3
10-2 10-1 100 101 102 103 104 105 106 107
Dark count rate / cps
(b) Second generation device with micro-cavity.
Nanowire parameters: w = 150 nm, FF = 0.5
Figure 3.7: System detection efficiency versus bias current for first- and second-generation devices. The second-generation device also shows the dark count rate.
(a) w = 120 nm, FF = 0.3. (b) w = 140 nm, FF = 0.3.
(c) w = 130 nm, FF = 0.5. (d) w = 190 nm, FF = 0.5.
Figure 3.8: Fencing due to etch residue redeposition during ion-beam etching. Different design widths and fill-factor nanowires are pictured.
Chapter 3. Superconducting nanowire single-photon detectors
3.2.1 Detection efficiency and dark count rate
The efficiency and DCR characterization measurement setup is discussed in App. A.4. The first generation of devices to be fabricated were of the simple nanowire type, without a micro-cavity. The MoSi film thickness was 5 nm. Figure 3.7a shows the SDE, as a function of the bias current in the detector, for nanowires of two different widths and a fixed gap of 160 nm (space between the nanowires). The characterization wavelength is 1550 nm. The device with a FF of 0.52 (w=170 nm) has an efficiency of 22% whilst the device with a FF of 0.47 (w=140 nm) has an efficiency of 18%, for the optimum polarization. The most important feature from these efficiency curves is that there is a plateau, which is believed to indicate that the internal detection efficiency is saturated. In other words, for every photon that is absorbed in the active area of the nanowire, there is unity probability of receiving a detection signal. This is one of the most attractive features of SNSPDs based on amorphous superconductors, the fact that this plateau can be very large [74, 17]. This is the prerequisite for high SDE.
It is instructive to analyze the geometrical dependency on the detector performance. As seen from Fig. 3.7a, narrower nanowires give rise to the saturation at lower bias currents, as expected [66], as well as a lower critical current. In fact, since SNSPDs consist of a nanowire meander (see App. B.2, Fig. 1), the “tightness” of the turn sections plays a role in the critical current. Table 3.1 lists the critical currents for six detectors with different geometries. For each nanowire width, the critical current was the largest for the device with the widest gap.
This is due to the fact that tighter turns induce current crowding, which reduces the critical current [83]. It is predicted that at a FF of 1/3 is required to prevent any reduction due to current crowding, whilst using a specific turn geometry, known as the optimum turn. Note that the devices in Tab. 3.1 were not selected, these were the first 6 devices to be measured with these geometries. All six devices exhibited a plateau at 1550 nm and only one device seems to have a lower critical current than expected. This suggests that the production yield is rather good for this wafer.
Table 3.1: SNSPD critical currents for different nanowire geometries, namely the nanowire width and gap, for the first generation devices.
Ic gap = 130 nm gap = 160 nm w = 140 nm 5.9µA 8.4µA
w = 150 nm 6.3µA 7.5µA
w = 170 nm 10.7µA 11.4µA
For the second-generation of devices, a micro-cavity design was implemented, however, the last dielectric layer (TiO2) was omitted, which is equivalent to a half-cavity design [72].
This was done due to the fact that the simulated absorptions were due to be sufficiently high already: >0.96 for FF=0.5 and 0.9 for FF=0.33. The MoSi film thickness was increased to 6.5 nm in the hope that this would increase the critical current. Figure 3.7b shows the resulting SDE for a device with FF=0.5 and w=150 nm, which also exhibits a plateau. The 28
3.2. SNSPD characterization
maximum detection efficiency is 66%, which is a factor of 3 improvement compared to the first generation, however, it is significantly lower than the simulated values. With FF=0.33, the saturated efficiency drops down to 50% and 55% for nanowire widths of 150 nm and 160 nm, respectively. The FF-dependent efficiency is expected, however, the dependence on the nanowire width was expected to be close to negligible. All this points towards a possible fabrication imperfection.
Figure 3.8 shows SEM images of the second-generation SNSPDs for different FFs and nanowire widths. It is clear that there is some etch residue redeposition on the edges of the nanowire, which is sometimes referred to as “fencing”. It is likely that these fences are optically absorbing, just like the nanowire, but do not play a role in the detection mechanism, meaning that they introduce some intra-cavity loss. The ratio of the fence surface area to the nanowire surface area decreases for wider nanowires, which could explain why we observe a width-dependent detection efficiency. The reason why the fencing is significantly worse for the second-generation devices compared to the first-generation devices (see App. B.2, Fig. 1) is because the ion-beam etch (IBE) power was reduced by a factor of 4, in order to minimize the physical damage of the resist to allow for a longer etch-time of the thicker film. An improved etching technique will be discussed in Sec. 3.3.1, which will be utilized in the next-generation devices in order to minimize the effect of fences.
Figure 3.7b also shows the DCR of the second-generation device, which is dominated by the background blackbody radiation coupled inside the optical fiber, up to a bias current of 13µA.
After this current, the intrinsic dark counts of the nanowire start to dominate. If one was to operate the SNSPD on the efficiency plateau, a background count rate of 200-300 cps would be achieved. An efficient method to filter out some of the blackbody radiation, to a level of a few tens of counts, is to coil the optical fiber at the final stage of the cryostat, as discussed in App. A.4 (see Fig. 2).
(a) First-generation device, 5 nm MoSi deposited on thermal oxide. 170 nm nanowire.
(b) Second-generation device, 6.5 nm MoSi de-posited on sputtered oxide. 150 nm nanowire.
Figure 3.9: Comparison of the temperature dependence for detectors from different genera-tions.
Chapter 3. Superconducting nanowire single-photon detectors
3.2.2 Temperature dependence
It is desirable to obtain an SNSPD with as high an operating temperature as possible. A specially desirable operating temperature is 2.5 K, due to the existence of low-cost closed-cycle cryogenic systems operating a that temperature. To characterize the maximum operating temperature, one needs to define the detector usable zone, which in our case is refereed to as the bias current where the detection efficiency is saturated, but is less than the current where the intrinsic dark counts dominate. This requires one to measure three characteristic currents, namely the saturation current (IS AT), the switching current (ISW) and the dark count current (IDC R=100, where the DCR increases above 100 cps). Finally these characteristic currents are plotted as a function of operating temperature. For more detailed information about the extraction of the characteristic currents, please refer to App. A.8 and Figs. 3 and 4 within. The temperature at which the IS AT and IDC R=100coincide is defined as the maximum operating temperature, for a given operating wavelength.
Figure 3.9 compares the maximum operating temperature of the first- and second-generation devices, for a wavelength of 1550 nm. Surprisingly, it is found that the maximum temperature is 1.9 K for both, even though the MoSi film thickness was increased to 6.5 nm (from 5 nm) for the second-generation devices. As discussed in the App. A.4, when increasing the thickness of WSi devices, fabricated at NIST, an operating temperature increase was achieved. In addition, MoSi devices fabricated at NIST, with a film thickness of 6.5 nm, achieved an operating temperature of up to 2.5 K and exhibited a much broader plateau (please see App. A.8). This points to possible imperfection in the fabrication, which is liming the maximum achievable critical current.
As well as the limited operating temperature, the second-generation devices also had an inferior yield compared to the first generation. From 11 devices tested, that would be expected to have a plateau, only 5 did, which suggest a yield of about 50%. In addition, when comparing the critical currents, very little difference could be seen between devices with different FFs, which suggests that the critical current is limited not by the turn sections (as for the first-generation devices) but by the nanowires. It is believed that these limitations could be due to the increased roughness of the SiO2surface, upon which the MoSi was deposited. This will be discussed in more detail in Sec. 3.3.3.
3.2.3 Spectral response
The spectral response of the simple nanowire devices (first generation) was characterized as outlined in App. B.2. This takes into account only the spectral dependence of the internal detection mechanism, which is very broadband for these devices, exhibiting a saturated inter-nal efficiency in the range of 750-2050 nm. It is believed that the detection efficiency would continue to be saturated for much higher photon energies, only they were not investigated in the current work. Indeed, MoSi SNSPD have already been used for high efficiency detection at 370 nm [84]. Given a nanowire with a saturated efficiency at the target wavelength, one 30
3.2. SNSPD characterization
can optimize the micro-cavity design, using the MoSi optical constants shown in Fig. 3.3 to maximize the absorption.
An interesting insight from the work outlined in App. B.2 is that the energy-current relation, which is the current required to achieve a saturated internal efficiency for a given photon energy, appears to be nonlinear. This is contrary to recent studies carried out with other material systems [56, 85]. This highlights the importance of further theoretical investigations into the internal detection mechanism in SNSPDs [57].
Figure 3.10: Temporal jitter versus bias current in the first generation device with a nanowire width of 170 nm.
3.2.4 Temporal resolution and count rate
The temporal resolution or temporal jitter of SNSPDs has been the focus of extensive investi-gation in order to find its origin and hence lead to possible improvements. The total temporal jitter can be broken down into two components,JnandJd, which are contributions due to the electrical noise of the readout signal and the intrinsic device jitter, respectively. This means that the jitter typically reduces with increasing bias current, as shown in Fig. 3.10, since the signal amplitude increases, improving the SNR. At the maximum operating bias current for a typical device with 170 nm nanowire width, the system jitter can approach 60 ps. Another way to reduce theJncontribution is to improve the readout electronics, by using cryogenic amplification for example. As discussed in App. A.4, we were able to demonstrate an improve-ment of a factor of 2 by changing from room temperature amplifiers to 40 K cooled electronics.
Further gains can be achieved by reducing the temperature further [86].
The origin of theJdis less well understood and can probably be decomposed into several components. Very recent work indicates that the true description of an SNSPD is that of a transmission line, as opposed to a lumped inductor [87, 88]. This means that the electronic delay of the readout signal depends on the absorption position of the photon along the nanowire. This leads to a geometric component to the jitter, Jg, which will depend on the
Chapter 3. Superconducting nanowire single-photon detectors
growth dynamics, which requires further theoretical and experimental investigation in order to be better understood.
The maximum count rate of SNSPDs is typically characterized by measuring the detection rate as a function of the photon rate impinging on the detector, generated by a continuous wave laser. Appendix A.8 Fig. 3 shows the count-rate curve for a typical MoSi device fabricated at NIST. Our devices have a typical saturated count rate of around 30 Mhz.
(a) Nanowire fabricated on thermal oxide. w = 110 nm, FF = 0.3.
(b) Nanowire fabricated on thermal oxide. w = 220 nm, FF = 0.3.
(c) Nanowire fabricated on sputtered oxide. w = 130 nm, FF = 0.5.
(d) Nanowire fabricated on sputtered oxide with a defect visible. w = 140 nm, FF = 0.5.
Figure 3.11: Comparison of nanowires fabricated on thermal oxide and sputtered oxide.